TC74VHCT04AFN PSpice Model (Free SPICE Model)

1. All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
Device Modeling Report
Bee Technologies Inc.
COMPONENTS : CMOS DIGITAL INTEGRATED CIRCUIT
PART NUMBER : TC74VHCT04AFN
MANUFACTURER : TOSHIBA

2. All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
1Y
1A
4A
VCC
5A2Y
3A
6A
6Y
3Y
4Y
5Y
GND
2A
U1
74VHCT04
SPICE MODEL
*$
*PART NUMBER: TC74VHCT04AFN
*MANUFACTURER: TOSHIBA
*HEX INVERTER
*All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
.SUBCKT 74vhct04 1A 1Y 2A 2Y 3A 3Y GND 4Y 4A 5Y 5A 6Y 6A VCC
X_U1 1A 1Y VCC GND 74VHCT04_S
X_U2 2A 2Y VCC GND 74VHCT04_S
X_U3 3A 3Y VCC GND 74VHCT04_S
X_U4 4A 4Y VCC GND 74VHCT04_S
X_U5 5A 5Y VCC GND 74VHCT04_S
X_U6 6A 6Y VCC GND 74VHCT04_S
.ends 74vhct04
.subckt 74VHCT04_S A Y DPWR DGND
+ params: MNTYMXDLY=0 IO_LEVEL=0
U1 inv DPWR DGND
+ A Y
+ D_VHCT04 IO_VHCT04 MNTYMXDLY={MNTYMXDLY}
+ IO_LEVEL={IO_LEVEL}
.ends
.model D_VHCT04 ugate (
+ tplhmn=1.5ns tplhty=3.6ns
+ tplhmx=9.7ns tphlmn=1.5ns
+ tphlty=5.1ns tphlmx=9.6ns
+ )
.model IO_VHCT04 uio (
+ drvh=24.5 drvl=18.7
+ inld=4pF
+ AtoD1="AtoD_VHCT04" AtoD2="AtoD_VHCT04_NX"
+ AtoD3="AtoD_VHCT04" AtoD4="AtoD_VHCT04_NX"
+ DtoA1="DtoA_VHCT04" DtoA2="DtoA_VHCT04"
+ DtoA3="DtoA_VHCT04" DtoA4="DtoA_VHCT04"
+ tswhl1=477ps tswlh1=470ps

3. All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
+ tswhl2=477ps tswlh2=470ps
+ tswhl3=477ps tswlh3=470ps
+ tswhl4=477ps tswlh4=470ps
+ DIGPOWER="DIGIFPWR"
+ )
.subckt AtoD_VHCT04 A D DPWR DGND
+ params: CAPACITANCE=0
X1 DGND A VHCT_CLAMP
X2 A DPWR VHCT_CLAMP
C1 A DGND {CAPACITANCE+0.01pF}
O0 A DGND DO74VHCT04 DGTLNET=D IO_VHCT04
.ends
.subckt AtoD_VHCT04_NX A D DPWR DGND
+ params: CAPACITANCE=0
X1 DGND A VHCT_CLAMP
X2 A DPWR VHCT_CLAMP
C1 A DGND {CAPACITANCE+0.01pF}
O0 A DGND DO74VHCT04_NX DGTLNET=D IO_VHCT04
.ends
.subckt DtoA_VHCT04 D A DPWR DGND
+ params: DRVL=0 DRVH=0 CAPACITANCE=0
G_OH DPWR DPWR_OH
+ TABLE { V(DPWR_OH,DPWR) }
+ -5.5, 71mA,
+ -4.0, 70mA,
+ -3.0, 67.5mA,
+ -2.0, 60mA,
+ -0.6, 25mA,
+ 0.0, 0,
+ 0.5, -20mA
X1 A DPWR VHCT_CLAMP
G_OL DGND_OL DGND
+ TABLE { V(DGND_OL,DGND) }
+ -0.5, -35mA,
+ 0, 0,
+ 1.0, 60mA,
+ 1.6, 75mA,
+ 2.0, 80mA,
+ 3.0, 85mA,
+ 5.5, 86mA,
X2 DGND A VHCT_CLAMP
N1 A DGND_OL DPWR_OH DIN74VHCT04 DGTLNET=D IO_AC_DTOA
C1 A DGND {CAPACITANCE+0.01pF}
R1 A DGND 1G
.ends

4. All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
.subckt VHCT_Clamp A C
G_Clamp A C TABLE { V(A,C) }
+ 0.0, 2uA
+ 0.5, 1mA
+ 5.5, 1A
.ends
.model DO74VHCT04 doutput (
+ s0name="X" s0vlo=0.799 s0vhi=2.0
+ s1name="0" s1vlo=-1.5 s1vhi=0.799
+ s2name="R" s2vlo=0.799 s2vhi=1.55
+ s3name="R" s3vlo=1.45 s3vhi=2.0
+ s4name="X" s4vlo=0.799 s4vhi=2.0
+ s5name="1" s5vlo=2.0 s5vhi=7.0
+ s6name="F" s6vlo=1.45 s6vhi=2.0
+ s7name="F" s7vlo=0.799 s7vhi=1.55
+ )
.model DO74VHCT04_NX doutput (
+ s0name="0" s0vlo=-1.5 s0vhi=1.5
+ s2name="1" s2vlo=1.5 s2vhi=7.0
+ )
.model DIN74VHCT04 dinput (
+ s0name="0" s0tsw=0.7ns s0rlo=1.0 s0rhi=500K
+ s1name="1" s1tsw=0.7ns s1rlo=100K s1rhi=1
+ s2name="X" s2tsw=0.7ns s2rlo=104 s2rhi=100
+ s3name="R" s3tsw=0.7ns s3rlo=104 s3rhi=100
+ s4name="F" s4tsw=0.7ns s4rlo=104 s4rhi=100
+ s5name="Z" s5tsw=0.7ns s5rlo=200K s5rhi=200K
+ )
.MODEL IO_AC_DTOA UIO()
*$

5. All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
Truth Table
Circuit simulation result
Evaluation circuit
Comparison table
Input Output
An Yn (Measurement) Yn (Simulation)
%Error
L H H 0
TimeTime
0s 0.5us 1.0us
U1:1A
U1:2A
U1:3A
U1:4A
U1:5A
U1:6A
Y1
Y2
Y3
Y4
Y5
Y6
0
0
0
0
0
0
1
1
1
1
1
1
LO
0
LO
Y4
LO
LO
Y1
LOY3
R1
1MEG
Y2
Y5
1Y
1A
4A
VCC
5A2Y
3A
6A
6Y
3Y
4Y
5Y
GND
2A
U1
74VHCT04
V1
5
Y6
LO

6. All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
Truth Table
Circuit simulation result
Evaluation circuit
Comparison table
Input Output
An Yn (Measurement) Yn (Simulation)
%Error
H L L 0
TimeTime
0s 0.5us 1.0us
U1:1A
U1:2A
U1:3A
U1:4A
U1:5A
U1:6A
Y1
Y2
Y3
Y4
Y5
Y6
1
1
1
1
1
1
0
0
0
0
0
0
V1
5
HI
R1
1MEG
1Y
1A
4A
VCC
5A2Y
3A
6A
6Y
3Y
4Y
5Y
GND
2A
U1
74VHCT04
HI
HI
Y5
Y3
0
HI
HI
Y4
Y6
HI
Y2
Y1

7. All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
High Level and Low Level Input Voltage
Circuit simulation result
Evaluation circuit
Comparison table
VCC = 5V Measurement Simulation %Error
VIH (V) 2 2 0
VIL (V) 0.8 0.799235 -0.096
Time
0s 1.0ms 2.0ms 3.0ms 4.0ms
V(R1:2) V(V1:+)
0V
2.5V
5.0V
Output
Input
V1
TD = 0.5m
TF = 0.1m
PW = 1m
PER = 2m
V1 = 0
TR = 0.1m
V2 = 5
1Y
1A
4A
VCC
5A2Y
3A
6A
6Y
3Y
4Y
5Y
GND
2A
U1
74VHCT04
V2
5
0
R1
1MEG

8. All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
High Level and Low Level Output Voltage
Circuit simulation result
Evaluation circuit
Comparison table
VCC = 4.5V Measurement Simulation %Error
VOH (V) 4.5 4.4988 -0.027
VOL (V) 0 0 0
Time
0s 5ms 10ms
V(V1:+)
0V
2.5V
5.0V
SEL>>
V(R1:1)
0V
2.5V
5.0V
Output
Input
0
R1
1MEG
V1
TD = 0.5m
TF = 3n
PW = 1m
PER = 2m
V1 = 0
TR = 3n
V2 = 4.5
1Y
1A
4A
VCC
5A2Y
3A
6A
6Y
3Y
4Y
5Y
GND
2A
U1
74VHCT04
V2
4.5

9. All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
Propagation Delay Time
Circuit simulation result
Evaluation circuit
Comparison table
CL=15 pF,VCC=5 V,Tr=Tf=3 ns Measurement Simulation %Error
tpLH (ns) 4.7 4.7416 0.885
tpHL (ns) 4.7 4.7743 1.581
Time
0s 50ns 100ns
V(C1:1) V(V1:+)
0V
2.5V
5.0V
Output
Input
0
V2
5
V1
TD = 10n
TF = 3n
PW = 50n
PER = 100n
V1 = 0
TR = 3n
V2 = 5
C1
15p
1Y
1A
4A
VCC
5A2Y
3A
6A
6Y
3Y
4Y
5Y
GND
2A
U1
74VHCT04