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Device Modeling of SRQ Flip Flop using PSpice
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Tsuyoshi Horigome
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Device Modeling of SRQ Flip Flop using PSpice
1.
IC Modeling Device Modeling
of SRQ Flip Flop Using PSpice 14OCT2014 Bee Technologies Inc Tsuyoshi Horigome
2.
Equivalent Circuit R1 10 R2 100MEG R3 100MEG 00 SRQ_Flip_Flop_R SRQ_Flip_Flop_S IN+ IN- OUT+ OUT- E1 if ((V(SRQ_Flip_Flop_S)>4
& V(SRQ_Flip_Flop_R)<1),5,(if ((V(SRQ_Flip_Flop_S)<1 & V(SRQ_Flip_Flop_R)>4),0,V(SRQ_Flip_Flop_Q)))) EVALUE 0 C1 10p IC = 0 1 SRQ_Flip_Flop_Q R4 1 0 SRQ Flip Flop V1 TD = 0 TF = 10u PW = 10n PER = 20.01u V1 = 0 TR = 10u V2 = 5 V2 TD = 10u TF = 10u PW = 10n PER = 20.01u V1 = 0 TR = 10u V2 = 5 00 V V V
3.
Simulation Input Output
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