SlideShare a Scribd company logo
1 of 16
Conversion and Coding
(12)10
Conversion and Coding
(12)10
1100Conversion
Conversion and Coding
(12)10
1100Conversion 00010010
Coding
(using BCD code
for each digit)
BCD Adder
Design a circuit that calculates the
Arithmetic addition of two decimal digits.
9
3
2
+
1
carry
BCD Adder
 Maximum sum is 9+9 + 1 = 19
Max digit Carry from previous digits
BCD adder (sum up to 9)
Number C S8 S4 S2 S1
0 0 0 0 0 0
1 0 0 0 0 1
2 0 0 0 1 0
3 0 0 0 1 1
4 0 0 1 0 0
5 0 0 1 0 1
6 0 0 1 1 0
7 0 0 1 1 1
8 0 1 0 0 0
9 0 1 0 0 1
BCD adder (sum up to 9)
Number C S8 S4 S2 S1
0 0 0 0 0 0
1 0 0 0 0 1
2 0 0 0 1 0
3 0 0 0 1 1
4 0 0 1 0 0
5 0 0 1 0 1
6 0 0 1 1 0
7 0 0 1 1 1
8 0 1 0 0 0
9 0 1 0 0 1
The sum is the same with BCD adder
BCD adder (sum is 10 to 19)
Number C S8 S4 S2 S1
10 1 0 0 0 0
11 1 0 0 0 1
12 1 0 0 1 0
13 1 0 0 1 1
14 1 0 1 0 0
15 1 0 1 0 1
16 1 0 1 1 0
17 1 0 1 1 1
18 1 1 0 0 0
19 1 1 0 0 1
BCD adder (sum is 10 to 19)
Number
C S8 S4 S2 S1
10 1 0 0 0 0
11 1 0 0 0 1
12 1 0 0 1 0
13 1 0 0 1 1
14 1 0 1 0 0
15 1 0 1 0 1
16 1 0 1 1 0
17 1 0 1 1 1
18 1 1 0 0 0
19 1 1 0 0 1
K Z8 Z4 Z2 Z1
0 1 0 1 0
0 1 0 1 1
0 1 1 0 0
0 1 1 0 1
0 1 1 1 0
0 1 1 1 1
1 0 0 0 0
1 0 0 0 1
1 0 0 1 0
1 0 0 1 1
Binary sumBCD adder sum
BCD adder (sum is 10 to 19)
Number
C S8 S4 S2 S1
10 1 0 0 0 0
11 1 0 0 0 1
12 1 0 0 1 0
13 1 0 0 1 1
14 1 0 1 0 0
15 1 0 1 0 1
16 1 0 1 1 0
17 1 0 1 1 1
18 1 1 0 0 0
19 1 1 0 0 1
K Z8 Z4 Z2 Z1
0 1 0 1 0
0 1 0 1 1
0 1 1 0 0
0 1 1 0 1
0 1 1 1 0
0 1 1 1 1
1 0 0 0 0
1 0 0 0 1
1 0 0 1 0
1 0 0 1 1
Binary sumBCD adder sum
BCD adder (sum is 10 to 19)
Number
C S8 S4 S2 S1
10 1 0 0 0 0
11 1 0 0 0 1
12 1 0 0 1 0
13 1 0 0 1 1
14 1 0 1 0 0
15 1 0 1 0 1
16 1 0 1 1 0
17 1 0 1 1 1
18 1 1 0 0 0
19 1 1 0 0 1
K Z8 Z4 Z2 Z1
0 1 0 1 0
0 1 0 1 1
0 1 1 0 0
0 1 1 0 1
0 1 1 1 0
0 1 1 1 1
1 0 0 0 0
1 0 0 0 1
1 0 0 1 0
1 0 0 1 1
Binary sumBCD adder sum
+6
Algorithm for BCD Adder
 If sum is up to 9
 Use the regular Adder.
 If the sum > 9
 Use the regular adder and add 6 to the
result
When is the result > 9
Number
K Z8 Z4 Z2 Z1
10 0 1 0 1 0
11 0 1 0 1 1
12 0 1 1 0 0
13 0 1 1 0 1
14 0 1 1 1 0
15 0 1 1 1 1
16 1 0 0 0 0
17 1 0 0 0 1
18 1 0 0 1 0
19 1 0 0 1 1
Binary sum
C = K +
When is the result > 9
Number
K Z8 Z4 Z2 Z1
10 0 1 0 1 0
11 0 1 0 1 1
12 0 1 1 0 0
13 0 1 1 0 1
14 0 1 1 1 0
15 0 1 1 1 1
16 1 0 0 0 0
17 1 0 0 0 1
18 1 0 0 1 0
19 1 0 0 1 1
Binary sum
C = K + Z8*Z4+
When is the result > 9
Number
K Z8 Z4 Z2 Z1
10 0 1 0 1 0
11 0 1 0 1 1
12 0 1 1 0 0
13 0 1 1 0 1
14 0 1 1 1 0
15 0 1 1 1 1
16 1 0 0 0 0
17 1 0 0 0 1
18 1 0 0 1 0
19 1 0 0 1 1
Binary sum
C = K + Z8*Z4+
Z8*Z2
BCD Adder
4-bit Adder
4-bit Adder
0 0
z8 z4 z2 z1
s8 s4 s2 s1
Cin
K

More Related Content

Similar to Tirgul7

Chapter 4 combinational_logic
Chapter 4 combinational_logicChapter 4 combinational_logic
Chapter 4 combinational_logicCh Farhan
 
Lecture5 Chapter4- Design Decimal Adder and Binary Multiplier Circuits.pdf
Lecture5 Chapter4- Design Decimal Adder and Binary Multiplier Circuits.pdfLecture5 Chapter4- Design Decimal Adder and Binary Multiplier Circuits.pdf
Lecture5 Chapter4- Design Decimal Adder and Binary Multiplier Circuits.pdfUmerKhan147799
 
11-PLDs.pdf
11-PLDs.pdf11-PLDs.pdf
11-PLDs.pdfKoayFT
 
unit-i-number-systems.pdf
unit-i-number-systems.pdfunit-i-number-systems.pdf
unit-i-number-systems.pdfRameshK531901
 
Decoder for digital electronics
Decoder for digital electronicsDecoder for digital electronics
Decoder for digital electronicsIIT, KANPUR INDIA
 
Decoder for digital electronics
Decoder for digital electronicsDecoder for digital electronics
Decoder for digital electronicsKamil Hussain
 
Seven segment display
Seven segment display Seven segment display
Seven segment display SalmaAkter37
 
Lecture 18 M - Copy.pptx
Lecture 18 M - Copy.pptxLecture 18 M - Copy.pptx
Lecture 18 M - Copy.pptxAzeenShahid
 
Digital and Logic Design Chapter 1 binary_systems
Digital and Logic Design Chapter 1 binary_systemsDigital and Logic Design Chapter 1 binary_systems
Digital and Logic Design Chapter 1 binary_systemsImran Waris
 
Lec11 Intro to Computer Engineering by Hsien-Hsin Sean Lee Georgia Tech -- De...
Lec11 Intro to Computer Engineering by Hsien-Hsin Sean Lee Georgia Tech -- De...Lec11 Intro to Computer Engineering by Hsien-Hsin Sean Lee Georgia Tech -- De...
Lec11 Intro to Computer Engineering by Hsien-Hsin Sean Lee Georgia Tech -- De...Hsien-Hsin Sean Lee, Ph.D.
 
Circuitos Digitales - Circuito Digital Sumador
Circuitos Digitales - Circuito Digital SumadorCircuitos Digitales - Circuito Digital Sumador
Circuitos Digitales - Circuito Digital SumadorFernando Marcos Marcos
 
sequential circuit that encodes a hexadecimal 16-key keypad output to 4 – bit...
sequential circuit that encodes a hexadecimal 16-key keypad output to 4 – bit...sequential circuit that encodes a hexadecimal 16-key keypad output to 4 – bit...
sequential circuit that encodes a hexadecimal 16-key keypad output to 4 – bit...Gautham Reddy
 
Combinational logic 1
Combinational logic 1Combinational logic 1
Combinational logic 1Heman Pathak
 
Electrónica digital: Display de 7 segmentos con compuertas lógicas
Electrónica digital: Display de 7 segmentos con compuertas lógicasElectrónica digital: Display de 7 segmentos con compuertas lógicas
Electrónica digital: Display de 7 segmentos con compuertas lógicasSANTIAGO PABLO ALBERTO
 
Ece 301 lecture 2 - number systems and codes
Ece 301   lecture 2 - number systems and codesEce 301   lecture 2 - number systems and codes
Ece 301 lecture 2 - number systems and codesXiaolong Fang
 

Similar to Tirgul7 (20)

Unit 2.pptx
Unit 2.pptxUnit 2.pptx
Unit 2.pptx
 
Chapter 4 combinational_logic
Chapter 4 combinational_logicChapter 4 combinational_logic
Chapter 4 combinational_logic
 
Lecture5 Chapter4- Design Decimal Adder and Binary Multiplier Circuits.pdf
Lecture5 Chapter4- Design Decimal Adder and Binary Multiplier Circuits.pdfLecture5 Chapter4- Design Decimal Adder and Binary Multiplier Circuits.pdf
Lecture5 Chapter4- Design Decimal Adder and Binary Multiplier Circuits.pdf
 
11-PLDs.pdf
11-PLDs.pdf11-PLDs.pdf
11-PLDs.pdf
 
DESIGN OF COMBINATIONAL LOGIC
DESIGN OF COMBINATIONAL LOGICDESIGN OF COMBINATIONAL LOGIC
DESIGN OF COMBINATIONAL LOGIC
 
Number codes
Number codesNumber codes
Number codes
 
unit-i-number-systems.pdf
unit-i-number-systems.pdfunit-i-number-systems.pdf
unit-i-number-systems.pdf
 
Decoder for digital electronics
Decoder for digital electronicsDecoder for digital electronics
Decoder for digital electronics
 
Decoder for digital electronics
Decoder for digital electronicsDecoder for digital electronics
Decoder for digital electronics
 
Seven segment display
Seven segment display Seven segment display
Seven segment display
 
Lecture 18 M - Copy.pptx
Lecture 18 M - Copy.pptxLecture 18 M - Copy.pptx
Lecture 18 M - Copy.pptx
 
Digital Electronics Codes.pdf
Digital Electronics Codes.pdfDigital Electronics Codes.pdf
Digital Electronics Codes.pdf
 
Digital and Logic Design Chapter 1 binary_systems
Digital and Logic Design Chapter 1 binary_systemsDigital and Logic Design Chapter 1 binary_systems
Digital and Logic Design Chapter 1 binary_systems
 
Lec11 Intro to Computer Engineering by Hsien-Hsin Sean Lee Georgia Tech -- De...
Lec11 Intro to Computer Engineering by Hsien-Hsin Sean Lee Georgia Tech -- De...Lec11 Intro to Computer Engineering by Hsien-Hsin Sean Lee Georgia Tech -- De...
Lec11 Intro to Computer Engineering by Hsien-Hsin Sean Lee Georgia Tech -- De...
 
Circuitos Digitales - Circuito Digital Sumador
Circuitos Digitales - Circuito Digital SumadorCircuitos Digitales - Circuito Digital Sumador
Circuitos Digitales - Circuito Digital Sumador
 
sequential circuit that encodes a hexadecimal 16-key keypad output to 4 – bit...
sequential circuit that encodes a hexadecimal 16-key keypad output to 4 – bit...sequential circuit that encodes a hexadecimal 16-key keypad output to 4 – bit...
sequential circuit that encodes a hexadecimal 16-key keypad output to 4 – bit...
 
Combinational logic 1
Combinational logic 1Combinational logic 1
Combinational logic 1
 
Electrónica digital: Display de 7 segmentos con compuertas lógicas
Electrónica digital: Display de 7 segmentos con compuertas lógicasElectrónica digital: Display de 7 segmentos con compuertas lógicas
Electrónica digital: Display de 7 segmentos con compuertas lógicas
 
Decimal adder
Decimal adderDecimal adder
Decimal adder
 
Ece 301 lecture 2 - number systems and codes
Ece 301   lecture 2 - number systems and codesEce 301   lecture 2 - number systems and codes
Ece 301 lecture 2 - number systems and codes
 

Tirgul7

  • 3. Conversion and Coding (12)10 1100Conversion 00010010 Coding (using BCD code for each digit)
  • 4. BCD Adder Design a circuit that calculates the Arithmetic addition of two decimal digits. 9 3 2 + 1 carry
  • 5. BCD Adder  Maximum sum is 9+9 + 1 = 19 Max digit Carry from previous digits
  • 6. BCD adder (sum up to 9) Number C S8 S4 S2 S1 0 0 0 0 0 0 1 0 0 0 0 1 2 0 0 0 1 0 3 0 0 0 1 1 4 0 0 1 0 0 5 0 0 1 0 1 6 0 0 1 1 0 7 0 0 1 1 1 8 0 1 0 0 0 9 0 1 0 0 1
  • 7. BCD adder (sum up to 9) Number C S8 S4 S2 S1 0 0 0 0 0 0 1 0 0 0 0 1 2 0 0 0 1 0 3 0 0 0 1 1 4 0 0 1 0 0 5 0 0 1 0 1 6 0 0 1 1 0 7 0 0 1 1 1 8 0 1 0 0 0 9 0 1 0 0 1 The sum is the same with BCD adder
  • 8. BCD adder (sum is 10 to 19) Number C S8 S4 S2 S1 10 1 0 0 0 0 11 1 0 0 0 1 12 1 0 0 1 0 13 1 0 0 1 1 14 1 0 1 0 0 15 1 0 1 0 1 16 1 0 1 1 0 17 1 0 1 1 1 18 1 1 0 0 0 19 1 1 0 0 1
  • 9. BCD adder (sum is 10 to 19) Number C S8 S4 S2 S1 10 1 0 0 0 0 11 1 0 0 0 1 12 1 0 0 1 0 13 1 0 0 1 1 14 1 0 1 0 0 15 1 0 1 0 1 16 1 0 1 1 0 17 1 0 1 1 1 18 1 1 0 0 0 19 1 1 0 0 1 K Z8 Z4 Z2 Z1 0 1 0 1 0 0 1 0 1 1 0 1 1 0 0 0 1 1 0 1 0 1 1 1 0 0 1 1 1 1 1 0 0 0 0 1 0 0 0 1 1 0 0 1 0 1 0 0 1 1 Binary sumBCD adder sum
  • 10. BCD adder (sum is 10 to 19) Number C S8 S4 S2 S1 10 1 0 0 0 0 11 1 0 0 0 1 12 1 0 0 1 0 13 1 0 0 1 1 14 1 0 1 0 0 15 1 0 1 0 1 16 1 0 1 1 0 17 1 0 1 1 1 18 1 1 0 0 0 19 1 1 0 0 1 K Z8 Z4 Z2 Z1 0 1 0 1 0 0 1 0 1 1 0 1 1 0 0 0 1 1 0 1 0 1 1 1 0 0 1 1 1 1 1 0 0 0 0 1 0 0 0 1 1 0 0 1 0 1 0 0 1 1 Binary sumBCD adder sum
  • 11. BCD adder (sum is 10 to 19) Number C S8 S4 S2 S1 10 1 0 0 0 0 11 1 0 0 0 1 12 1 0 0 1 0 13 1 0 0 1 1 14 1 0 1 0 0 15 1 0 1 0 1 16 1 0 1 1 0 17 1 0 1 1 1 18 1 1 0 0 0 19 1 1 0 0 1 K Z8 Z4 Z2 Z1 0 1 0 1 0 0 1 0 1 1 0 1 1 0 0 0 1 1 0 1 0 1 1 1 0 0 1 1 1 1 1 0 0 0 0 1 0 0 0 1 1 0 0 1 0 1 0 0 1 1 Binary sumBCD adder sum +6
  • 12. Algorithm for BCD Adder  If sum is up to 9  Use the regular Adder.  If the sum > 9  Use the regular adder and add 6 to the result
  • 13. When is the result > 9 Number K Z8 Z4 Z2 Z1 10 0 1 0 1 0 11 0 1 0 1 1 12 0 1 1 0 0 13 0 1 1 0 1 14 0 1 1 1 0 15 0 1 1 1 1 16 1 0 0 0 0 17 1 0 0 0 1 18 1 0 0 1 0 19 1 0 0 1 1 Binary sum C = K +
  • 14. When is the result > 9 Number K Z8 Z4 Z2 Z1 10 0 1 0 1 0 11 0 1 0 1 1 12 0 1 1 0 0 13 0 1 1 0 1 14 0 1 1 1 0 15 0 1 1 1 1 16 1 0 0 0 0 17 1 0 0 0 1 18 1 0 0 1 0 19 1 0 0 1 1 Binary sum C = K + Z8*Z4+
  • 15. When is the result > 9 Number K Z8 Z4 Z2 Z1 10 0 1 0 1 0 11 0 1 0 1 1 12 0 1 1 0 0 13 0 1 1 0 1 14 0 1 1 1 0 15 0 1 1 1 1 16 1 0 0 0 0 17 1 0 0 0 1 18 1 0 0 1 0 19 1 0 0 1 1 Binary sum C = K + Z8*Z4+ Z8*Z2
  • 16. BCD Adder 4-bit Adder 4-bit Adder 0 0 z8 z4 z2 z1 s8 s4 s2 s1 Cin K