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Head office: 3nd floor, Krishna Reddy Buildings, OPP: ICICI ATM, Ramalingapuram, Nellore
www.pvrtechnology.com, E-Mail: pvrieeeprojects@gmail.com, Ph: 81432 71457
Design and Analysis of Approximate Compressors for Multiplication
Abstract:
Inexact (or approximate) computing is an attractive paradigm for digital processing at
Nano metric scales. Inexact computing is particularly interesting for computer arithmetic
designs. This paper deals with the analysis and design of two new approximate 4-2 compressors
for utilization in a multiplier. These designs rely on different features of compression, such that
imprecision in computation (as measured by the error rate and the so-called normalized error
distance) can meet with respect to circuit-based figures of merit of a design (number of
transistors, delay and power consumption). Four different schemes for utilizing the proposed
approximate compressors are proposed and analyzed for a Dadda multiplier. Extensive
simulation results are provided and an application of the approximate multipliers to image
processing is presented. The results show that the proposed designs accomplish significant
reductions in power dissipation, delay and transistor count compared to an exact design;
moreover, two of the proposed multiplier designs provide excellent capabilities for image
multiplication with respect to average normalized error distance and peak signal-to-noise ratio
(more than 50dB for the considered image examples).
Existing Method:
Many applications such as in multimedia and image processing can tolerate errors and
imprecision in computation and still produce meaningful and useful results. Accurate and precise
models and algorithms are not always suitable or efficient for use in these applications. The
Head office: 3nd floor, Krishna Reddy Buildings, OPP: ICICI ATM, Ramalingapuram, Nellore
www.pvrtechnology.com, E-Mail: pvrieeeprojects@gmail.com, Ph: 81432 71457
paradigm of inexact computation relies on relaxing fully precise and completely deterministic
building modules for each input to a circuit, the error distance (ED) is defined as the arithmetic
distance between an erroneous output and the correct one. The mean error distance (MED) and
normalized error distance (NED) are proposed by considering the averaging effect of multiple
inputs and the normalization of multiple-bit adders. The tradeoff between precision and power
has also been quantitatively evaluated.The design of approximate multipliers has received less
attention. Multiplication can be thought as the repeated sum of partial products; however, the
straightforward application of approximate adders when designing an approximate multiplier is
not viable, because it would be very inefficient in terms of precision, hardware complexity and
other performance metrics.
Several approximate multipliers have been proposed. Most of these designs use a
truncated multiplication method; they estimate the least significant columns of the partial
products as a constant.an imprecise array multiplier is used for neural network applications by
omitting some of the least significant bits in the partial products (and thus removing some adders
in the array).
ProposedMethod:
In this paper, two novel approximate 4-2 compressors are proposed and analyzed. It is
shown that these simplified compressors have better delay and power consumption than the
optimized (exact) 4-2 compressor designs found in the technical literature [8]. These
approximate compressors are then used in the restoration module of a Dadda multiplier; four
different schemes are proposed for inexact multiplication. Extensive simulation results are
provided at circuit-level for figures of merit, such as delay, transistor count, power dissipation.
Head office: 3nd floor, Krishna Reddy Buildings, OPP: ICICI ATM, Ramalingapuram, Nellore
www.pvrtechnology.com, E-Mail: pvrieeeprojects@gmail.com, Ph: 81432 71457
Applications:
1. Digital Signal Processing.
2. Multimedia and
3. Image Processing.
System Configuration:-
In the hardware part a normal computer where Xilinx ISE 14.3 software can be easily
operated is required, i.e., with a minimum system configuration
HARDWARE REQUIREMENT
Processor - Pentium ā€“III
Speed - 1.1 GHz
RAM - 1 GB (min)
Hard Disk - 40 GB
Floppy Drive - 1.44 MB
Key Board - Standard Windows Keyboard
Head office: 3nd floor, Krishna Reddy Buildings, OPP: ICICI ATM, Ramalingapuram, Nellore
www.pvrtechnology.com, E-Mail: pvrieeeprojects@gmail.com, Ph: 81432 71457
Mouse - Two or Three Button Mouse
Monitor - SVGA
SOFTWARE REQUIREMENTS
ļ¶ Operating System :Windows95/98/2000/XP/Windows7
ļ¶ Front End : Modelsim 6.3 for Debugging and Xilinx 14.3 for
Synthesis and Hard Ware Implementation
ļ¶ This softwareā€™s where Verilog source code can be used for design
implementation.

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12.design and analysis of approximate compressors for multiplication

  • 1. Head office: 3nd floor, Krishna Reddy Buildings, OPP: ICICI ATM, Ramalingapuram, Nellore www.pvrtechnology.com, E-Mail: pvrieeeprojects@gmail.com, Ph: 81432 71457 Design and Analysis of Approximate Compressors for Multiplication Abstract: Inexact (or approximate) computing is an attractive paradigm for digital processing at Nano metric scales. Inexact computing is particularly interesting for computer arithmetic designs. This paper deals with the analysis and design of two new approximate 4-2 compressors for utilization in a multiplier. These designs rely on different features of compression, such that imprecision in computation (as measured by the error rate and the so-called normalized error distance) can meet with respect to circuit-based figures of merit of a design (number of transistors, delay and power consumption). Four different schemes for utilizing the proposed approximate compressors are proposed and analyzed for a Dadda multiplier. Extensive simulation results are provided and an application of the approximate multipliers to image processing is presented. The results show that the proposed designs accomplish significant reductions in power dissipation, delay and transistor count compared to an exact design; moreover, two of the proposed multiplier designs provide excellent capabilities for image multiplication with respect to average normalized error distance and peak signal-to-noise ratio (more than 50dB for the considered image examples). Existing Method: Many applications such as in multimedia and image processing can tolerate errors and imprecision in computation and still produce meaningful and useful results. Accurate and precise models and algorithms are not always suitable or efficient for use in these applications. The
  • 2. Head office: 3nd floor, Krishna Reddy Buildings, OPP: ICICI ATM, Ramalingapuram, Nellore www.pvrtechnology.com, E-Mail: pvrieeeprojects@gmail.com, Ph: 81432 71457 paradigm of inexact computation relies on relaxing fully precise and completely deterministic building modules for each input to a circuit, the error distance (ED) is defined as the arithmetic distance between an erroneous output and the correct one. The mean error distance (MED) and normalized error distance (NED) are proposed by considering the averaging effect of multiple inputs and the normalization of multiple-bit adders. The tradeoff between precision and power has also been quantitatively evaluated.The design of approximate multipliers has received less attention. Multiplication can be thought as the repeated sum of partial products; however, the straightforward application of approximate adders when designing an approximate multiplier is not viable, because it would be very inefficient in terms of precision, hardware complexity and other performance metrics. Several approximate multipliers have been proposed. Most of these designs use a truncated multiplication method; they estimate the least significant columns of the partial products as a constant.an imprecise array multiplier is used for neural network applications by omitting some of the least significant bits in the partial products (and thus removing some adders in the array). ProposedMethod: In this paper, two novel approximate 4-2 compressors are proposed and analyzed. It is shown that these simplified compressors have better delay and power consumption than the optimized (exact) 4-2 compressor designs found in the technical literature [8]. These approximate compressors are then used in the restoration module of a Dadda multiplier; four different schemes are proposed for inexact multiplication. Extensive simulation results are provided at circuit-level for figures of merit, such as delay, transistor count, power dissipation.
  • 3. Head office: 3nd floor, Krishna Reddy Buildings, OPP: ICICI ATM, Ramalingapuram, Nellore www.pvrtechnology.com, E-Mail: pvrieeeprojects@gmail.com, Ph: 81432 71457 Applications: 1. Digital Signal Processing. 2. Multimedia and 3. Image Processing. System Configuration:- In the hardware part a normal computer where Xilinx ISE 14.3 software can be easily operated is required, i.e., with a minimum system configuration HARDWARE REQUIREMENT Processor - Pentium ā€“III Speed - 1.1 GHz RAM - 1 GB (min) Hard Disk - 40 GB Floppy Drive - 1.44 MB Key Board - Standard Windows Keyboard
  • 4. Head office: 3nd floor, Krishna Reddy Buildings, OPP: ICICI ATM, Ramalingapuram, Nellore www.pvrtechnology.com, E-Mail: pvrieeeprojects@gmail.com, Ph: 81432 71457 Mouse - Two or Three Button Mouse Monitor - SVGA SOFTWARE REQUIREMENTS ļ¶ Operating System :Windows95/98/2000/XP/Windows7 ļ¶ Front End : Modelsim 6.3 for Debugging and Xilinx 14.3 for Synthesis and Hard Ware Implementation ļ¶ This softwareā€™s where Verilog source code can be used for design implementation.