1. Parag Waradkar iparag23@outlook.com
(Currently working with SiconTech Ltd.) +91-9886774323
CAREER PROFILE
Experience
4.5 year of experience in Post Silicon validation and Software development.
Educational Qualification
Post Graduate Diploma: Completed Diploma In Embedded Systems from C-DAC, Bangalore.
Bachelor’s Degree: Completed B.E. from Kolhapur Inst.of Technology, Kolhapur, Maharashtra
Shivaji University, Maharashtra.
PROFESSIONAL SUMMARY
• Over 4 years of experience in Embedded Sector on SoC Validation & Software development.
• Experience in programming & development in C.
• Worked on driver & Test case development in DDR Controller Validation, which included
validating main DDR control unit & other control units in data transaction flow.
• Comprehensive understanding of JESD209-2B JEDEC standard & DDR memory controller.
• Worked on Coverage Analysis for Intel Atom core silicon. Validating different scenarios using
custom events. Each scenario is designed so as to cover all the functionalities about specific
units in SoC.
• Hands on experience on Logic analyzer & Oscilloscope & debugger tools.
TECHNICAL SKILLS
Processors ARM, x86
Programming Languages C, Assembly
Tools JTAG Trace-32 debugger, ITP ICD (Intel proprietary Debugger)
Scripting Trace-32 Script language
Debug Tools Logic Analyzer, Oscilloscope
ACADEMICS
Course/class College/school University/Board
DESD C-DAC C-DAC
Bachelor of Engineering KIT, Kolhapur Shivaji University, Maharashtra
Diploma G.O.V.T. Polytechnic, Kolhapur G.O.V.T. Polytechnic
Class X Lohiya High school, Kolhapur Maharashtra Board

2. EXPERIENCE
Qualcomm SoC Validation
Organization : SiconTech Ltd, Bangalore
Client : Qualcomm BDC, Bangalore
Technologies : LPDDR, PCDDR, C
Tools : TRACE-32 Debugger, Oscilloscope
Team Size : VI-DDR (6)
Rôle : Validation Engineer
Duration : March 2014 to till date
Project Description : Qualcomm BDC works on 3 major SoC types : MSM, Modem &
automotive SoC. VI validâtes each block in SoC for all supported functionalities. Developing
various test scenarios in order to find hardware anomalities.
Role and Contribution:
 Develop/Update DDR controller Init driver & APIs for application support.
 Validate DDR controller across various basic functionality tests.
 Validate DDR controller & vendor specific DDR devices across stress tests.
 Debug issues observed during validation phase.
 Performance measurement by means of IP specific events.
 Work with all DDR related teams during product evaluation phase.

Intel Post-Si coverage analysis
Organization : Mindtree Limited, Bangalore
Client : Intel Technology India Pvt. Ltd.
Environment : C, Linux, Embedded OS: eCos (FIST) - A Customized RTOS for
System Validation
Tools : ITP ICD, Logic analyzer
Team Size : Coverage analysis team (7)
Role : Team Member
Duration : Nov 2012 to Oct 2013
Project Description : Cover the performance evaluation. Verify system validation
process by specific scenarios & corner cases by means of test events for individual blocks in
SoC.
Role and Contribution:
 Coverage analysis development.
 Create RTL event emphasizing certain activity & analyse it over different test
scenarios & standardise the same.
 Perform concurrency evaluation for each SoC stepping.
 Debug issues observed during coverage analysis.

3. Post Silicon Validation
Organization : Mindtree Limited, Bangalore
Client : Intel Technology India Pvt. Ltd. (Bangalore)
Environment : C, Linux
Tools : ITP ICD
Team Size : AVE-DDR (4)
Role : Validation Engineer
Duration : Oct 2011 to Nov 2012
Project Description : The goal of this project is to validate different Intel SoCs based
on ATOM core. These SoCs are designed to target mobile and tablet devices and consist of
Intel core(s) along with various IPs developed by Intel as well as provided by third parties.
Role and Contribution
 Enhance the existing driver/libraries to improve the validation process and to add extra
coverage.
 Analysis the logs, find bugs and provide fix.
 Review the code, find any defects and check-in the code.
Kyocera phone development
Organization : Mindtree Wireless Ltd.
Environment : C
Team Size : 7
Role : Team Member
Duration : Sept 2010 to Oct 2011
Project Description : Kyocera phone development project consists of development &
maintenance of complete phone software. All phones are based on SoCs designed by
qualcomm.
Role and Contribution:
 Analyze the complexity of requirement & provide solution.
 Analyze the logs, find bugs & provide fixes.
 Review the code & find any defects.
 System development, integration & testing.
PERSONAL DETAILS
Sex MALE
Father’s Name Mr. VASUDEO WARADKAR
Nationality INDIAN
Marital Status SINGLE