2. Series Fed Class A Amplifier
• The β of a power transistor is
generally less than 100, the
overall amplifier circuit using
power transistor that are
capable of handling power or
current while not providing
much voltage gain.
• DC bias operation:
• VCC = IBRB +VBE
• IC = βIB
• VCC = VCE +ICRC
3. Series Fed Class A Amplifier
• The largest collector
swing will be possible if
Q point is set at mid of
the dc load line
4. General efficiency of Class A amplifier
• Pin (dc) = ICQVCC =
Vcc
2Rc
VCC
• (when Q-point is in centre of dc
load line)
• Pin (dc) =
V2
cc
2Rc
=
VCEmax+VCEmin 2
2Rc
Po(ac) =
V2
o(p−p)
2 2 2
Rc
=
VCE
2
(p−p)
2 2 2
Rc
=
VCEmax
−VCEmin
2
8Rc
5. General efficiency of Class A amplifier
• The general efficiency of Class A
Amplifier is
• % η =
Po(ac)
Pin(dc)
100%
= 25
VCEmax
−VCEmin
VCEmax
+VCEmin
2
%
For ideal case
VCEmax =VCC
VCEmin = 0
Then
% ηmax = 25 %
Then
% ηmax = 25 %
• Practically efficiency is 10 to 20
%.
6. Transformer coupled Class A amplifier
• Here R’L =(
𝑁1
𝑁2
)2RL = α2 RL
• α is called turn ratio of transformer
• Since VCE can’t be negative the
maximum permissible decrease in
VCE below its Q point value is VCEQ =
VCC.
• Thus the maximum possible peak
value of VCE form Q-point is VCC
volt.
• To achieve maximum peak to peak
o/p variation, the intercept of the
ac load line on the VCE axis should
therefore 2 VCC volts
7. Transformer coupled Class A amplifier
• The ICQ is selected so that the ac
load line a line having slope -
1/R’L, intersects the VCE axis at
2VCC volts.
• When ICQ is set for maximum
signal swing so that VCEmax =
2VCC, ICQ is one half of ICmax. That
is ICmax =2 ICQ
8. Maximum efficiency :
• Pin (dc) = VCCICQ
• Po(ac)max =
VCEp−pmax
2 2
ICp−pmax
2 2
• =
2VCC 2ICQ
8
• =
VCC ICQ
2
• % ηmax
= Po ac max
Pin(dc)
100%
• = 50 %
• The actual efficiency rating of a
transformer coupled class A
amplifier will generally be less
than 40%. Because
• VCEQ will always be some value
that is less than VCC
• Transformer is subject to various
power losses, couple losses and
hysteresis losses.
11. Class B Amplifier: General Efficiency
• Here,
• Idc/ Iavg =
𝐴𝑟𝑒𝑎 𝑢𝑛𝑑𝑒𝑟 𝑡ℎ𝑒 𝑐𝑢𝑟𝑣𝑒
𝑏𝑎𝑠𝑒
• =
1
π 0
π
𝐼𝑃𝑠𝑖𝑛ω𝑡 𝑑ω𝑡 =
2IP
π
• Pin(dc) = VccIdc = Vcc
2IP
π
• Po(ac) =
𝑉2
𝐿
(
𝑃
)
2𝑅𝐿
• % η =
Po(ac)
Pin(dc)
100%
• Taking IP =
𝑉𝐿
(
𝑃
)
𝑅𝐿
• % η =
VL
(
P
)
Vcc
78.5%
• For maximum efficiency
• VL(P) = VCC
• % ηmax = 78.5%
12. Condition for maximum Power dissipation:
• Power loss by class B amplifier/ Power
dissipation by transistors:
• PD(2Q) = Pi(dc) –Po(ac)
• =
2VccVLp
πRL
-
V2
LP
2RL
• Differentiating with respect to VLP
•
dPD
(
2Q
)
dVLP
=
2Vcc
πRL
-
VLP
RL
• for maximum loss
•
dPD
(
2Q
)
dVLP
= 0 =
2Vcc
πRL
-
VLP
RL
• VLP =
2Vcc
π
• Maximum loss /maximum power
dissipation: when VLP =
2Vcc
π
• Ploss max= PD(2Q)max =
2V2cc
π2𝑅𝐿
• Thus QN and QP must be capable of safely
dissipating
1
2
PD(2Q)max
Efficiency of class B Amp when maximum
power dissipation at transistors
% η =
VL
(
P
)
Vcc
78.5%
% ηmin =
0.6366VCC
Vcc
78.5% = 50%
when
VLP =
2Vcc
π
13. Condition for maximum Power dissipation:
• Power loss by class B amplifier/ Power
dissipation by transistors:
• PD(2Q) = Pi(dc) –Po(ac)
• =
2VccVLp
πRL
-
V2
LP
2RL
• Differentiating with respect to VLP
•
dPD
(
2Q
)
dVLP
=
2Vcc
πRL
-
VLP
RL
• for maximum loss
•
dPD
(
2Q
)
dVLP
= 0 =
2Vcc
πRL
-
VLP
RL
• VLP =
2Vcc
π
• Maximum loss /maximum power
dissipation: when VLP =
2Vcc
π
• Ploss max= PD(2Q)max =
2V2cc
π2𝑅𝐿
• Thus QN and QP must be capable of safely
dissipating
1
2
PD(2Q)max
Efficiency of class B Amp when maximum
power dissipation at transistors
% η =
VL
(
P
)
Vcc
78.5%
% η=
0.6366VCC
Vcc
78.5% = 50%
when
VLP =
2Vcc
π
15. Transformer coupled Push-pull class B amplifier
• The bases of 2 CE connected identical
transistor Q1 and Q2 have been
connected to the opposite ends of the
secondary of the input transformer
• Load RL is coupled to the collector
terminals of the 2 transistor through
output transformer T2
• During +ve half of i/p only Q1
conducts and o/p appears across the
load
• Similarly during –ve half of i/p only Q2
conducts and o/p appears across the
load.
16. Complementary –Symmetry Class B Push Pull
amplifier
• Requires match transistors
( ex : BC547, BC 557 ; BD 139, BD 140, etc)
Requires two separate voltage supplies.
Using kVL,
Vo = VCC- VCEN
Vo is maximum when VCEN = VCENsat
So, Vomax = VCC- VCENsat
Again using KVL,
Vin =VBEN+ Vo
For maximum Vo , its corresponding Vin is
=VCC-VCENsat+VBEN
In a similar manner, for Q2
Vomax= -VCC+VECPsat
And its corresponding Vin is
= -VCC+VECPsat-VEBP
17. Crossover distortion:
• Refers to the fact that during the
signal cross over from the +ve to –
ve (or vice versa) there is some
non-linearity in the o/p signal.
• This results from the fact that the
circuit does not provide exact
switching of one transistor OFF and
other ON at the zero- voltage
condition
• Both transistor may be partially OFF
so that the output voltage does not
follow the input around the zero
voltage condition.
• Biasing the transistor in Class AB
improves this operation by biasing
both transistor to be ON for more
than half a cycle.
19. Numerical:
• Calculate the efficiency of
transformer coupled push pull
power amplifier for a supply
voltage of 20 V and output of (i)
VP= 20 V and (ii) VP = 16 V
• Solution:
• First case:
• % η = 50
VCEmax
−VCEmin
VCEmax+VCEmin
2
%
• % η = 50%
• Second case :
• % η = 50
VCEmax−VCEmin
VCEmax+VCEmin
2
%
• % η = 32%
20. Numerical:
• For a class B amplifier providing
a 20V peak signal to a 16 Ω load
(speaker) and a power supply of
VCC = 30 V, determine the input
power, output power and circuit
efficiency
• Solution:
• Pin(dc) = Vcc
2𝐼𝑃
π
=23.9 W
• Ip =
𝑉𝐿𝑃
𝑅𝐿
=1.25 A
• Po(ac) =
𝑉2
𝐿𝑃
2𝑅𝐿
= 12.5 W
• %η =
𝑃𝑜(𝑎𝑐)
𝑃𝑖𝑛 𝑑𝑐
% =52.3%
21. Numerical:
• For a class B amplifier using a
supply of VCC = 30 V and driving a
load of 16 Ω, determine the
maximum input power, maximum
output power and maximum
transistor dissipation.
• Solution:
• For maximum case VP = VCC
• Pin(dc)max = Vcc
2𝐼𝑃
π
= 35.81 W
• Ip =
𝑉𝑃
𝑅𝐿
=1.8 A
• Po(ac)max =
𝑉2𝐿
2𝑅𝐿
= 28.11 W
• %ηmax =
𝑃𝑜(𝑎𝑐)
𝑃𝑖𝑛 𝑑𝑐
% = 78.5 %
• PD(2Q) = Pin(dc) – Po(ac) = 7.6 W
• Maximum transistor dissipation
• PD(2Q) max =
2V2cc
π2𝑅𝐿
= 11.3 W
22. Numerical:
• It is required to design a class B
output stage to deliver an average
power of 20 W to an 8 Ω load. The
power supply is to be selected such
that VCC is about 5 V greater than the
peak output voltage. This avoids
transistor saturation and associated
non linear distortion, and allows for
including short circuit protection
circuitry. Determine the supply
voltage required , the peak current
drawn from each supply , the total
supply power, and the power
conversion efficiency. Also determine
the maximum power that each
transistor must be able to dissipate
safely.
• Solution:
• Po(ac) =
𝑉2𝐿
2𝑅𝐿
• VL = 17.8 V
• Vcc = 23 V ( selected)
• Ip =
𝑉𝑃𝐿
𝑅𝐿
= 2.22 𝐴
• Pin (dc) = Vcc
2𝐼𝑃
π
= 32.5 W
• Po(ac) = 20 W
• %η =
𝑃𝑜(𝑎𝑐)
𝑃𝑖𝑛 𝑑𝑐
% = 61.5 %
• PD(2Q) max =
2V2cc
π2𝑅𝐿
= 13.4 W
• PD(Q) max =13.4/2 = 6.7 W
23. Class AB Push Pull Amplifier:
• The basic circuit of class AB push
pull amplifier is the same as that
of class B push pull amplifier
except that the voltage drop
across base –emitter junction is
approximately equal to
threshold voltage.
• The distortion introduced in
class AB amplifier is less than
that in class B amplifier but
more than in class A amplifier.
• Drawbacks:
• Low conversion efficiency than
class B amplifier
• Wastage of standby power
24. Complementary –symmetry class AB Push pull
amplifier
• Resistor R1 and R2 provide voltage
divider bias to forward bias the base
emitter junction of transistor Q1
and Q2
• Drawbacks:
• Requires two separate voltage
supplies.
• Difficult to obtain matched
complementary transistors
• If there is an unbalance in the
characteristics of the two
transistors, even harmonics will no
longer be cancelled and
considerable distortion will be
introduced.
27. Darlington complementary-symmetry class
AB push –pull Amplifier
• Darlington –connected transistor
provides higher output current and
lower output resistance
• During +ve half cycle npn transistors
will be biased into conduction
whereas pnp transistors at cut off. So
current ICQ1 flows from +Vcc to
ground through load
• During –ve half cycle pnp transistors
will be biased into conduction
whereas npn transistor are at cut off.
So current ICQ1 = ICQ2 flows from
ground to –Vcc through load.
29. Quasi complementary Push Pull amplifier
• The push pull operation is achieved by
using complementary transistor (Q1
and Q2) before the matched npn
output transistor (Q3 and Q4)
• Q1 and Q3 forms Darlington
connection that provides o/p from a
low impedance emitter follower
• Similarly the connection of Q2 and Q4
forms a feedback pair which provides
low impedance drive to the load.
• Resistor R2 can be adjusted to
minimize cross-over distortion by
adjusting the dc bias condition
• Most popular form of power amplifier
31. Tuned Power amplifier:
• Tuned amplifiers amplify selective
frequency only using LC network
and hence are useful in
communication receiver.
• The response of tuned amplifier is
similar to band pass filter with
center frequency ωo.
• Tuned amplifier finds application in
the radio frequency (RF) and
intermediate frequency (IF)
sections of communication receiver
and in variety of other system.
32. Basic Principle: Single Tuned Amplifier:
• The basic principle
underlying the design
of tuned amplifier is
the use of a parallel
LCR circuit as load or
at the input of BJT or
FET amplifier.
33. • From the ac equivalent network,
• Vo = -gmVi
1
𝑌𝐿
• Vo = −
gmVi
sC+
1
R
+
1
sL
•
Vo
Vi
= −
gm
C
S
S2+
S
RC
+
1
LC
………(i)
• The transfer function of a band
pass filter is given by
• T(s) =
ns
s2+s
ωo
Q
+ωo2
• Comparing eqn (i) with the
transfer function
• ωo =
1
𝐿𝐶
• B =
ωo
Q
=
1
RC
• And Q = RCωo
• At centre frequency (ωo), gain is
•
Vo
Vi
= -gmR
34. Numerical:
• It is required to design a tuned
amplifier of the type shown
having fo = 1 MHz , 3-dB
Bandwidth = 10 KHz and centre
frequency gain = -10. The FET
available has at bias point gm =
5mA/V and rd = 10 KΩ.
• ωo =
1
𝐿𝐶
• 2πfo =
1
𝐿𝐶
• L= 3.18 μH
• Solution :
• Centre freq gain = -gmR’
• R’= 2 K
• R’ = rd//R
• R=2.5 K
• ∆f= 10KHz (given)
• B =
1
R′C
• 2π∆f =
1
R′C
• C=7958 pF
35. Stagger-tuned voltage amplifier:
• If the different tuned circuit
which are cascaded are tuned to
slightly different frequency, it is
possible to obtain an increased
bandwidth with maximal
flatness around the centre
frequency.
• in figure L1C1 and L2C2 are
tuned to different frequency f1
and f2.
36. Stagger-tuned voltage amplifier:
• If an optimum stagger tuning is
employed the response curve of
the amplifier is very close to a
rectangular response curve.
Such a response curve is called
Butterworth response.
37. Synchronous Tuning:
• Synchronous tuning is used to
get sharp curve having least BW.
• The 3-dB BW of overall amplifier
is related to that of individual
tuned circuit
• BW =
ωo
Q
2
1
𝑁 − 1
• Where N – no of stage
• 2
1
𝑁 − 1 is BW shrinkage factor