3. BJT as a switch:
• To operate BJT as a switch, we utilize the cut off and saturation modes of
operation.
• For Vin less than about 0.5 V, the transistor will be cut off
• Thus, IB=0, IC=0 and VCE =VCC. In this state node C is disconnected from ground
and the switch is in open position.
4. BJT as a switch:
• To operate BJT as a closed switch, it must operate in the saturation.
• Practically VCEsat ≈ 0.2 V
• So, ICsat =
VCC−VCEsat
RC
• IB =
ICsat
β
• In saturation , the switch
is closed with a low
closure resistance RCEsat
• Then Vin = IBRB +VBE
• RB =
Vin−VBE
IB
5. Numerical:
• The transistor is specified to have β in the range of 50 to 150. find the
value of RB that results in saturation with an overdrive factor of at
least 10.
• Soln:
• Icsat = 9.8 mA =
VCC
−VCEsat
RC
• IB(EOS) =
ICsat
βmin
= 0.19 mA
• Overdrive factor = 10
• IB = 1.9mA
• RB =
Vin
−VBE
IB
= 2.1 K
6. Small signal operation and models:
• The input signal to be amplified is represented by the voltage source
vbe that is superimposed on VBE. We consider first the dc bias
conditions by setting the signal vbe to zero.
• We can write following relationships for the dc current and voltage
• IC = Is e
VBE
nVT
• IE = IC/α
• IB = IC/β
7. The collector current and the transconductance
• If a signal vbe is applied , the total instantaneous base –emitter voltage
vBE becomes
• vBE = VBE +vbe
• Correspondingly the collector current becomes
• iC = Is 𝑒
𝑣𝐵𝐸
𝑛𝑉𝑇 = Is 𝑒
𝑉𝐵𝐸
+𝑣𝑏𝑒
𝑛𝑉𝑇
• iC =IC𝑒
𝑣𝑏𝑒
𝑛𝑉𝑇
• If vbe<< nVT, We may expand the exponential of equation and truncate
the series after first two terms
iC ≈ IC (1 +
v𝑏𝑒
nVT
) ( 𝑒𝑥
= {1+
𝑥
1!
+
𝑥2
2!
+
𝑥3
3!
+……..} if x<<1
8. The collector current and the transconductance
• This approximation, which is valid only for vbe less than approximately
10 mV (for n=1) is referred to as the small signal approximation.
• Then , iC = IC +
𝐼𝐶
𝑛𝑉𝑇
vbe
• But collector current is composed of the dc value IC and a signal
component ic
• ic =
𝐼𝐶
𝑛𝑉𝑇
vbe.
• It can be rewritten as
• ic= gmvbe
• Where gm is called transconductance
• gm =
IC
nVT
=
IC
VT
(if n=1)
9. Small signal …
• Above analysis suggests that for small signal , transistor behaves as a voltage
controlled current source. The input port of this controlled source is between
base and emitter and the output port is between collector and emitter.
10. The base current and the input resistance at
the base.
• To determine the resistance seen by vbe we first evaluate the total base
current iB: (taking n=1)
• iB =
𝑖𝐶
β
=
𝐼𝐶
β
+
𝐼𝐶
𝑣𝑏𝑒
β𝑉𝑇
• Comparing it with ; iB = IB+ib
• ib=
𝐼𝐶
𝑣𝑏𝑒
β𝑉𝑇
=
𝑔𝑚
𝑣𝑏𝑒
β
• The small signal input resistance
• between base and emitter,
• looking into the base is denoted by rπ
rπ =
𝑣𝑏𝑒
𝑖𝑏
=
β
𝑔𝑚
11. The emitter current and the input resistance at the
emitter
• The total emitter current iE can be determined from
• iE =
𝑖𝐶
α
=
𝐼𝐶
α
+
𝑖𝑐
α
• Thus, iE = IE + ie
• The signal current ie is given by
• ie =
𝑖𝑐
α
=
𝐼𝐶
𝑣𝑏𝑒
α𝑉𝑇
=
𝐼𝐸
𝑣𝑏𝑒
𝑉𝑇
• The small signal resistance between base and emitter, looking into the emitter is
denoted by re
re =
𝑣𝑏𝑒
𝑖𝑒
=
𝑉𝑇
𝐼𝐸
And gm =
𝐼𝐶
𝑉𝑇
So, re =
α
𝑔𝑚
≅
1
𝑔𝑚
12. Relation Between rπ and re:
• vbe = ibrπ = iere
• rπ = (ie/ib) re
• rπ = (β+1) re
• Since β>> 1
• rπ ≅ β re
16. Application of small signal model: analysis of
transistor amplifier circuit.
• Determine the dc operating point of BJT and in particular the dc collector
current IC.
• Calculate the values of small signal model parameters: gm, rπ and re
• Eliminate the dc sources by replacing each dc voltage source with a short
circuit and each d current source with an open circuit.
• Replace all capacitors by a short circuit.
• Remove all elements bypassed by the short circuit.
• Redraw the network in a more convenient and logical form
• Replace BJT with one of its small signal equivalent circuit models
• Analyze the resulting circuit to determine the required quantities ie voltage
gain, input impedance and output impedance.
18. Fixed bias …
• Input resistance (Zin):
• Zin =RB//rπ
• Voltage gain (Av):
• Vo = -gm Vπ(ro//RC)
• From circuit Vin = Vπ
• Av = Vo/Vπ = -gm(ro//RC)
• Av ≅ −gmRC (ro >> RC)
• Av = −
𝑅𝐶
𝑟𝑒
19. • Output resistance (Zo):
• Output resistance of any system is defined as the resistance Zo
determined when Vin =0. when Vin = 0 , IB = 0 and IC= 0 resulting in
open ckt equivalent for the current source.
Zo = RC//ro
20. Phase relationship:
• The negative sign in voltage gain equation reveals that a 1800 phase
shift occurs between the input and output signals.
24. Voltage gain (Av):
• Neglecting the effect of ro,
• Vo = -icRC
• Vo = -gmVπRC
• Vo = -gmRC
𝑉𝑖𝑛
1+𝑔𝑚𝑅𝐸
• Av =
𝑉𝑜
𝑉𝑖𝑛
=−
𝑔𝑚
𝑅𝐶
1+𝑔𝑚𝑅𝐸
• Av= −
𝑅𝐶
𝑟𝑒
+𝑅𝐸
25. Output resistance (Zo):
• Input is short circuited and a test voltage Vx is applied at output so
that Ix current flows in circuit.
30. Input resistance (Zin):
Zib =
𝑉𝑖𝑛
𝑖𝑏
= rπ(1+gmRE)
Zin = R1//R2//Zib
Voltage Gain (Av):
• Av =
𝑉𝑜
𝑉𝑖𝑛
=−
𝑔𝑚
𝑅𝐶
1+𝑔𝑚𝑅𝐸
• Av =−
𝑅𝐶
𝑅𝐸
+𝑟𝑒
Output resistance (Zo):
• Zoc = (1+gmRE’)ro
• Zo = Zoc//RC
31. Voltage gain of CE amplifier;
• Av = −
𝑡𝑜𝑡𝑎𝑙 𝑟𝑒𝑠𝑖𝑠𝑡𝑎𝑛𝑐𝑒 𝑎𝑡 𝑐𝑜𝑙𝑙𝑒𝑐𝑡𝑜𝑟 𝑠𝑒𝑐𝑡𝑖𝑜𝑛
𝑡𝑜𝑡𝑎𝑙 𝑟𝑒𝑠𝑖𝑠𝑡𝑎𝑛𝑐𝑒 𝑎𝑡 𝑒𝑚𝑖𝑡𝑡𝑒𝑟 𝑠𝑒𝑐𝑡𝑖𝑜𝑛
32. Common Collector Configuration/ emitter
follower:
• Here output is always slightly
less than input signal. The fact
that Vo follows the magnitude of
Vi with an in –phase relationship
accounts for the terminology
emitter follower.
33. • Neglecting the effect of ro
• Input resistance (Zin):
• Using KVL at input side;
• Vi = ibβre + (β+1) ib RE
• Zb =
𝑣𝑖
𝑖𝑏
=βre + (β+1) RE
• Zb ≅ β(re + RE)
• Zin = RB//Zb
34. • We can write; ie = (β+1) ib
• And ib =
𝑉𝑖
𝑍𝑏
• So, ie = (β+1)
𝑉𝑖
β(re + RE)
• ie =
𝑉𝑖
(re + RE)
• Constructing network from above
equation
• Voltage gain (Av):
• Using voltage divider rule;
• Vo = Vi
𝑅𝐸
𝑅𝐸
+𝑟𝑒
• Av =
𝑉𝑜
𝑉𝑖
=
𝑅𝐸
𝑅𝐸+𝑟𝑒
• RE is usually much greater
than re so, Av ≅ 1
• Output resistance (Zo):
• To determine Zo, Vi is set to 0
and
• Zo = RE // re
37. Input resistance (Zin): (neglecting the effect of ro)
• Using KCL at emitter node ,
• iin +ie = i
• iin = -ie +i
• iin = -
𝑣𝑏𝑒
𝑟𝑒
+
𝑉𝑖𝑛
𝑅𝐸
• From circuit ;
• Vin =-vbe, so
• iin =
𝑉𝑖𝑛
𝑟𝑒
+
𝑉𝑖𝑛
𝑅𝐸
• Zin =
𝑉𝑖𝑛
𝑖𝑖𝑛
= RE //re
• Since RE>> re
• Zin ≅ 𝑟𝑒
38. Output resistance and voltage gain:
• By taking Vin =0;
• Zo = Rc
• Vo = -αieRC
• And ie =
𝑣𝑏𝑒
𝑟𝑒
=−
𝑉𝑖𝑛
𝑟𝑒
• Av =
𝑉𝑜
𝑉𝑖𝑛
=
α𝑅𝐶
𝑟𝑒
= gm RC
39. Determining current gain
• For each transistor configuration,
the current gain can be
determined directly from the
voltage gain, the defined load and
the input impedance
• Applying Ohm’s law to the input
and output circuits results in:
• Ii =
𝑉𝑖
𝑍𝑖
and IO =−
𝑉𝑂
𝑅𝐿
• The current gain
• Ai =
𝐼𝑂
𝐼𝑖
= −
𝑉𝑂
𝑉𝑖
𝑍𝑖
𝑅𝐿
= −Av
𝑍𝑖
𝑅𝐿
• The value of RL is defined by
the location of Vo and Io.
42. Analysis:
• No load voltage gain :
• AVNL =
𝑉𝑜
𝑉𝑖
=−
𝑅𝐶
𝑟𝑒
• Voltage gain with load RL:
• R’L = ro//RC//RL ≅ RC//RL
• Vo = -βIbR’L
• Ib =
𝑉𝑖
β𝑟𝑒
• AVL =
𝑉𝑜
𝑉𝑖
=−
𝑅𝐶
∕∕𝑅𝐿
𝑟𝑒
• Input impedance (Zin) = RB//βre
• Output impedance (Zo) = RC//ro
• Voltage gain with load and source
resistance:
• Vi =
𝑍𝑖𝑛𝑉𝑠
𝑍𝑖𝑛+𝑅𝑆
•
𝑉𝑖
𝑉𝑠
=
𝑍𝑖𝑛
𝑍𝑖𝑛+𝑅𝑠
• AVS =
𝑉𝑜
𝑉𝑠
=
𝑉𝑜
𝑉𝑖
𝑉𝑖
𝑉𝑠
• AVS = AVL
𝑍𝑖𝑛
𝑍𝑖𝑛+𝑅𝑠
43. Analysis shows that :
• For the same configuration, AVNL > AVL >AVS
• For particular design, the larger the value of RL, greater is the level of
ac gain.
• For particular amplifier, the smaller the internal resistance of the
signal source, the greater is the overall gain
45. Dc Analysis:
• βRE≥10R2
• since above condition is satisfied, we can use approximate method
• VB =
𝑅2
𝑉𝐶𝐶
𝑅1
+𝑅2
=1.754 V
• Using KVL at input side
• VB= VBE + IERE
• IC≅ IE =
𝑉𝐵
−𝑉𝐵𝐸
𝑅𝐸1+
𝑅𝐸2
=1.12 mA
• gm=IC/VT= 0.0448 mho
• re = VT/IC= 22.32Ω
• rπ= βre= 3.34 KΩ
46. Ac analysis:
Input resistance (Zin):
Zib =
𝑉𝑖𝑛
𝑖𝑏
= rπ(1+gmRE1)
=73.67 K
Zin = R1//R2//Zib
=7.41 K
Voltage Gain with load (AVL):
• AVL =
𝑉𝑜
𝑉𝑖𝑛
=−
𝑔𝑚(𝑅𝐶/ 𝑅𝐿)
1+𝑔𝑚𝑅𝐸1
• AVL =−
𝑅𝑐/∕𝑅𝐿
𝑅𝐸1
+𝑟𝑒
=
• -8.67
• Overall voltage gain (AVS)
• AVS = AVL
𝑍𝑖𝑛
𝑍𝑖𝑛+𝑅𝑠
=
• -8.029
Output resistance (Zo):
• Zoc = (1+gmRE’)ro = 1945.85K
Zo = Zoc//RC = 4.68 K ; let ro = 100 K ; RE’ = (rπ+Rs)//RE1
47. Numerical:
Vcc = IBRB+VBE+IERE = IBRB +VBE +(β+1)IBRE
IB =0.0358 mA
IC =βIB =4.3 mA
gm = IC/VT = 0.172 mho
re = VT/IC = 5.813 Ω
48. rπ = βre =698.4Ω
Zib= rπ(1+gmRE) =67.96 KΩ
Zin = Zib//RB = 59.31KΩ
• Voltage gain Av =−
𝑅𝐶
𝑅𝐸
+𝑟𝑒
= -3.89
• Output impedance Zo =Zoc//RC =2.19K , let ro= 50K Ω
• Zoc = (1+gmRe’)ro =2722.83 K ; Re’ = RE// rπ = 310.8 Ω
Ai = −Av
𝑍𝑖
𝑅𝐿
= −Av
𝑍𝑖
𝑅𝑐
= 104.97
49. Numerical:
• Design voltage divider bias CE amplifier having gain of -140.
• Given VCC = +9 V and β = 295.
• With emitter by pass capacitor
• Av =- Rc/re
• Without emitter by pass capacitor
• Av = - Rc/(re+RE)
50. Solution: we are using voltage divider bias
with emitter by pass capacitor
• Av= −
𝑅𝑐
𝑟𝑒
=-140
• Assuming IC = 1 mA
• re =VT/IC = 25 Ω
• RC =3.5KΩ
• VRC = ICRC =3.5 V
• VCE = 0.5 Vcc =4.5V
• VE = Vcc-VRC-VCE = 1 V
VE = IERE = ICRE
RE= 1K
51. • Using firm biasing
• βRE≥10R2
• R2 =29.5 K
• VB = VBE + VE = 1.7 V
• VB =
𝑅2
𝑅2+𝑅1
𝑉𝐶𝐶
• R1 =126.68 K
52.
53. The Ebers –Moll (EM) Model:
• Ebers and Moll have shown that this composite model ( combination
of both active mode and reverse active mode) can be used to predict
the operation of BJT in all of its possible mode.
• Using KCL at each node:
• iE = iDE-αRiDC ……………i
• iC = -iDC +αFiDE ………….ii
• iB = (1-αF)iDE + (1-αR) iDC …………..iii
• We use diode equation to express iDE and iDC
• iDE = ISE (𝑒
𝑉𝐵𝐸
𝑉𝑇 -1) …………………iv
• iDC = ISC (𝑒
𝑉𝐵𝐶
𝑉𝑇 -1) …………………v
54. • A simple and elegant formula relates the scale currents as:
• αFISE = αRISC = IS …………………vi
• From above equations:
• iE =
𝐼𝑆
αF
(𝑒
𝑉𝐵𝐸
𝑉𝑇 -1) – IS (𝑒
𝑉𝐵𝐶
𝑉𝑇 -1)
• iC = IS (𝑒
𝑉𝐵𝐸
𝑉𝑇 -1) −
𝐼𝑆
αR
(𝑒
𝑉𝐵𝐶
𝑉𝑇 -1)
• iB =
𝐼𝑆
β𝐹
(𝑒
𝑉𝐵𝐸
𝑉𝑇 -1) +
𝐼𝑆
β𝑅
(𝑒
𝑉𝐵𝐶
𝑉𝑇 -1)
Where βF =
α𝐹
1−α𝐹
• And βR =
α𝑅
1−α𝑅
55. For active region:
• Here VBE is positive and in the range of 0.5 V to 0.8 V and VBC is
negative. So the terms containing 𝑒
𝑉𝐵𝐶
𝑉𝑇 will be negligibly small and can
be neglected to obtain:
• iE ≅
IS
αF
e
VBE
VT +IS (1−
1
αF
)
• iC ≅ IS e
VBE
VT +IS(
1
αR
-1)
• iB ≅
IS
βF
e
VBE
VT - IS(
1
βF
+
1
βR
)
