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t: +44 1752 875130
e: info@moortec.com
www.moortec.com 1
Moortec “Let’s Talk PVT Monitoring” Series with CTO Oliver King
By Ramsay Allen
Adaptive Voltage Scaling (AVS) and Dynamic Voltage Frequency
Scaling (DVFS)
7th February 2017
In this, the sixth instalment of the "Let's Talk PVT Monitoring" series I
chat with Oliver King about monitoring in-chip conditions in modern
SoCs. This time we discuss the significance of Adaptive Voltage Scaling
(AVS) and Dynamic Voltage Frequency Scaling (DVFS) in optimising in-
chip conditions. As Moortec’s CTO, Oliver has been leading the
development of compelling in-chip monitoring solutions to address
problems associated with ever-shrinking System-on-Chip (SoC) process
geometries. An analogue and mixed signal design engineer with over a
decade of experience in low power design, Oliver is now heading up the
expansion of Moortec's IP portfolio into new products on advanced
nodes.
Questions:
1. What exactly do we mean by Adaptive Voltage Scaling versus Dynamic Voltage
Frequency Scaling?
Adaptive Voltage Scaling (AVS) involves the reduction of power by changing the operating
conditions within an ASIC in a closed loop. Dynamic Voltage Frequency Scaling (DVFS) on the
other hand is a power management technique where the voltage is increased or decreased
depending upon dynamic (voltage, temperature) and static (process) in-chip conditions.
Both are instrumental in optimising in-chip conditions in different ways.
You can use a DVFS scheme once to take process into account, or you can use it over time to
account for temperature and even ageing. It is possible, for example, to reduce power
consumption to achieve a desired speed of operation. It is also possible to take process
variation across a die into account, which is being done in large SoCs today.
2. How can AVS & DVFS be used to optimise in-chip conditions?
A closed loop AVS system uses certain structures within the chip to provide the data
required to adaptively track the behaviour of the silicon. By using a delay chain that has the
same operating voltage as the surrounding chip, the voltage frequency relationship for the
chip for that frequency is calculated by measuring the frequency of the delay chain.
Moortec CTO, Oliver King
Article
t: +44 1752 875130
e: info@moortec.com
www.moortec.com 2
Using these schemes in-chip means that variations in response to process can be compared
and fluctuations in temperature can be monitored while the chip is operating. A
relationship can then be observed between voltage-frequency and the reduction in power
dissipation for the circuit under that specific condition which enables designers to push the
levels of optimisation and reliability, allowing them to get as much performance out of the
chip as possible.
3. What are the specific applications of AVS & DVFS?
AVS has applications associated with in-chip variability compensation by optimizing the
voltage on the go to take in chip conditions into account for operation. It can also be used to
set thermal alarms and initiate fan operation. Operating at higher speed (performance) will
obviously lead to a shorter life time whereas operating at optimum speed will improve the
device life time and therefore increase its reliability.
DVFS on the other hand can be used in a number of in-chip applications including wafer
sorting based on Look Up Tables (LUT). It can also be used to check functionality by
decrementing the supply in regular steps as well as finding the lowest centre functional
voltage. The voltage can then be set to just the right level for utilising optimum power and
reliability of the devices.
4. What is the significance of AVS & DVFS in embedded PVT Monitoring?
Increased process variability of advanced node CMOS technologies has become a significant
factor to the development of SoC devices when designing for speed and power
performance. Self-determination of device temperature, supply voltage levels and its own
manufactured process characteristics, primarily for performance optimisation schemes
(Dynamic Voltage and Frequency Scaling, DVFS) on a PER DIE basis, is becoming a compelling
notion to the development community. To also measure aging effects of the silicon, analyse
critical timing and supply conditions on advanced node devices, especially FinFET, from
embedded sensors now makes sense.
The Voltage Monitor provides the means for advanced node Integrated Circuit (IC)
developers to accurately measure core supply domain voltages on advanced node digital
MOS devices. Voltage Monitors are specifically targeted to enable high performance
Adaptive Voltage Scaling (AVS) schemes as well as providing a means for accurate IR drop
analysis. The monitor is capable of monitoring multiple supply domains and can also be used
to generate low voltage alarms as well as providing real-time supply data.
In-chip temperature sensors are used for performance optimisation, an example being DVFS
where, depending on the thermal conditions, system clocks and voltage supplies can be
varied to optimise either the speed of logical operations or power consumed by the device.
Article
t: +44 1752 875130
e: info@moortec.com
www.moortec.com 3
Monitors are now a critical component to advanced node chip design. Similar to other
design arenas such as automotive, telecommunications, aerospace, industrial and
technologies within the home, the inevitable direction of progress is to satisfy the designers
appetite for higher sensor placement densities, higher accuracy, higher resolution and easy-
to-integrate solutions. Why? Well, that’s an easy one to answer - consumers simply want
higher performance and better reliability within their chosen technology products.
About the interviewee
Oliver King is the Chief Technology Officer of Moortec Semiconductor. Before joining
Moortec in 2012, Oliver was part of the analogue design methodology team at Dialog
Semiconductor and prior to that was a senior design engineer at Toumaz Technology. Oliver
graduated from The University of Surrey in 2003 with a degree in Electrical and Electronic
Engineering.
About Moortec Semiconductor
Moortec Semiconductor, established in 2005, provide high quality analog and mixed-signal
Intellectual Property (IP) solutions world-wide specialising in die monitoring. Having a track
record of delivery to tier-1 semiconductor and product companies, Moortec provide a quick
and efficient path to market for customer products and innovations. For more information,
please visit www.moortec.com.
Contact: Ramsay Allen, +44 1752 875133, ramsay.allen@moortec.com

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Moortec “Let’s Talk PVT Monitoring” - Adaptive Voltage Scaling (AVS) and Dynamic Voltage Frequency Scaling (DVFS)

  • 1. Article t: +44 1752 875130 e: info@moortec.com www.moortec.com 1 Moortec “Let’s Talk PVT Monitoring” Series with CTO Oliver King By Ramsay Allen Adaptive Voltage Scaling (AVS) and Dynamic Voltage Frequency Scaling (DVFS) 7th February 2017 In this, the sixth instalment of the "Let's Talk PVT Monitoring" series I chat with Oliver King about monitoring in-chip conditions in modern SoCs. This time we discuss the significance of Adaptive Voltage Scaling (AVS) and Dynamic Voltage Frequency Scaling (DVFS) in optimising in- chip conditions. As Moortec’s CTO, Oliver has been leading the development of compelling in-chip monitoring solutions to address problems associated with ever-shrinking System-on-Chip (SoC) process geometries. An analogue and mixed signal design engineer with over a decade of experience in low power design, Oliver is now heading up the expansion of Moortec's IP portfolio into new products on advanced nodes. Questions: 1. What exactly do we mean by Adaptive Voltage Scaling versus Dynamic Voltage Frequency Scaling? Adaptive Voltage Scaling (AVS) involves the reduction of power by changing the operating conditions within an ASIC in a closed loop. Dynamic Voltage Frequency Scaling (DVFS) on the other hand is a power management technique where the voltage is increased or decreased depending upon dynamic (voltage, temperature) and static (process) in-chip conditions. Both are instrumental in optimising in-chip conditions in different ways. You can use a DVFS scheme once to take process into account, or you can use it over time to account for temperature and even ageing. It is possible, for example, to reduce power consumption to achieve a desired speed of operation. It is also possible to take process variation across a die into account, which is being done in large SoCs today. 2. How can AVS & DVFS be used to optimise in-chip conditions? A closed loop AVS system uses certain structures within the chip to provide the data required to adaptively track the behaviour of the silicon. By using a delay chain that has the same operating voltage as the surrounding chip, the voltage frequency relationship for the chip for that frequency is calculated by measuring the frequency of the delay chain. Moortec CTO, Oliver King
  • 2. Article t: +44 1752 875130 e: info@moortec.com www.moortec.com 2 Using these schemes in-chip means that variations in response to process can be compared and fluctuations in temperature can be monitored while the chip is operating. A relationship can then be observed between voltage-frequency and the reduction in power dissipation for the circuit under that specific condition which enables designers to push the levels of optimisation and reliability, allowing them to get as much performance out of the chip as possible. 3. What are the specific applications of AVS & DVFS? AVS has applications associated with in-chip variability compensation by optimizing the voltage on the go to take in chip conditions into account for operation. It can also be used to set thermal alarms and initiate fan operation. Operating at higher speed (performance) will obviously lead to a shorter life time whereas operating at optimum speed will improve the device life time and therefore increase its reliability. DVFS on the other hand can be used in a number of in-chip applications including wafer sorting based on Look Up Tables (LUT). It can also be used to check functionality by decrementing the supply in regular steps as well as finding the lowest centre functional voltage. The voltage can then be set to just the right level for utilising optimum power and reliability of the devices. 4. What is the significance of AVS & DVFS in embedded PVT Monitoring? Increased process variability of advanced node CMOS technologies has become a significant factor to the development of SoC devices when designing for speed and power performance. Self-determination of device temperature, supply voltage levels and its own manufactured process characteristics, primarily for performance optimisation schemes (Dynamic Voltage and Frequency Scaling, DVFS) on a PER DIE basis, is becoming a compelling notion to the development community. To also measure aging effects of the silicon, analyse critical timing and supply conditions on advanced node devices, especially FinFET, from embedded sensors now makes sense. The Voltage Monitor provides the means for advanced node Integrated Circuit (IC) developers to accurately measure core supply domain voltages on advanced node digital MOS devices. Voltage Monitors are specifically targeted to enable high performance Adaptive Voltage Scaling (AVS) schemes as well as providing a means for accurate IR drop analysis. The monitor is capable of monitoring multiple supply domains and can also be used to generate low voltage alarms as well as providing real-time supply data. In-chip temperature sensors are used for performance optimisation, an example being DVFS where, depending on the thermal conditions, system clocks and voltage supplies can be varied to optimise either the speed of logical operations or power consumed by the device.
  • 3. Article t: +44 1752 875130 e: info@moortec.com www.moortec.com 3 Monitors are now a critical component to advanced node chip design. Similar to other design arenas such as automotive, telecommunications, aerospace, industrial and technologies within the home, the inevitable direction of progress is to satisfy the designers appetite for higher sensor placement densities, higher accuracy, higher resolution and easy- to-integrate solutions. Why? Well, that’s an easy one to answer - consumers simply want higher performance and better reliability within their chosen technology products. About the interviewee Oliver King is the Chief Technology Officer of Moortec Semiconductor. Before joining Moortec in 2012, Oliver was part of the analogue design methodology team at Dialog Semiconductor and prior to that was a senior design engineer at Toumaz Technology. Oliver graduated from The University of Surrey in 2003 with a degree in Electrical and Electronic Engineering. About Moortec Semiconductor Moortec Semiconductor, established in 2005, provide high quality analog and mixed-signal Intellectual Property (IP) solutions world-wide specialising in die monitoring. Having a track record of delivery to tier-1 semiconductor and product companies, Moortec provide a quick and efficient path to market for customer products and innovations. For more information, please visit www.moortec.com. Contact: Ramsay Allen, +44 1752 875133, ramsay.allen@moortec.com