1. Digital Photonics
and
The operation of a Photonic Full Adder.
Mr. Michael Cloran
A clear and concise approach to photonic logic is introduced in this paper also with my notation and
logical representation of photonic logic circuitry is discussed. A digital photonic adder and its
operation and theory is introduced and an indepth derivation of theory of operation is shown.
1.Introduction
Light can be thought of as waves having a polarisation of traverse Magnetic TM or traverse
Electromagnetic TE. Now say one was to modulate a laser with binary data either by phase
modulation or intensity modulation, in order to predict the operation of digital photonic logic a plain
and easy way of notation would have to be introduced.
Ill explain in photonics several wavelengths are used . A different wavelength per optical path and
each wavelength has modulated data on it and also each wavelength has a polarisation and possibly
a frame of time reference.
So from above
wavelength say 1 has polarisation say TM at say time n has a binary [1] modulated onto it
in short
λ1[1](n)@TM
for TM logic leave out the polarisation if deemed fit.
λ1[1](n)
2. Logic Circuit Description
that is the notation covered now to introduce the logical circuitry
And gate
it is assumed that there is two different wavelengths entering the circuit one on λ1 pin and one on λ2
pin and the output is on λ1's wavelength, hence a wavelength conversion is done on each of the
logic blocks be it naturally or via the use of a wavelength converter on one of the pins.
And gate
inputs output
2λ 1λ 1λ
2[λ 0] 1[λ 0] 1[λ 0]
2[λ 0] 1[λ 1] 1[λ 0]
2[λ 1] 1[λ 0] 1[λ 0]
2[λ 1] 1[λ 1] 1[λ 1]
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2. Nand Gate
inputs output
2λ 1λ 1λ
2[λ 0] 1[λ 0] 1[1λ ]
2[λ 0] 1[λ 1] 1[1λ ]
2[λ 1] 1[λ 0] 1[1λ ]
2[λ 1] 1[λ 1] 1[0λ ]
Or Gate
inputs output
2λ 1λ 1λ
2[λ 0] 1[λ 0] 1[0λ ]
2[λ 0] 1[λ 1] 1[1λ ]
2[λ 1] 1[λ 0] 1[1λ ]
2[λ 1] 1[λ 1] 1[1λ ]
NOr Gate
inputs output
2λ 1λ 1λ
2[λ 0] 1[λ 0] 1[1λ ]
2[λ 0] 1[λ 1] 1[0λ ]
2[λ 1] 1[λ 0] 1[0λ ]
2[λ 1] 1[λ 1] 1[0λ ]
Not gate
input output
1λ 1λ
1[λ 0] 1[λ 1]
1[λ 1] 1[λ 0]
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3. EXOr Gate
inputs output
2λ 1λ 1λ
2[λ 0] 1[λ 0] 1[0λ ]
2[λ 0] 1[λ 1] 1[1λ ]
2[λ 1] 1[λ 0] 1[1λ ]
2[λ 1] 1[λ 1] 1[0λ ]
wavelength converter
converts the input wavelength say 1 to 2.λ λ
Binary Adder explanation
The data is modulated onto a EM wave and in the logic blocks constructive and destructive
interference takes place.
Diagram for a 2 bit binary adder is shown below
D = Data bit 1 or 0
D1 = data load 1
D2 = data load 2
at time n for branch 1
output of inverters
(reading of below wavelength 1 has data 1 modulated onto it at time reference n goes to wavelength
1 with inverted data 1 at time reference n.
λ1[D1](n)->λ1[/D1](n)
λ2[D2](n)->λ2[/D2](n)
first and gate in branch inputs explanation
λ1[/D1](n)
λ2[/D2](n)-> Δλ2[/D2](n)->λ1[/D2](n)
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4. the result of the first and gate
R1= Result 1
λ1[/D1](n) . λ1[/D2](n) = λ1[R1](n)
the second and gate in the branch
inputs
λ1[R1](n)
λ3[D3](n)->Δλ3[D3](n)->λ1[D3](n)
result
λ1[R1](n) . λ1[D3](n) = λ1[R2](n)
branch 2
λ1[D1](n)->λ1[/D1](n)
λ3[D3](n)->λ3[/D3](n)
first and gate inputs
λ1[/D1](n)
λ3[/D3](n)-> Δλ3[/D3](n)->λ1[/D3](n)
the result of first and gate
λ1[/D1](n) . λ1[/D3](n) = λ1[R3](n)
the inputs to the second and gate
λ1[R3](n)
λ2[D2](n)->Δλ2[D2](n)->λ1[D2](n)
result of and gate
λ1[R3](n) . λ1[D2](n) = λ1[R4](n)
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5. branch 3
input to and 5
λ1[D1](n)
λ2[R6](n)->Δλ2[R6](n)->λ1[R6](n)
and the result is
λ1[D1](n) λ1[R6](n) = λ1[R5](n)
where (gate 6 inputs) working back
λ2[D2](n)->λ2[/D2](n)
λ3[D3](n)->λ3[/D3](n)
and the input to and gate 6
λ2[/D2](n)
λ3[/D3](n)->Δλ3[/D3](n)->λ2[/D3](n)
the result of and gate 6
λ2[/D2](n) . λ2[/D3](n) = λ2[R6](n)
branch 4
input to and gate 7
λ1[D1](n)
λ2[D2](n)->Δλ2[D2](n)->λ1[D2](n)
Result
λ1[D1](n) λ1[D2](n) = λ1[R7](n)
input to and gate 8
λ1[R7](n)
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6. λ3[D3](n)->Δλ3[D3](n)->λ1[D3](n)
and the result is
λ1[R7](n) . λ1[D3](n) = λ1[R8](n)
The first Or gate
inputs
λ1[R2](n)
λ1[R4](n)
result (+ = OR)
λ1[R2](n) + λ1[R4](n) = λ1[R9](n)
the second or gate
inputs
λ1[R6](n)
λ1[R8](n) no need for wavelength conversion in this or gate saving space and circuitry
result
λ1[R6](n) + λ1[R8](n) = λ1[R10](n)
the final Or gate
inputs
λ1[R9](n)
λ1[R10](n) no need for wavelength conversion in this chip so design out
result
λ1[R9](n) + λ1[R10](n) = λ1[Final Result](n)
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7. The following is an explanation of the carry logic
the first and gate
λ3[D3](n)
λ2[D2](n)->Δλ2[D2](n)->λ3[D2](n)
result (Rc= Result of Carry)
λ3[D3](n) . λ3[D2](n) = λ3[Rc1](n)
the second and gate
inputs
λ1[D1](n)
λ2[D2](n)->Δλ2[D2](n)->λ1[D2](n)
result
λ1[D1](n) . λ1[D2](n) = λ1[Rc2](n)
the third and gate
inputs
λ1[D1](n)
λ3[D3](n)->Δλ3[D3](n)->λ1[D3](n)
result
λ1[D1](n) . λ1[D3](n) = λ1[Rc3](n)
the first Or gate
inputs
λ1[Rc2](n)
λ1[Rc3](n)
result
λ1[Rc2](n) + λ1[Rc3](n) = λ1[Rc4](n)
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8. the final or gate
inputs
λ3[Rc1](n)
λ1[Rc4](n)->Δλ1[Rc4](n)->λ3[Rc4](n)
result
λ3[Rc1](n) + λ3[Rc4](n) = λ3[Carry Result](n)
Now that the theory is covered it is noticed that if and gate 3 was moved to the position of and gate
2 and vice versa , and also if λ3 was chosen for the reference wavelength there would be no need
for a wavelength converter on Or 3 thus designing out circuitry.
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9. Page 9 of 10 by Michael Cloran 14/09/10 18:36:31

10. References
Semiconductor Optical Amplifiers by Niloy K Dutta & Qiang Wang
All Optical logic operations using semiconductor optical amplifier based devices by Qiang Wang
Digital Design by M. Morris Mano
Wavelength converters in optical networks by K.R. Venugopal
Pattern effect mitigation techniques for all-optical wavelength converters based on semiconductor
optical amplifiers by Jin Wang
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