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iPhone 7 full schematic ok

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Phonefix
Phonefix

iPhone 7 schematic diagram, phone normal value diagram

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BS0402 TP0424 TP0411 TP0400TP0401 TP0420TP0422 TP0415 TP0416 TP0407 TP0406 TP0405TP0404 TP0403 TP0402 TP0421 TP0419 TP8000_RF ZT0401 ZT0404 J4101 QPOET_RF LBPA_RF TDDPA_RF MLBPA_RF L8007_RF L8009_RF U SPD T_R F USPDT2_RF CL0401 BS0405 SUAT2_RF SUAT1_RF SGND_RF BS0403 U2402 M2600 R4401 U2404 J_SIM_RF MBHBPA_RF UATDI_RF LATDI_RF C4421 C4417 XW5616_RF XW2700 XW 2201 XW2404 XW3801 XW3333 XW2707 no_refdes+2 no_refdes+3 no_refdes+4 no_refdes+5 no_refdes+6 no_refdes+7 no_refdes+9 J3801 U3801 L3903L3902L3901 J2201 M2800 JLAT3_RF JLAT1_RF J4502 BS0406 FD0403 FD0402 FD 0408 FD0409 DZ4402 DZ4401 C 7730_RF L6707_RF R6706_RF L8008_RF R2001 C6704_RF DZ4404 DZ4403 FL3803 FL3910 C2443 C4106 C4109 C4105 C6716_RF C 8008_RF C6714_RF C6700_RF C4401 C4418 FL4112 FL3904 FL3915 FL3922 R4104 FL3919 FL4742 FL3801 FL3924 FL3806 FL3916 FL3804FL3802 FL4741 FL4405 FL4402 FL4403 FL4732 FL4404 FL4406 FL4731 FL4401 FL4120FL4116 FL4108 FL4101 FL4115 FL4119 FL4117 FL4118 FL4102 FL4407 FL4105 R2404 R3923 R4806 R4807 R3805 R4110 R4109 R4712 R4711 R2441 R3901 R3908 R3802 R2201 R4405 R4402 R4406 R4102 R4710 R4709 C2619 C4136 C4730 C4135 C2202 C3924C4507C3805 C3922 C3925 C3919 C4810 C4809 C3825 C3818 C3817 C3816 C2201 C3807 C3806 C3926 C4712 R4501 C4742 C4741 C3923 C0404 C4415 C4732 C0410 C4731 C4405 C4404 C4111 C4108 C4132C4128C4729 C4110 C4131 C4129 C2620 C4126 C4101 C4102 C4134 C3902 C2204 C3912 C3914 C3913 C3911 C3910 C3909 C3916 C4103 C3936 C3930 C3802 C3811 C3935 C3931 C3804 C3915 C0402 C0401 C4414 C4410 C4402 C0408 C4411 C4407C4403 C4406 C4104 C4127C4133 C4120 C4119 C4130 C3542 C3529 C3434 C2445 C2442 C3822 C2401 C2449 C2203 C3927 C3918 C3819 C3801 C3826 C3928 C0403 C4419 C2007 C0409 C4420 C4117 C4118 C1905 C6721_RF C 8005_RF C4122 C4121 C3803 C4107 C0405 C0411 C0406 C4413 C4408 C4409 C4412 C4116 C4422 C6720_RF C 8007_RF C3934 C3932 C2448 C2117 C2118 C3814 C3828 C3813 C3821 C3815 C2418 C4416 SH0403 PP2440 PP4501 PP3801 PP2403 PP2402 PP8000_RF PP2404 PP2401 PP3601 PP3602 PP2003 PP6919_RF PP6917_RF PP6918_RF PP6969_RF PP6979_RF PP6953_RF PP6973_RF PP6972_RF PP6921_RF PP6945_RF PP7601_RF PP7600_RF PP6942_RF PP6941_RF PP6920_RF PP6933_RF PP6905_RF PP6977_RF PP6974_RF PP6944_RF PP6943_RF PP6952_RF PP7000_RF PP6936_RF PP1702 PP1701 PP6940_RF PP6935_RF PP6939_RF PP6938_RF PP6980_RF no_refdes+1 U0700 L2301 NFCSW_RF TP0414 TP7505_RF TP0423 TP0413 TP7500_RF U3301 L1803 XW3202 BALUN_RF L1813 L1809 L1807 L1808 L1812 L1811 C7518_RF J4503 TUNFX_RF R3332 R3333 J4501 C5632_RF C5616_RF C5633_RF C5617_RF C5618_RF C5634_RF L5602_RF L5604_RF L5603_RF L5605_RF SWPMX_RF XW2001 XW1801 XW1802 XW1803 XW1403XW 1805 XW5614_RF XW5615_RF XW1402 XW1401 XW1902 XW1901 XW3203 XW1807 XW2002 XW 2005 XW 2004 XW2003 no_refdes+5 no_refdes+8 no_refdes+10 L7500_RF L7501_RF L5601_RF C1914 C1911 C1910 C1907 C3532 C3326 C1512 C3313 C3328 C3531 C3308 C3324 C3306 C3325 C3327 C1901 C1808 C1804 C1810 C1806 C5624_RF C5620_RF L3302 L1806 L1814 L1810 L1816 L1817 L1804 L1801 L1818 L1815 FD0407 R2002 R7508_RF R7509_RF R7520_RF DZ2906 DZ2905 DZ2907 FL2505 FL2901 FL2902 C7515_RF C7507_RF C7508_RF C3311 C7509_RF C7510_RF C7516_RF C7512_RF C7514_RF FL4815 FL2911 FL2910 FL6700_RF FL6703_RF FL2904 FL2909 FL2501 FL2504 FL2913 FL2908 FL2907 FL2906 R2905 FL2914 FL2903 R1306 R1305 FL6701_RF R4708 R2904 R2903 R4813 R4812 FL6702_RF R4707 R3301 R2008 R4815 R4808 R4809 R7512_RF R4604 R4603 R4706 R4811 R4810 R4705 R2915 R0901 R6900_RF R5911_RF C2513 C4708 C2924 C4803 C2520 C2910 C2905 C4804 C4707 C2906 C4813 C4812 C3312 C3333 C3332 C2503 C2514 C2904 C2926 C2902 C2911 C2933 C2921 C2908 C2934 C2935 C2903 C2931 C2932 C1867 C1871 C1869 C1811 C1872C1873 C0909 C0905 C0908 C0904 C1861 C1860 C3323 C3331 C2523 C2526 C2524 C2525 C2530 C2901 C2914 C2915 C7525_RF C3315 C0801 C0818 C0817 C0816 C0815 C2512 C0413 C2008 C5903_RF C2522 C2529 C2528 C6702_RF C6701_RF C6703_RF C6705_RF C3319 C2521 C3501 C3329 C2916 C2917 C2927 C2508 C2909 C2510 C2506 C1923 C1930 C1615 C3316 C5730_RF C0805 BB_RF U5801_RF C5614_RF C3318 SH0401 PP7608_RF PP7604_RF PP7603_RF PP5301 PP7501_RF PP1410PP0902 PP1411 PP6931_RF PP6971_RF PP6915_RF PP0802PP6916_RF PP0801 PP6970_RF PP6923_RF PP7502_RF PP6929_RF PP6906_RF PP6914_RF C4711 U2710 U3502 U3402 TP0409 TP0408 TP0412 TP0410 C3405 C2702 C2114 C3722 C3424 C2113 C4601 C3525 C3702C3724 C3718 C2611 C2612 C2609 C2610 C3710 C3407 C3404 C3403 C3539 C3538 C3524 C3432 C3929 C3713C3712C3714 C3901 C3530 C3707 C3715 C3716 C3823 C3537C3431 C1716 C1748 C1721 C1713 C1701 C1702 C1730 C1729 C1722 C1733 C1719C1704C1705C1707C1727 FD0400 FD0404 FD0410 FD0405 DZ6900_RF R7103_RF C6610_RF L6304_RF R2003 R2711 R6405_RF R6400_RF R7105_RF C6310_RF L6311_RF R7102_RF R7511_RF R6705_RF R6710_RF R6715_RF R6708_RF R6709_RF R6703_RF R6601_RF R6606_RF DZ6901_RF FL3903 FL3901 FL3902 C7013_RF C6415_RF C6417_RF C7010_RF C7014_RF C7125_RF R7101_RF C7124_RF C6405_RF C6404_RF C7118_RF C6403_RF C7122_RF C6410_RF C6402_RF C7009_RF C7112_RF C7121_RF C6728_RF C6713_RF C6726_RF C6711_RF C6727_RF C6602_RF C6614_RF C6601_RF C6611_RF C6613_RF C7731_RF C7011_RF C7012_RF R6301_RF C6338_RF C3535 C3428 C3703 C3903 FL4114 FL4730 FL4103 FL3920 FL3917 FL3913 FL3918 FL3811 FL3807 FL4121 FL4107 FL4729 FL4604 FL6603_RF FL6602_RF FL6401_RF FL6402_RF R7114_RF R6003_RF R7109_RF R3809 R6001_RF R6005_RF R6006_RF R7107_RF R6004_RF R6008_RF R7112_RF R7111_RF R6002_RF R7002_RF R7108_RF R7113_RFR6007_RF R7110_RF R6201_RF R2422 R7702_RF R7711_RF R1702 R1707 R2705 R2702 R4002 R2710 R2101 R2102 R2701 R3508 R2403 R0805 R0802 R3811 R3801 R2103 R3101 R1304 C4702 C4701 C3727C3726 C3921 C3920 C4710 C4709 C4608 C0420 C2617 C2104 C3938 C3717 C2102 C3939 C3917 C3812 C2703 C3526 C3427 C4008 C4007 C0418 C0417 C2613 C2614 C0407 C1715 C1703C1708 C1735 C1714 C3937 C3422 C3425 C6008_RF C6409_RF C4807 C2701 C6408_RF C6018_RF C6019_RF C6020_RF C7001_RF C3527 C4002 C6009_RF C6022_RF C6007_RF C6502_RF C6501_RFC6021_RF C7501_RF C2405 C6627_RF C6629_RF C2413 C6201_RF C1710 C2009 C6806_RF C6734_RF C0419 C1736 C1712 C6901_RF C1720 C1709 C1734 C5909_RF C5908_RF C5907_RF C7126_RFC7128_RF C2103C2112 C3709C3708 C3904 C3905 C7114_RF C7108_RF C6406_RF C6407_RF C7008_RF C6414_RF C7104_RF C7117_RF C7105_RF C6505_RF C6514_RF C6506_RF C6504_RF C6513_RF C6420_RF C6419_RFC7110_RF C6515_RF C6622_RF C6625_RF C6619_RF C6617_RF C0421 C2420 C0422 C0412 C6014_RF C7017_RF C7005_RF C6013_RF C6010_RF C6012_RF C6011_RF C6017_RF C6015_RF C6016_RF C7101_RF C3528 C5906_RF C4004 C4001 C3430 C1724 C1725 C2707C3534 C7007_RF C3536 C2115 C3940 C3933 C3824 C2700 C6804_RF C7006_RF C3426 C3429 C6006_RF C6024_RF C7529_RF C7530_RF C6023_RF C6801_RF C6803_RF C6805_RF C6802_RF C2414 C2408 C2505 C2705 C1726 PP4001 PP6978_RF U2700L2700 D2700 Q2701 Q2700 U1701 C2708 U2701 U4805 U4806 XCVR1_RF U2403 Q2102 GPIO_RF U4802 U4001 UPPDI_RF GFILT_RF C2110 C2106 C2108 SE2LDO_RF JUAT2_RF JUAT1_RF MHBLN_RF MLBLN_RF GLNA_RF PPLXR_RF LBLN_RF W5BPF_RF MCEW_RF DZ6903_RF DZ6905_RF DZ6902_RF DZ6904_RF UATCP_RF LATCP_RF MCNS_RF C2111 C2109 C2101 U2101 Q2101 U3703 U3702 L3703 U3701 D3701D3702 SE2_RF XCVR0_RF SWDSM_RF GSMPA_RF RXFIL_RF GSMRX_RF C6001_RF L3704 L6710_RF L6321_RF L6308_RF L6307_RF L6313_RF L6312_RF R6404_RF R6402_RF R7106_RF R7104_RF R6401_RF C6307_RF L6328_RF L7709_RF L6301_RF L6309_RF L6306_RF C6301_RF L6320_RF C6305_RF L6305_RF L6322_RF C7111_RF C6311_RF L6310_RF R6501_RF L6318_RF L6319_RF L6324_RF L6323_RF L6325_RF C6349_RF FL3906 FL3911 FL3908 FL3912 FL3909 FL7001_RF FL4106 L4022 L4021 L6700_RF L6200_RF L6101_RF L6104_RF L6102_RF L6103_RF L6110_RF L6109_RF L6111_RF L6201_RF L7122_RF C6729_RF C6508_RF C6511_RF C6332_RF C6507_RFC6510_RF C6509_RF C6512_RF C6302_RF C7120_RF C6002_RF C6003_RF C2105 C6416_RF C7123_RF C6411_RF C7119_RF C6309_RF C6308_RF C6306_RF C6348_RF C6350_RF R6605_RF R6502_RF R6503_RF C4005 C7106_RF C7004_RF C4003 C7103_RF C7113_RF C1751 C1753 C1743 C1746 C1738 C1750 C1749 C1747C1745 C1737 C1741 C1739 C1740 C1754 C1752 C1744 C1742 C7523_RF C7524_RF C7528_RF C7201_RF R2104 R2703 R2704 R2105 R4803 R4804 R4805 R3808 R3807 R3701 R3915 R4001 R7131_RF R7130_RF R7132_RF R1704 R1703 R6904_RFR1701 C2710 C6351_RF C6101_RF C6104_RF C6317_RF C6342_RF C6316_RF C6314_RF C6315_RF C6323_RF C6325_RF C6335_RF C6346_RF C6343_RF C6318_RF C6319_RF C6320_RF C6106_RF C6107_RF C6108_RF C6340_RF C6103_RF C6102_RF C6329_RF C6352_RF C6341_RF C6328_RF C6105_RF C6807_RF C6336_RF C6337_RF C6324_RF C6344_RF C6345_RF C6334_RF L7123_RF C6112_RF C6004_RF C6005_RF C2706 C6418_RF C6735_RF C6400_RF C6401_RF C7133_RF C7127_RFC7129_RF C6503_RF C6620_RF C6113_RF C6114_RF C 6116_RF C6115_RF C1718 C1711 C1706 C7016_RF C7015_RF C6333_RF C6204_RF C6205_RF C6203_RF C6117_RF C6118_RF C6111_RF C7531_RF C6109_RF C6110_RF C7131_RF C7130_RF C7132_RF C 7710_RF C7729_RF C7711_RF C7709_RF C6732_RF C2422 C2421 C6731_RF C6733_RF C6730_RF C2423 R6711_RF C1723 C1732 C1728 C1756 C1731 C1717 C3711 C4006 SWLATCP_RF C3719 C3706 C3721 C3704 C3705 C3720C3725 MHBDSM_RF LBDSM_RF SH0402 C7504_RF C0809 C0810 C0807 C0808 XW1804 XW1806 C1513 C1602 C1853 C1458 C1528 C1403 C1459 C1506 C1857 C1444 C1436 C1501C7602_RF C2309 C3208 C3211 C1850C1846 C2302 C2308 C7517_RF C1408 C1434 C2307 C7511_RF C1863 C1401 C1414 C1862 C1865 C1839 C1834 C1843 C1832 C1826 C1838 C1842 C1844C1807 C1837 C1819 C1845 C1831 C1818 C1825 C1829 C1840 C1822 C1864 C1801 C1803 C1813 C1814 C1866 C1827 C1833 C1821 C1828 C1820 C1915 C1805 C2304 C1912 C2303 C1809 C1823 C1830 C1835 C1874 C1836 C1802 C1841 C1816 C5621_RF C5701_RF C5622_RF C5625_RF C5703_RF C5702_RF C5623_RF FD0406 R2004 R1901 R5511_RF FL2506 FL2502 FL2500 FL2503 R7703_RF L7700_RF R7700_RF R4817 R4816 R0804 R2009 R7502_RF R7510_RF R7701_RF R1602 R1601 R1116 R0702 R1101 R0803 R5909_RF R5910_RF R5601_RF R1118 R1210 R1113 R1114 R2012 R7600_RF R3602 R3605 R2006 R3304 R0801 R0807 R0806 R3202 R2005 R2700 R2020 R1303 R0907 R0906 R1103 R3604 R3607 R3601 R7599_RF R0504 R0508 R0501 R0503 R0505 R0509 R3201 R4714 R4713 R5807_RF R2000 R6921_RF R6922_RF R5907_RF R5908_RF R4716 R4715 R4801 R4802 R1503 R1501 R1505 R1504 R1506 R1502 R5802_RF R5801_RF R4703 R4704 R0900 R5806_RF R4702 R4701 R5912_RF R5502_RF C0414 C4817 C4816 C4704 C4703 C2501 C2504 C2518 C2511 C2515 C4143 C1870 C2618 C2306 C3113 C3112 C0910 C1868 C1909 C2001 C2013 C0700 C0903 C0902 C7503_RF C1606C0701 C1601 C1609C1613 C0803 C1004 C0813 C0814 C0811 C0812 C3215 C3213 C3214 C3220 C3212 C5750_RF C3607 C0704 C3602 C3606 C0804 C0802 C3601 C5801_RF C5501_RF C7522_RF C2010 C2011 C1006 C7521_RF C7603_RF C3106 C3107 C5635_RF C1011 C1010 C0907 C0906 C0415 C0416 C7600_RF C7607_RF C1005 C7601_RF C7606_RF C1002 C2531 C2519 C2507 C2527 C1507 C1921 C1519 C1875 C1515 C1614C0900C1449 C1529 C1608 C7526_RFC7506_RF C1522 C0901 C7527_RF C1448 C1927 C1913 C1504 C1908 C1877 C1852 C0705 C0806 C1607 C1922 C1604 C1918 C1904 C1013C1518 C1851 C1610 C1611 C1514C1612 C1848 C1859 C1849C1847 C1001C1605 C1511 C1466 C5746_RF C1919 C2704 C5748_RF C5752_RF C5751_RF C5747_RF C5749_RF C5742_RF C5739_RF C3205 C1855 C1856 C5755_RF C5736_RF C1603 C1926 C1916 C3209 C5743_RF C5740_RF C5732_RF C5729_RF C5754_RF C5737_RF C5735_RF C5753_RF C3603 C1858 C5733_RF C1854 C5731_RF C5744_RF C5704_RF C5734_RF C5745_RF C3604C1876 C5738_RF C6900_RF PP7605_RF PP7615_RF PP7614_RF PP7613_RF PP7616_RF PP7612_RF PP7606_RF PP7607_RF PP7503_RF PP7504_RF PP7509_RF PP1402PP1401 PP1408 PP1403 PP7610_RF PP7624_RF PP6981_RF PP7500_RFPP7505_RF PP7617_RFPP7506_RF PP7507_RF PP7508_RF PP0701 PP7620_RF PP7622_RF PP7623_RF PP7621_RF PP7611_RF PP1409 PP2002 PP7619_RFPP7618_RF PP7609_RF PP6913_RF PP5304 PP2001 PP6926_RF PP6911_RF PP6925_RF PP6924_RF PP6909_RF PP6930_RF PP6900_RF PP6908_RF PP5303 PP6904_RF PP6903_RF PP6907_RF PP6912_RF RFBUF_RF C3605 U3602 L1802 U2301 U3603 WLAN_RF U2501 W2BPF_RF W25DI_RF L1805 NFC_RF U1801 Y2001 NFBST_RF C1435 C1439 L7600_RF C1405 C1412 C1422 C1430 C1402 C1427 C1502 C1465 C1409 C1452 C1454 L7502_RF C1433 C1417 C1460 C1461 C1411 C1407 C1503 C1437 C1416 C1404 C7604_RF C1421 C1432 C1426 C1440 C1413 C1406 C1442 C1456 C1419 C1424 C1457C1425 C1429 C1418 C1423 C1431 C1438 C1415 C1410 C1428 C1527C1420 U3601 C5627_RF C5604_RF C2301 C3203 C3201 C3202 C3204 C5608_RF Y0700 U1101 U3101 EPROM_RF R2010 R2011 C7702_RF L7701_RF L7702_RF L7703_RF R7704_RF C2002 C2006 C5804_RF C5629_RF C2509 C1101 C1925 C0800 C1933 C3217 C3221 C3222 C3223 C3224 C3225 C1935 C7502_RF C7505_RF C7500_RF C7520_RF C5605_RF C5626_RF C5628_RF C5611_RF C5607_RF C5613_RF C5602_RF C5603_RF C5609_RF C5610_RF C5612_RF C5901_RF C5726_RF C5720_RF C5711_RF C5715_RF C5719_RF C5728_RF C5721_RF C5708_RF C5714_RF C5707_RF C5716_RF C5724_RF C5712_RF C5710_RF C5705_RF C5727_RF C5717_RF C5709_RF C5713_RFC5725_RF C5706_RF C5722_RF C5723_RF C5718_RF FL1501 FL0700 R2301 R0701 R3603 R0413 R0800 R2015 R2007 R7506_RF R0700 R1001 R5906_RF R5206 R5503_RF R3104 R3103 R3611 R5803_RF R5505_RF R5504_RF R5501_RF C1902 C5636_RF C2502 C2004 C2003 C5502_RF C5905_RF C7703_RF C7706_RF C7705_RF C7700_RF C7704_RF C7707_RF C7701_RF C1509 C1523 C1510 C1508 C1932 C7708_RF C0702 C0703 C5902_RF C5741_RF C5904_RF C5601_RF BBPMU_RF Y5501_RF C5630_RF C5631_RF C5615_RF SH0400 Q4001 R2706 J4504 XW4501 PP5302 D10 PCB: 820-00188-08 VIETMOBILE.VN
D10 MLB - DVT Schematic & PCB Callouts <rdar://problem/16684269> MCO 056-01342 System Block Diagram: BRD 820-00188 SCH 051-00419 SOC:MIPI AND ISP 48 SMALL FORM FACTOR SPECIFIC <SYNC_DATE43> LAST_MODIFICATION=Tue Jun 14 15:20:28 2016 62 <CSA_PAGE60> WIFI FRONT-END [77] <SYNC_MASTER1> SOC:LPDP <SYNC_MASTER48> <SYNC_MASTER47> <SYNC_MASTER51> <SYNC_MASTER62> <SYNC_MASTER61> <SYNC_DATE59> <SYNC_DATE58> SOC:PCIE <CSA_PAGE7> page1 [1] <CSA_PAGE1> 1 <CSA_PAGE5> page1 <SYNC_MASTER59> I2C MAP AOP <SYNC_MASTER60> <SYNC_MASTER18> <SYNC_DATE15> <CSA_PAGE57> <CSA_PAGE53> spare SYSTEM:BOARDID SYSTEM:MECHANICAL, TESTPOINTS 7 <SYNC_MASTER12> <SYNC_MASTER13> PMU: CONTROL AND CLOCKS PMU: SWITCHERS AND LDOS <SYNC_MASTER73> <SYNC_MASTER74> TRANSCEIVER0/1: PRX PORTS TRANSCEIVER0/1: POWER 65 <SYNC_MASTER78> 32 <SYNC_MASTER65> <SYNC_DATE55> SOC:POWER (1/3) <CSA_PAGE13> B2B FILTERS: UTAH B2B:DOCK FLEX ARC:DRIVER <SYNC_DATE47> <SYNC_MASTER4> <CSA_PAGE72> <SYNC_MASTER28> <SYNC_MASTER26> <CSA_PAGE87> <SYNC_DATE33> <SYNC_MASTER22> <CSA_PAGE3> <CSA_PAGE90> <CSA_PAGE86> <SYNC_MASTER43> <SYNC_MASTER50><SYNC_MASTER5> <SYNC_MASTER7> SYSTEM POWER:PMU (2/3) <CSA_PAGE64> <SYNC_DATE63> <SYNC_DATE65> <SYNC_DATE67> <SYNC_MASTER75> PMU: ET MODULATOR B2B:FOREHEAD <SYNC_MASTER38> B2B: SMALL FF SPECIFIC AUDIO:CALTRA CODEC (1/2) Accessory: Buck Circuit 8 <CSA_PAGE9> 59 24 21 SYSTEM POWER:PMU (1/3) BASEBAND GPIOS <SYNC_MASTER25> <SYNC_DATE9> SYSTEM POWER:PMU (3/3) AUDIO:CALTRA CODEC (2/2) 70 SOC:JTAG,USB,XTAL <CSA_PAGE6> B2B:ORB & MESA B2B FILTERS: DISPLAY & TOUCH 33 <CSA_PAGE25> <SYNC_MASTER37> 2 <SYNC_MASTER15> <SYNC_MASTER14> <SYNC_DATE8> 50 SYSTEM POWER:BATTERY CONN <SYNC_MASTER17> SOC:SERIAL spare <SYNC_DATE14> <SYNC_DATE37> <CSA_PAGE88> NAND 56 SOC:AOP 14 BOM_OMIT_TABLE 64 SOC:POWER (2/3) SOC:POWER (3/3) <CSA_PAGE24> <SYNC_MASTER19> AUDIO:SPEAKER AMP 2 <SYNC_MASTER86> <SYNC_MASTER80> <SYNC_MASTER63> <SYNC_MASTER76> spare <SYNC_MASTER42> UPPER ANTENNA FEEDS <SYNC_MASTER70> <SYNC_DATE64> <SYNC_MASTER66> <SYNC_MASTER69> <CSA_PAGE59> <SYNC_DATE66> <SYNC_MASTER29> <SYNC_DATE76> 75 DIVERSITY RECEIVE LNA'S <SYNC_DATE1> spare <SYNC_MASTER8> <SYNC_MASTER6> CELL,WIFI,NFC MLB UNIQUE <SYNC_MASTER20> <SYNC_MASTER21> <SYNC_MASTER24> <SYNC_MASTER32> <SYNC_MASTER11> <SYNC_MASTER10> BOM LIST 6 <SYNC_MASTER36> <SYNC_MASTER39> <SYNC_MASTER40> <SYNC_MASTER9> BASEBAND: POWER2 page1 26 39 <SYNC_DATE57> <SYNC_MASTER35> 44 <SYNC_MASTER31> 13 47 67 <CSA_PAGE68> ARC:MAGGIE NFC <SYNC_DATE74> <SYNC_DATE11> <SYNC_MASTER57> 66 <SYNC_MASTER58> <SYNC_DATE61> <SYNC_DATE46> <SYNC_DATE50> <SYNC_DATE48> <SYNC_DATE49> <SYNC_DATE53> <SYNC_DATE51> <SYNC_DATE52> <SYNC_DATE56> <SYNC_DATE62> <SYNC_DATE60> <SYNC_DATE69> <SYNC_DATE68> <SYNC_DATE75> <SYNC_DATE77> <SYNC_DATE73> <SYNC_DATE72> <SYNC_DATE71> <SYNC_DATE81> <SYNC_DATE80> <SYNC_DATE79> <SYNC_DATE78> <SYNC_DATE82> <SYNC_DATE83> <SYNC_DATE84> <SYNC_DATE89> <SYNC_DATE90> <SYNC_DATE88> <SYNC_DATE87> <SYNC_DATE86> <SYNC_DATE85> <SYNC_MASTER49> <SYNC_MASTER52> <SYNC_MASTER53> <SYNC_MASTER71> <SYNC_MASTER64> <SYNC_MASTER90> <SYNC_MASTER89> <SYNC_MASTER88> <SYNC_MASTER87> <SYNC_MASTER85> <SYNC_MASTER84> <SYNC_MASTER83> <SYNC_MASTER82> <SYNC_MASTER81> <SYNC_MASTER79> <CSA_PAGE48> <CSA_PAGE49> <CSA_PAGE50> <CSA_PAGE46> <CSA_PAGE47> <CSA_PAGE55> <CSA_PAGE51> <CSA_PAGE52> <CSA_PAGE58> <CSA_PAGE56> <CSA_PAGE54> <CSA_PAGE62> <CSA_PAGE63> <CSA_PAGE61> <SYNC_DATE5> <SYNC_DATE3> <SYNC_DATE2> <SYNC_DATE4> <SYNC_DATE6> <SYNC_DATE13> <SYNC_DATE12> <SYNC_DATE10> <SYNC_DATE17> <SYNC_DATE16> <SYNC_DATE18> <SYNC_DATE7> <SYNC_DATE19> <CSA_PAGE65> <CSA_PAGE66> <CSA_PAGE67> <CSA_PAGE69> <CSA_PAGE70> <CSA_PAGE71> <CSA_PAGE73> <CSA_PAGE74> <CSA_PAGE75> <CSA_PAGE76> <CSA_PAGE77> <CSA_PAGE82> <CSA_PAGE81> <CSA_PAGE80> <CSA_PAGE79> <CSA_PAGE78> <CSA_PAGE83> <CSA_PAGE84> <CSA_PAGE85> <CSA_PAGE89> <SYNC_DATE20> <SYNC_DATE26> <SYNC_DATE28> <SYNC_DATE31> <SYNC_DATE32> <SYNC_DATE30> <SYNC_DATE29> <SYNC_DATE23> <SYNC_DATE40> <SYNC_DATE39> <SYNC_DATE38> <SYNC_DATE35> <SYNC_DATE36> <SYNC_DATE42> <SYNC_DATE41> <SYNC_DATE44> <CSA_PAGE4> <SYNC_MASTER16> <SYNC_MASTER27> <SYNC_MASTER30> <SYNC_MASTER41> <CSA_PAGE8> <CSA_PAGE10> <CSA_PAGE11> <CSA_PAGE12> <CSA_PAGE14> <CSA_PAGE15> <CSA_PAGE17> <CSA_PAGE18> <CSA_PAGE19> <CSA_PAGE20> <CSA_PAGE33> <CSA_PAGE32> <CSA_PAGE31> <CSA_PAGE30> <CSA_PAGE28> <CSA_PAGE27> <CSA_PAGE26> <CSA_PAGE23> <CSA_PAGE22> <CSA_PAGE21> <CSA_PAGE34> <CSA_PAGE45> <CSA_PAGE44> <CSA_PAGE43> <CSA_PAGE42> <CSA_PAGE41> <CSA_PAGE40> <CSA_PAGE39> <CSA_PAGE38> <CSA_PAGE36> <CSA_PAGE35> 79 78 77 76 72 69 63 61 60 58 57 53 52 51 49 46 45 43 42 41 38 37 35 31 29 28 27 22 20 19 17 16 11 10 9 4 3 TDD TRANSMIT LOWER ANTENNA & COUPLERS RECEIVE MATCHING I2C TABLE I2C MAP: AP, TOUCH, HOMER, I2C5 spare <SYNC_MASTER77> DIVERSITY RECEIVE ASM'S <SYNC_DATE24> 40 <SYNC_MASTER33> <SYNC_MASTER45> 74 73 54 55 5 81 ICEFALL, SIM, DEBUG_CONN FDD TRANSMIT 34 25 18 12 TRISTAR 2 <CSA_PAGE29> 30 MLB SPECIFIC: BOM TABLE <CSA_PAGE2> <SYNC_DATE45> AUDIO:SPEAKER AMP 1 TRINITY: FF SPECIFIC SOC:GPIO & UART TRANSCEIVER0/1: TX PORTS 71 SYSTEM POWER:CHARGER 15 <SYNC_MASTER2>SYSTEM:BOM TABLES <CSA_PAGE16> DISPLAY & MESA:POWER BASEBAND: CONTROL 68 <SYNC_DATE25> <CSA_PAGE37> spare <SYNC_MASTER54> <SYNC_MASTER67> CAMERA:STROBE DRIVER 36 <SYNC_MASTER34> <SYNC_MASTER68> <SYNC_MASTER72> TEST POINTS & BOOT CONFIG 80 <SYNC_DATE34> <SYNC_MASTER23> TABLE OF CONTENTS UAT MATCH AND TUNER CONNECTOR [2] <SYNC_DATE22> <SYNC_DATE21> SENSORS 23 <SYNC_MASTER56> <SYNC_MASTER55> <SYNC_DATE54> <SYNC_DATE70> PERENNIAL <SYNC_MASTER3> <SYNC_MASTER44>B2B FILTERS: RIGHT BUTTON FLEX <SYNC_DATE27> SYSTEM POWER:BOOST WIFI_MLB SCHEMATIC <SYNC_MASTER46> 2016-06-1400064008778 ENGINEERING RELEASED TABLE OF CONTENTS TABLE OF CONTENTS CRITICALPCB1820-00188 PCBF,MLB,D10 ? CRITICAL ?SCH1 SCH,MLB,D10051-00419 CONTENTSPAGE <CSA> SYNC DATESYNC<CSA> CONTENTSPAGEDATE ECNREV DESCRIPTION OF REVISION 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. APPD DATE 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL TABLE_5_ITEM 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
NAND BOM Options Carbon Alternates Magnesium Alternates DDR PLL Alternate Mamba LDO Alternates I2C5 Alternate Global R/C Alternates ACC BUCK CIRCUIT Alternates Global Ferrite Alternates For Chestnut inductor; so it doesn't interfere with PMU inducotr Buck 7 alts reverted 11/13 UT LDO Alternates Except BUCK5 LX (BUCK5 LX is Taiyo only) #22686038:See Radar Global Varistor Alternates Active Diode Alternate Power Inductor Alternates updated 11/12 updated 11/12 152S00120 152S00077 ALTERNATE For Chestnut inductor onlyALL ALTERNATE152S00398 152S00204 ALL IND,PWR,0.22UH,20%,6.7a,23MOHM,2012 ALTERNATE152S00297 ALL152S00365 CYNTEC 2012 1UH 152S1843 CYNTEC 2012 1UHALTERNATE152S00297 ALL IND,MULT,1UH,1.2A,0.320 OHM,0603152S00366152S00402 ALLALTERNATE IND,PWR,SHLD,15 UH,0.72A,0.900 OHM,3225ALTERNATE152S1936152S00123 ALL 152S00121 152S00081 IND,PWR,SHLD,0.47 UH,3.8A,0.048 OHM,2012ALTERNATE ALL ALTERNATE IND,PWR,SHLD,1.0 UH,2.25A,0.150 OHM,2016152S00077 ALL152S00397 ALTERNATE ALL IND,PWR,SHLD,1.2 UH,3.0A,0.080 OHM,2016152S00118 152S00075 IC,LOAD SWITCH,WLCSP4353S01039 ALTERNATE U2710353S01007 PFET,12V,CSP4376S00164 ALTERNATE Q2700,Q2701376S00166 L2700 IND,MLD,0.47UH,2.5A,80Mohm,1608152S00557152S00558 ALTERNATE ALTERNATE371S00087 D2700 DIODE,SHOTTKY,30V,200MA,0201371S00064DIODES INC. ACT DIODEALTERNATE376S00047376S00106 Q2101 NAND,H,128GB,16nm,TLC335S00182 1 U1701 CRITICAL NAND_128G FERR, 240OHM, 0.38OHM DCR, 0201ALTERNATE155S0581 ALL155S00067 FLTR, 65 OHMS, 0605155S00012 ALLALTERNATE155S00168 FERR BD, 150OHM, TYALLALTERNATE155S00200 155S0610 FERR BD, 0.47UH, TY152S00489 ALLALTERNATE152S00456 ALLALTERNATE155S00194 FERR BD, 150OHM, TDK155S0610 377S0140 ALL377S0168 ALTERNATE VARISTOR, 6.8V, 100PF, 01005 138S0648 CAP,X5R,4.7UF,6.3V,0.65MM,0402,TAIYO138S0652 ALTERNATE ALL 138S00003 ALTERNATE138S00005 ALL CAP,X5R,15UF,6.3V,0.65MM,0402,TAIYO 132S0436132S0400 ALTERNATE ALL CAP,X5R,0.22UF,6.3V,01005,TDK 152S00117 152S00074 IND,PWR,SHLD,1.0 UH,3.0A,0.060 OHM,2016ALTERNATE L1806,L1810,L1814,L1816,L1817 ALTERNATE138S00003138S00048 CAP,X5R,15UF,6.3V,0.65MM,0402,KYOCERAALL ALTERNATE CAP,CER,3-TERM,7.5UF,20%,4V,0402,TAIYO/TDK138S0986 ALL138S00024 FERR, 240OHM, 0.38OHM DCR, 0201155S0581 ALTERNATE ALL155S00067 ALTERNATE FL1501 FERR BD,100OHM,25%,100MA,2OHM,01005155S00068155S00095 U1701335S00182 ALTERNATE335S00179 SD,15nm,TLC,128GB 132S0436 132S0400 CAP,CER,X5R,0.22UF,20%,6.3V,20%ALLALTERNATE CAP,CER,1UF,20%,10V,X5R,0201,KYOCERAALL138S0945 ALTERNATE138S0739 138S0739 ALTERNATE CAP,CER,1UF,20%,10V,X5R,0201,MURATAALL138S0706 138S0702 ALTERNATE ALL CAP, X5R, 4.3UF, 4V, 0610138S0657 118S0764 ALTERNATE ALL RES, 3.92K, 0.1%, 0201118S0717 138S00006 CAP, 3-TERM, 4.3UF, 4V, 0402ALTERNATE138S0835 ALL I2C5 ALTERNATEALTERNATE335S00234 335S00233 U1101 U3801353S00932 353S00576 ALTERNATE ST, LDO REG, 2.75V 335S00180 T,15nm,TLC,128GBALTERNATE U1701335S00182 335S00182335S00195 U1701ALTERNATE SS,1Ynm,TLC,128GB 335S00169 ALTERNATE U1701 S,16nm,MLC,32GB335S00209 U1701ALTERNATE335S00183 SS,3Dv3,TLC,256GB335S00190 CAP,X5R,15UF,20%,,6.3V,0.65MM,HRZTL,0402 C1748,C1713,C1716,C1721,C17335 NAND_128G138S00003 CRITICAL 138S0867 5 CAP,X5R,10UF,20%,6.3V,0.65MM,HRZTL,0402 C1748,C1713,C1716,C1721,C1733 CRITICAL NAND_32G NAND,H,256GB,3Dv3,TLC335S00156 1 U1701 CRITICAL NAND_256G NAND,H,32GB,16nm,MLC1 CRITICALU1701335S00169 NAND_32G ST, LDO REG, 2.925V, CSP 0.65x0.65ALTERNATE U2501353S00015353S00889 Updated version of CarbonALTERNATE338S00087 338S00226 U2401,U2404 ALTERNATE Larger Wafer (-29 flow) Magnesium338S00203338S00173 U2402 335S00183 U1701 SD,3Dv2,TLC,256GBALTERNATE335S00148 335S00169335S00201 U1701 T,15nm,MLC,32GBALTERNATE C1748,C1713,C1716,C1721,C17335 CAP,X5R,15UF,20%,,6.3V,0.65MM,HRZTL,0402138S00003 CRITICAL NAND_256G TABLE_5_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_5_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
D10x Specific BOM Callouts Cap 2.2UF Alternates CAYMAN DDR Alternates #24629229 #25634778: Exclude Kyocera as 2.2UF alt at only C2507/C2531 REFDES (other refdes no impact) #24681501 D10 EEEE CALLOUTS R4808,R4809 UTAH_CRES,MF,1K OHM, 5%, 1/32W, 01005117S0156 2 CRITICAL EEEE_SUPREMECRITICALEEEE_GXD6825-6838 1 EEEE CODE FOR 639-01755 EEEE_BEST1 EEEE CODE FOR 639-01754 EEEE_GXD5 CRITICAL825-6838 CRITICAL EEEE_SUPREME_ROWEEEE_H6TGEEEE CODE FOR 639-02373825-6838 TAIYO,IND,PWR,SHLD,1UH,3.6A,0.060OHM,20161152S00117 CRITICALL1803 EEEE_EXTREME_ROWEEEE CODE FOR 639-02374 EEEE_H6TH825-6838 CRITICAL1 EEEE_BEST_ROW1 CRITICALEEEE_H6TFEEEE CODE FOR 639-02372825-6838 825-6838 EEEE_EXTREMEEEEE_GXD7 CRITICAL1 EEEE CODE FOR 639-01756 ALTERNATE ALL DDR-S, 2G, B1 ALTERNATE ALL339S00253 DDR-H, 2G, B1 B5LX_TAIYO 339S00253 1 339S00255 339S00254 (C2507,C2531)138S00032 CAP,CER,X5R,2,2UF,20%6.3V,20%, KYOCERAALTERNATE138S00049 CAP,CER,X5R,2,2UF,20%,6.3V,20%,MURATAALLALTERNATE138S00032138S0831 TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
Current as of D10 MCO 056-01342-78 Back Shields DFU FORCE DFU O TP IS TO HELP WITH USB SI IN THE FACTORY FIXTURE. #25244799 MOJAVE ANALOG MUX A OUTPUT 100k to 200k ANALOG MUX B OUTPUT FOR DIAGS E75 Contained in radio_mlb pages Front Shields O O TOP SIDE FIDUCIALS LCM POWER GROUND VBUS LCM BACKLIGHT SINK2 LCM BACKLIGHT SINK1 LCM BACKLIGHT SOURCE AMUX TESTPOINTS VBATT ACCESSORY ID AND POWER Note: Fiducial used as test pointVDD_MAIN POWER GND TP 1TP0408 1 FD0408 1 FD0400 1TP0419 1 ZT0404 1 ZT0401 2 1 R0413 1TP0413 1TP0423 1TP0424 1TP0410 1TP0409 1TP0411 1TP0400 1TP0401 1TP0412 1TP0416 1TP0407 1TP0406 1TP0405 1TP0404 1TP0403 1TP0402 1TP0414 1TP0422 1TP0415 1TP0421 1TP0420 1 FD0407 2 1 C0413 2 1 C0414 2 1 C0415 2 1 C0416 2 1 C0418 2 1 C0419 2 1 C0420 2 1 C0421 2 1 C0422 2 1 C0417 2 1 C0408 2 1 C0409 2 1 C0410 2 1 C0411 2 1 C0412 2 1 C0407 2 1 C0402 2 1 C0406 2 1 C0405 2 1 C0404 2 1 C0403 2 1 C0401 1 BS0406 1 SH0403 1 SH0401 1 SH0400 1 SH0402 1CL0401 1 BS0405 1 BS0403 1 BS0402 1 FD0410 1 FD0409 1 FD0406 1 FD0405 1 FD0404 1 FD0403 1 FD0402 CHASSIS_GND_BS403 PP_LCM_BL_ANODE_CONN PP_LCM_BL_CAT2_CONN 90_TRISTAR_DP2_CONN_P CHASSIS_GND_BS402 PMU_AMUX_BY PP16V0_MESA CHASSIS_GND_BS402 90_TRISTAR_DP1_CONN_N PP_LCM_BL_CAT1_CONN PP_TRISTAR_ACC2 PP5V0_USB PP_BATT_VCC PP_VDD_MAIN PMU_AMUX_AY TRISTAR_CON_DETECT_L MESA_TO_BOOST_EN CHASSIS_GND_BS401 PP_TRISTAR_ACC1 90_TRISTAR_DP2_CONN_N 90_TRISTAR_DP1_CONN_P PMU_TO_AP_FORCE_DFU NORTH_SCREW_EXPOSED CHASSIS_GND_BS403 STDOFF-2.9OD1.9ID-0.85H-SM SM SHLD-EMI-LOWER-FRT-D10 SM SHLD-EMI-UPPER-FRT-D10 SM SHLD-EMI-UPPER-BK-D10 SM SHLD-EMI-LOWER-BK-D10 SM-SP CLIP-MLB-COAX-RETENTION-D10 STDOFF-2.56OD1.4ID.99H-SM STDOFF-2.56OD1.4ID.99H-SMSTDOFF-2.56OD1.4ID-1.10H-SM FID 0P5SM1P0SQ-NSP ROOM=ASSEMBLY ROOM=ASSEMBLY FID 0P5SM1P0SQ-NSP 0P5SQ-SMP3SQ-NSP FID ROOM=ASSEMBLY FID 0P5SM1P0SQ-NSP ROOM=ASSEMBLY FID 0P5SQ-SMP3SQ-NSP ROOM=ASSEMBLY FID ROOM=ASSEMBLY 0P5SQ-SMP3SQ-NSP 0P5SQ-SMP3SQ-NSP ROOM=ASSEMBLY FID ROOM=TEST TP-P55 ROOM=TEST FID 0P5SM1P0SQ-NSP FID ROOM=TEST 0P5SQ-SMP3SQ-NSP TP-P55 ROOM=TEST 2.70R1.80-NSP 2.70R1.80-NSP 1% 1/32W 200K MF 01005 ROOM=PMU TP-P55 ROOM=TEST TP-P55 ROOM=TEST TP-P55 ROOM=TEST ROOM=TEST TP-P55 ROOM=TEST TP-P55 TP-P55 ROOM=TEST TP-P55 ROOM=TEST ROOM=TEST TP-P55 TP-P55 ROOM=TEST TP-P55 ROOM=TEST ROOM=TEST TP-P55 TP-P55 ROOM=TEST ROOM=TEST TP-P55 ROOM=TEST TP-P55 ROOM=TEST TP-P55 TP-P55 ROOM=TEST TP-P55 ROOM=TEST ROOM=TEST TP-P55 TP-P55 ROOM=TEST ROOM=TEST TP-P55 ROOM=TEST TP-P55 ROOM=TEST FID 0P5SM1P0SQ-NSP 5% 01005 100PF 16V NP0-C0G 25V 01005 5% 56PF NP0-C0G-CERM 16V 2% CERM 01005 18PF 4PF 16V 01005 NP0-C0G +/-0.1PF C0G-CERM 10V 5% 220PF 01005 100PF 16V NP0-C0G 5% 01005 25V 5% 56PF NP0-C0G-CERM 01005 2% 18PF CERM 01005 16V NP0-C0G 16V 4PF +/-0.1PF 01005 220PF C0G-CERM 5% 10V 01005 220PF 01005 5% C0G-CERM 10V 5% 100PF 16V NP0-C0G 01005 NP0-C0G-CERM 01005 25V 5% 56PF CERM 2% 18PF 01005 16V 4PF 16V +/-0.1PF 01005 NP0-C0G 10V 01005 5% 220PF C0G-CERM 01005 10V 5% C0G-CERM 220PF NP0-C0G 16V +/-0.1PF 01005 4PF CERM 01005 16V 18PF 2% 01005 25V 5% 56PF NP0-C0G-CERM 100PF 5% NP0-C0G 16V 01005 C0G-CERM 01005 5% 10V 220PF 4 45 39 45 39 41 40 4 20 38 37 4 41 40 45 39 41 40 41 40 21 22 21 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 20 41 40 38 37 44 41 40 41 40 41 40 20 12 4 A A A A A A A A A A A A A A A A A A A A A A A 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
01101 D101 DEV SELECTED --> 1101 PROTO2 1100 PROTO2v5 1011 EVT1 1010 EVT2 xxxx SPARE 1000 CARRIER xxxx SPARE SELECTED --> 01000 D10 MLB 01110 D111 MLB 01111 D111 DEV 01100 D101 MLB 01011 D11 DEV 01010 D11 MLB 01001 D10 DEV 0=EUREKA, 1=KAROO 0=MLB, 1=DEV 0=FORM FACTOR A, 1=FORM FACTOR B FLOAT=LOW, PULLUP=HIGH 000 SPI0 001 SPI0 TEST MODE 010 NVME0_X2 BOOT_CONFIG[2:0] FLOAT=LOW, PULLUP=HIGH xxxx SPARE 0000 PVT 0010 DVT 1110 PROTO1 1111 Pre-Proto w/D520 (non enclosure) FLOAT=LOW, PULLUP=HIGH BOARD_REV[3:0] 0=FORM FACTOR A, 1=FORM FACTOR B BOOT_CONFIG1=No connect BOOT_CONFIG0=No connect SELECTED --> 111 FAST SPI0 TEST BOARD_ID[4:0] 110 SLOW SPI0 TEST 100 NVME0 X1 101 NVME0 X1 TEST 011 NVME0 X2 TEST BOARD_ID0=No connect 0=EUREKA, 1=KAROO BOARD_ID4=No connect BOARD ID BOOT CONFIG BOOTSTRAPPING:BOARD REV PP1V811 PP1V812 21R0509 21R0505 21R0508 21R0504 21R0503 21R0501 BOARD_ID2 BOARD_ID1 BOARD_REV0 BOARD_REV3 MAKE_BASE=TRUE MAKE_BASE=TRUE PP1V8 BOARD_REV1 BOARD_REV2 NOSTUFF 01005 5%MF 1/32W ROOM=SOC 1.00K MF ROOM=SOC 5% NOSTUFF 1.00K 1/32W01005 5%MF01005 ROOM=SOC 1/32W 1.00K ROOM=SOC MF 1/32W5%01005 1.00K NOSTUFF 01005 MF 5% ROOM=SOC 1/32W 1.00K NOSTUFF ROOM=SOC 1/32W01005 MF 1.00K 5% NOSTUFF 11 11 12 12 5248474639 2925181716131211987 12 12 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
tbd - tbd V @5mA MAX 3.14-3.46V @20mA MAX VDD18_USB: 1.71-1.89V @20mA MAXSOC - USB, JTAG, XTAL Dev ONLY VDD18_AMUX: 1.62-1.98V @1mA MAX VDD11_XTAL:1.06-1.17V @TBD mA MAX CL42 CM42 CK35 CC25 CG26 CE25 AJ60 CL20 CG50 CH26 CK26 CJ26 CM26 CL26 CM20 CM22 BJ2 BL3 BL65 CL29 CK33 CG37 CJ35 CH37 CL31 BJ4 CM14 BJ3 N64 U0700 1 PP0701 2 1 R0700 2 1 C0705 2 1 C0702 2 1 R0701 21 R0702 31 42 Y0700 2 1 C0703 21 FL0700 2 1 C0704 2 1 C0701 2 1 C0700 SWD_DOCK_TO_AP_SWCLK PP1V8 PP3V3_USB PP1V8 AP_TO_PMU_TEST_CLKOUT SWD_DOCK_BI_AP_SWDIO PMU_TO_SYSTEM_COLD_RESET_L PMU_TO_AOP_TRISTAR_ACTIVE_READY AP_TO_NAND_RESET_L XTAL_AP_24M_IN PP1V1 AP_USB_REXT SOC_24M_O XTAL_AP_24M_OUT USB_VBUS_DETECT AP_TO_PMU_AMUX_OUT 90_USB_AP_DATA_P AP_TO_PMU_WDOG_RESET PP1V1_XTAL PP0V9_SOC_FIXED 90_USB_AP_DATA_N CKPLUS_WAIVE=PWRTERM2GND CSP CAYMAN-2GB-20NM-DDR-M P2MM-NSM SM 01005 1/32W MF 1% 200 ROOM=SOC ROOM=SOC 0201-1 X5R-CERM 20% 6.3V 2.2UF 16V CERM 12PF 5% 01005 ROOM=SOC MF ROOM=SOC 1/32W 01005 1% 511K 01005 0% MF 0.00 1/32W ROOM=SOC ROOM=SOC CRITICAL 1.60X1.20MM-SM 24.000MHZ-30PPM-9.5PF-60OHM 16V 5% 01005 CERM 12PF ROOM=SOC 01005 240-OHM-25%-0.20A-0.9DCR ROOM=SOC 01005 ROOM=SOC X5R-CERM 20% 6.3V 0.1UF 01005 X5R-CERM 20% 6.3V 0.1UF ROOM=SOC 01005 X5R-CERM ROOM=SOC 6.3V 0.1UF 20% 40 5248474639 29251817161312119875 19 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 20 40 20 13 40 37 20 13 17 1815 21 20 40 20 18151098 40 NC NC NC NC NC SYM 1 OF 16 VDD12_UH1_HSIC0 VDD_FIXED_USB VDD33_USB VDD11_XTAL ANALOGMUX_OUT WDOG XO0 XI0 USB_REXT USB_ID UH1_HSIC0_DATA UH1_HSIC0_STB JTAG_TRST* JTAG_TDO JTAG_SEL CFSB COLD_RESET* TST_CLKOUT S3E_RESET* JTAG_TMS JTAG_TDI JTAG_TCK TESTMODE HOLD_RESET VDD18_USB VDD18_AMUX USB_DM USB_DP USB_VBUS PP NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
D10 NAND is now Gen3 (was Gen2). Caps intentionally 0.22uF #24557655:replace with 20% caps. SI no negative impact VDD12_PCIE_REFBUF:1.08-1.26V @40mA MAX WLAN RX PP's are now managed on Page 52 PCIELINK3PCIELINK2 PCIELINK1PCIELINK0 LINK 1 USED ON AP_DEV ONLY VDD_FIXED_PCIE_xxx:0.855-0.990V @225mA MAX SOC - PCIE INTERFACES VDD12_PCIE: 1.14-1.26V @10mA MAX PCIE_WLAN_BI_AP_CLKREQ_L 52 90_PCIE_AP_TO_WLAN_REFCLK_P 52 PCIE_AP_TO_WLAN_RESET_L52 90_PCIE_AP_TO_WLAN_REFCLK_N 52 PCIE_BB_BI_AP_CLKREQ_L 52 90_PCIE_AP_TO_BB_REFCLK_P 52 PCIE_AP_TO_BB_RESET_L52 90_PCIE_AP_TO_BB_REFCLK_N 52 CC47 BW55 CA60 CA55 CE60 CE55 CC62 CC53 CE49 CC49 CE58 CK63 CJ63 CM57 CL57 CM50 CL50 CK44 CJ44 CM61 CL61 CK56 CJ56 CK52 CJ52 CM46 CL46 CG63 CL64 CM64 CK59 CJ59 CL54 CM54 CJ48 CK48 BJ66 BE64BG64 BJ65 CH57 CG57 BE66 BE65BG66 BC64 U0700 2 1 R0801 2 1 C0804 21 R0803 21 R0804 2 1 R0806 2 1 R0800 2 1 R0802 2 1 R0805 21 C0810 21 C0809 21 C0808 21 C0807 2 1 C0806 2 1 C0805 2 1 C0803 2 1 C0802 2 1 C0801 2 1 C0800 PCIE_AP_TO_NAND_RESET_L 90_PCIE_AP_TO_NAND_TXD_P 90_PCIE_AP_TO_NAND_TXD_N 90_PCIE_NAND_TO_AP_RXD_N 90_PCIE_NAND_TO_AP_RXD_C_N 90_PCIE_AP_TO_NAND_TXD_C_P 90_PCIE_NAND_TO_AP_RXD_P 90_PCIE_AP_TO_NAND_REFCLK_P PCIE_NAND_BI_AP_CLKREQ_L 90_PCIE_AP_TO_NAND_TXD_C_N 90_AP_PCIE3_TXD_C_N 90_AP_PCIE3_TXD_C_P 90_AP_PCIE3_RXD_C_N 90_AP_PCIE3_RXD_C_P 90_AP_PCIE2_RXD_C_P AP_PCIE_RCAL PP1V2_SOC_PCIE_REFBUF PP0V9_SOC_FIXED_PCIE_REFBUF PP0V9_SOC_FIXED PP1V8 PP1V2_SOC 90_AP_PCIE2_TXD_C_N 90_AP_PCIE2_TXD_C_P 90_AP_PCIE2_RXD_C_N 90_PCIE_AP_TO_NAND_REFCLK_N 90_PCIE_NAND_TO_AP_RXD_C_P CAYMAN-2GB-20NM-DDR-M CSP 100K ROOM=SOC 5% MF 01005 1/32W 0.1UF ROOM=SOC 6.3V 20% X5R-CERM 01005 ROOM=SOC MF 01005 1/32W 0.00 0% MF 01005 0.00 ROOM=SOC 0% 1/32W 100K 5% ROOM=SOC MF 01005 1/32W 3.01K ROOM=SOC 1% MF 01005 1/32W 1/32W 100K 5% ROOM=SOC MF 01005 ROOM=SOC 100K 5% MF 01005 1/32W 20% X5R 0.22UF ROOM=SOC 01005 6.3V GND_VOID=TRUE 20% X5R ROOM=SOC 01005 GND_VOID=TRUE 0.22UF 6.3V 0.22UF GND_VOID=TRUE 20% X5R 6.3V 01005 ROOM=SOC 20% X5R 01005 0.22UF GND_VOID=TRUE 6.3VROOM=SOC ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC 2.2UF 20% 6.3V X5R-CERM 0201-1 ROOM=SOC 0.1UF 6.3V 20% X5R-CERM 01005 01005 ROOM=SOC X5R-CERM 6.3V 20% 0.1UF 0.1UF ROOM=SOC 6.3V 20% X5R-CERM 01005 1.0UF 0201-1 X5R ROOM=SOC 6.3V 20% 17 17 17 17 17 17 17 52 52 52 52 52 18151097 5248474639 2925181716131211975 19 16 10 52 52 52 17 NC NC NC NC NC NC NC NC LINK2 LINK3LINK0 LINK1 SYM 2 OF 16 VDD_FIXED_PCIE_CLK VDD_FIXED_PCIE_ANA VDD12_PCIE_REFBUF PCIE_CLKREQ3* PCIE_REF_CLK3_P VDD12_PCIE VDD_FIXED_PCIE_REFBUF PCIE_TX1_N PCIE_TX1_P PCIE_PERST1* PCIE_EXT_REF_CLK_N PCIE_EXT_REF_CLK_P PCIE_RX1_N PCIE_RX1_P PCIE_REF_CLK1_P PCIE_REF_CLK1_N PCIE_CLKREQ1* PCIE_PERST0* PCIE_TX0_N PCIE_TX0_P PCIE_RX0_P PCIE_RX0_N PCIE_CLKREQ0* PCIE_REF_CLK0_P PCIE_REF_CLK0_N PCIE_PERST3* PCIE_TX3_N PCIE_TX3_P PCIE_RX3_N PCIE_RX3_P PCIE_REF_CLK3_N PCIE_PERST2* PCIE_RX2_P PCIE_RX2_N PCIE_TX2_P PCIE_TX2_N PCIE_REF_CLK2_N PCIE_CLKREQ2* PCIE_REF_CLK2_P PCIE_REXT 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
D11/111 ONLY <--- Needed for Cayman debug; this pin cannot be input D11/111 ONLY 1.62-1.98V @7mA MAX SOC - MIPI & ISP INTERFACES Spare Dev ONLY Radar 20511449 D11/111 ONLY Dev only Per Radar 21221938 0.825-0.94V @25mA MAX Radar 21203307 AC return path for LCM MIPI which is referenced to GND and VDD_MAIN 2 1 C0909 2 1 C0905 2 1 C0910 G6 G17 G13 G21 G19 G15 G10 AA64 AC65 AE64 AA65 C48 B48 E50 D50 A48 C50 A50 E52 B50 E11 A11 C9 B5 B4 B7 B11 B9 C5 A4 A7 E16 B16 B12 B14 C16 C12 A14 E24 A26 C24 B20 A18 B22 B26 B24 C20 B18 A22 W66 W64 U66 U65 R65 U64 N66 N65 BR4 BR2 BN4 U0700 2 1 C0907 2 1 C0906 1 PP0902 2 1 C0904 2 1 C0908 21 R0907 21 R0906 2 1 C0903 2 1 C0902 2 1 C0901 2 1 R0901 2 1 R0900 2 1 C0900 90_MIPI_AP_TO_LCM_DATA1_N NC_MIPI_AP_TO_LCM_DATA2_P 90_MIPI_NH_TO_AP_CLK_P 90_MIPI_NH_TO_AP_CLK_N 90_MIPI_AP_TO_LCM_CLK_P 90_MIPI_AP_TO_LCM_CLK_N AP_TO_STROBE_DRIVER_HWEN SPI_AP_TO_MAGGIE_CS_L MIPID_REXT NC_MIPI_AP_TO_LCM_DATA2_N 90_MIPI_NH_TO_AP_DATA1_N NC_MIPI_AP_TO_LCM_DATA3_P 90_MIPI_NH_TO_AP_DATA1_P 90_MIPI_NH_TO_AP_DATA0_N 90_MIPI_NH_TO_AP_DATA0_P I2C_ISP_UT_SDA PP0V9_SOC_FIXED AP_TO_UT_SHUTDOWN_L AP_TO_NH_SHUTDOWN_L NC_AP_TO_NV_SHUTDOWN_L NC_AP_TO_NV_CLK_R I2C_ISP_UT_SCL I2C_ISP_NV_SDA I2C_ISP_NV_SCL I2C_ISP_NH_SCL I2C_ISP_NH_SDA AP_TO_MUON_BL_STROBE_EN AP_TO_NH_CLK AP_TO_UT_CLK PP1V8 MIPI0C_REXT 90_MIPI_AP_TO_LCM_DATA0_P 90_MIPI_AP_TO_LCM_DATA0_N 90_MIPI_AP_TO_LCM_DATA1_P AP_TO_UT_CLK_R AP_TO_NH_CLK_R TP_SENSOR3_RST NC_SENSOR0_ISTRB NC_MIPI_AP_TO_LCM_DATA3_N PP_VDD_MAIN 01005 ROOM=SOC 5% 10V 220PF C0G-CERM 01005 ROOM=SOC 5% 10V 220PF C0G-CERM 220PF C0G-CERM 10V 5% ROOM=SOC 01005 CAYMAN-2GB-20NM-DDR-M CSP 100PF NOSTUFF 01005 NP0-C0G 35V 5% NP0-C0G 01005 100PF 5% 35V NOSTUFF SM P2MM-NSM ROOM=SOC ROOM=SOC 220PF 01005 5% 10V C0G-CERM 10V 220PF 5% 01005 ROOM=SOC C0G-CERM ROOM=SOC 33.2 1% 1/32W 01005 MF 01005 33.2 1/32W MF 1% ROOM=SOC ROOM=SOC 01005 20% 6.3V X5R-CERM 0.1UF ROOM=SOC 01005 20% 6.3V X5R-CERM 0.1UF ROOM=SOC 20% 6.3V 0201-1 X5R-CERM 2.2UF 4.02K 01005 MF 1/32W 1% ROOM=SOC MF 01005 1% 4.02K 1/32W ROOM=SOC ROOM=SOC 0201-1 20% 6.3V X5R-CERM 2.2UF 39 45 45 39 39 26 36 45 45 45 45 48 18 15 10 8 7 25 29 48 46 46 48 48 37 29 25 5248474639 2925181716131211875 39 39 39 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 4 NC NC NC NC NC SYM 3 OF 16 SENSOR0_XSHUTDOWN SENSOR1_XSHUTDOWN MIPI1C_DPDATA0 SENSOR1_ISTRB MIPI1C_REXT SENSOR0_ISTRB MIPI1C_DPCLK MIPI1C_DPDATA1 MIPI1C_DNDATA0 MIPI1C_DNDATA1 MIPI1C_DNCLK ISP_I2C3_SCL ISP_I2C2_SDA ISP_I2C2_SCL ISP_I2C1_SCL ISP_I2C1_SDA ISP_I2C0_SCL ISP_I2C3_SDA SENSOR0_CLK SENSOR1_CLK SENSOR2_CLK SENSOR1_RST SENSOR3_RST SENSOR4_RST SENSOR2_RST SENSOR0_RST MIPID_DPCLK DISP_TOUCH_BSYNC0 DISP_TOUCH_BSYNC1 DISP_TOUCH_EB MIPID_REXT VDD18_MIPI VDD_FIXED_MIPI ISP_I2C0_SDA SENSOR_INT MIPID_DNCLK MIPI0C_DPDATA0 MIPI0C_DNDATA0 MIPI0C_DNDATA1 MIPI0C_DPDATA1 MIPI0C_DPDATA2 MIPI0C_DPDATA3 MIPI0C_DNDATA2 MIPI0C_DNDATA3 MIPI0C_DPCLK MIPI0C_DNCLK MIPI0C_REXT MIPID_DPDATA0 MIPID_DNDATA0 MIPID_DNDATA1 MIPID_DPDATA3 MIPID_DNDATA3 MIPID_DPDATA1 MIPID_DPDATA2 MIPID_DNDATA2 NC NC PP NC NC NC NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
VDD12_LPDP:1.14-1.26V @60mA MAX Desense for Wifi frequencies D11/111 ONLY Reserved for PanelID[1:0] on ap_dev board Reserved for PanelID[1:0] on ap_dev board Dev ONLY #24401637:Unconnect LPDPRX_EXT_C AC return path for LCM LPDP which is referenced to GND and VDD_MAIN GND ON MLB; other on Dev GND ON MLB; other on Dev D11/111 ONLY VDD12_PLL_LPDP:1.14-1.26V @3mA MAX LPDP Lanes swapped between D10 and D11 90_LPDP_UT_TO_AP_D0_N25 90_LPDP_UT_TO_AP_D0_P25 NC_90_LPDP_NV_TO_AP_D2_N46 90_LPDP_UT_TO_AP_D1_N25 90_LPDP_UT_TO_AP_D1_P25 LPDP_UT_BI_AP_AUX25 NC_90_LPDP_NV_TO_AP_D3_P46 NC_90_LPDP_NV_TO_AP_D3_N46 NC_AP_LPDP_AUX246 NC_90_LPDP_NV_TO_AP_D2_P46 2 1 C1013 2 1 C1001 G23 G30 G28 G25 G62 G60 G58 G55 A64 B64 B63 C63 A61 B61 B56 C56 A54 B54 A57 B57 D57 B59 C59 D64 E63 D61 E56 D54 A33 B33 B31 C31 A29 B29 B27 C27 E31 E35 D33 E33 BN3 AP2 U0700 2 1 C1010 2 1 C1011 2 1 C1002 2 1 C1005 2 1C1006 2 1 R1001 2 1 C1004 PP_VDD_MAIN AP_LPDPRX_RCAL_NEG PP1V2_SOC PP0V9_SOC_FIXED ROOM=SOC 0201-1 2.2UF X5R-CERM 20% 6.3V ROOM=SOC 0201-1 2.2UF X5R-CERM 20% 6.3V CKPLUS_WAIVE=PWRTERM2GND CSP CKPLUS_WAIVE=PWRTERM2GND CKPLUS_WAIVE=PWRTERM2GND CAYMAN-2GB-20NM-DDR-M 33PF NP0-C0G-CERM 16V 5% ROOM=SOC 01005 33PF NP0-C0G-CERM 16V 5% ROOM=SOC 01005 01005 15PF NP0-C0G-CERM 16V 5% ROOM=SOC 0.01UF ROOM=SOC X5R 6.3V 10% 01005 ROOM=SOC 0.1UF X5R-CERM 6.3V 20% 01005 100PF 5% 16V ROOM=SOC 01005 NP0-C0G 300 1% 01005-1 MF ROOM=SOC 1/32W 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 9 4 18 15 9 8 7 NC NC NC NC NC NC NC NC SYM 4 OF 16 VDD12_LPDP_TX VDD12_LPDP_RX VDD12_PLL_LPDP LPDPRX_EXT_C LPDPRX_RCAL_N LPDPRX_BYP_CLK_P LPDPRX_BYP_CLK_N LPDPRX_RCAL_P LPDPRX_RX_D4_N LPDPRX_AUX_D0_P LPDPRX_AUX_D2_P LPDPRX_AUX_D4_P LPDPRX_AUX_D1_P LPDPRX_AUX_D3_P LPDPRX_RX_D4_P LPDPRX_RX_D2_N LPDPRX_RX_D3_P LPDPRX_RX_D3_N LPDPRX_RX_D2_P LPDPRX_RX_D1_P LPDPRX_RX_D0_N LPDPRX_RX_D1_N LPDPRX_RX_D0_P LPDP_TX3P LPDP_TX3N LPDP_TX2N LPDP_TX2P LPDP_TX0P LPDP_TX1N LPDP_TX0N LPDP_TX1P DP_WAKEUP EDP_HPD LPDP_AUX_P LPDP_CAL_VSS_EXT LPDP_AUX_N LPDP_CAL_DRV_OUT NC NC NC NC NC NC NC NC NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
To Cayman I2S1/2/3 MCLK NC #24559456 BOARD_ID0 SOC - SERIAL INTERFACES Route as daisy-chain. No T's allowed. I2C5 See Radar#25316444 for Details PP1V85 B2A1 A2B1 U1101 CJ12 CM9 CG22 CJ14 CH16 CH22 CH20 C42 E44 A42 B42 D44 A44 B44 C44 R3 N4 N3 N2 CB4 BY3 BY4 CB2 AG4 AH65 AK64 AH66 BN66 CH11 CK9 CJ9 CG18 CM7 BU66 BN64 BJ64 BN65 BR66 D48 A46 E46 C46 E48 BV65 BU64 BU65 BR64 BY66 AE65 AE66 U4 U3 AG66 AG64 CG12 CK7 BY2 AM64 AK65 AE3 AM66 U0700 21 R1116 2 1 R1113 2 1 R1114 21 R1101 21 R1118 2 1 C1101 21 R1103 BOARD_ID1 I2S_AP_TO_BT_BCLK I2S_BB_TO_AP_DIN I2S_AP_TO_BB_DOUT I2S_AP_TO_CODEC_MCLK_R I2S_AP_TO_CODEC_MSP_BCLK I2S_CODEC_TO_AP_MSP_DIN I2S_AP_TO_CODEC_MSP_DOUT I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK AP_TO_NAND_SYS_CLK SPI_AP_TO_CODEC_MAGGIE_MOSI AP_TO_CUMULUS_CLK32K I2S_AP_TO_CODEC_MCLK SPI_AP_TO_TOUCH_SCLK SPI_AP_TO_TOUCH_MOSI SPI_AP_TO_CODEC_MAGGIE_SCLK_R SPI_CODEC_MAGGIE_TO_AP_MISO I2S_AP_TO_CODEC_MSP_LRCLK DWI_PMGR_TO_BACKLIGHT_CLK I2C2_AP_SCL I2C2_AP_SDA I2C1_AP_SDA I2C1_AP_SCL I2C0_AP_SDA I2C0_AP_SCL I2C3_AP_SCL I2C3_AP_SDA AP_TO_NAND_SYS_CLK_R SPI_TOUCH_TO_AP_MISO SPI_AP_TO_MESA_MOSI I2S_BB_TO_AP_LRCLK I2S_AP_TO_BT_DOUT I2S_BT_TO_AP_DIN I2S_AP_TO_BT_LRCLK SPI_AP_TO_CODEC_MAGGIE_SCLK SPI_AP_TO_MESA_SCLK SPI_MESA_TO_AP_MISO SPI_AP_TO_TOUCH_CS_L SPI_AP_TO_CODEC_CS_L DWI_PMGR_TO_BACKLIGHT_DATA PP1V8 I2S_MAGGIE_TO_AP_DIN PMU_TO_AP_THROTTLE_GPU_L AP_TO_PMU_SOCHOT_L PMU_TO_AP_PRE_UVLO_L I2S_BB_TO_AP_BCLK I2S_AP_TO_MAGGIE_DOUT I2S_MAGGIE_TO_AP_L26_CODEC_BCLK SPI_PMGR_TO_PMU_MOSI SPI_PMU_TO_PMGR_MISO SPI_PMGR_TO_PMU_SCLK I2C5_SDA I2C5_SCL BOARD_ID2 SPI_AP_TO_TOUCH_SCLK_R MESA_TO_AP_INT I2C5_SDA PP1V8 I2C5_SCL CRITICAL ROOM=SOC WLCSP CSP CAYMAN-2GB-20NM-DDR-M 0% 0.00 1/32W 01005 MF ROOM=SOC 1/32W 01005 MF 10K 5% ROOM=SOC 01005 ROOM=SOC MF 1/32W 5% 10K 0% 0.00 1/32W 01005 MF ROOM=SOC 0% 0.00 1/32W 01005 MF ROOM=SOC ROOM=SOC 1.0UF 0201-1 X5R 20% 6.3V 1/32W 01005 MF 1% 33.2 ROOM=SOC 5 53 53 53 32 32 32 36 35 34 33 32 17 36 32 39 32 39 39 36 32 32 37 47 47 47 47 47 47 47 47 39 38 53 53 53 53 36 32 38 38 39 32 37 5248474639 29251817161312119875 36 20 20 20 53 36 36 35 34 33 32 20 20 20 4711 4711 5 38 4711 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 4711 I2S_BB_TO_AP_DIN I2S_AP_TO_BB_DOUT I2S_AP_TO_CODEC_MCLK_R I2S_AP_TO_CODEC_MSP_BCLK I2S_CODEC_TO_AP_MSP_DIN I2S_AP_TO_CODEC_MSP_DOUT I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK I2S_AP_TO_CODEC_MCLK I2S_AP_TO_CODEC_MSP_LRCLK I2C2_AP_SCL I2C2_AP_SDA I2C1_AP_SDA I2C1_AP_SCL I2C0_AP_SDA I2C0_AP_SCL I2C3_AP_SCL I2C3_AP_SDA I2S_BB_TO_AP_LRCLK I2S_AP_TO_BT_DOUT I2S_BT_TO_AP_DIN I2S_AP_TO_BT_LRCLK I2S_MAGGIE_TO_AP_DIN I2S_BB_TO_AP_BCLK I2S_AP_TO_MAGGIE_DOUT I2S_MAGGIE_TO_AP_L26_CODEC_BCLK I2C5_SDA I2C5_SCL BOARD_ID2 CRITICAL WLCSP CSP CAYMAN-2GB-20NM-DDR-M 0% 0.00 1/32W 01005 MF ROOM=SOC 1/32W 01005 MF 10K 5% ROOM=SOC 01005 ROOM=SOC MF 1/32W 5% 10K 0% 0.00 1/32W 01005 MF ROOM=SOC 0% 0.00 1/32W 01005 MF ROOM=SOC ROOM=SOC 1.0UF 0201-1 X5R 20% 6.3V MF 5 53 53 53 32 32 32 36 35 34 33 32 17 36 32 39 32 39 39 36 32 32 37 47 47 47 47 47 47 47 47 39 38 53 53 53 53 36 32 38 38 39 32 37 5248474639 29251817161312119875 36 20 20 20 53 36 35 34 33 32 20 20 20 4711 4711 5 38 4711 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 4711 I2S_BT_TO_AP_DIN I2S_AP_TO_BT_LRCLK I2S_MAGGIE_TO_AP_DIN I2S_BB_TO_AP_BCLK I2S_MAGGIE_TO_AP_L26_CODEC_BCLK I2C5_SDA I2C5_SCL BOARD_ID2 CRITICAL WLCSP CSP 0% 0.00 1/32W 01005 MF ROOM=SOC 1/32W 01005 MF 10K 5% ROOM=SOC 01005 ROOM=SOC MF 1/32W 5% 10K 0% 0.00 1/32W 01005 MF ROOM=SOC 0% 0.00 1/32W 01005 MF ROOM=SOC 1.0UF 0201-1 5 53 53 53 32 32 32 35 34 33 32 17 36 32 39 32 39 39 36 32 32 37 47 47 47 47 47 47 47 47 39 38 53 53 53 53 36 32 38 38 39 32 37 5248474639 29251817161312119875 36 20 20 20 53 36 35 34 33 32 20 20 20 4711 4711 5 38 47 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 4711 I2S_AP_TO_BT_LRCLK I2S_BB_TO_AP_BCLK I2S_MAGGIE_TO_AP_L26_CODEC_BCLK I2C5_SDA I2C5_SCL BOARD_ID2 WLCSP CSP 0% 0.00 1/32W 01005 MF ROOM=SOC 1/32W 01005 MF 10K 5% ROOM=SOC 01005 ROOM=SOC MF 1/32W 5% 10K 0% 0.00 1/32W 01005 MF ROOM=SOC 0% 0.00 1/32W 01005 MF ROOM=SOC 1.0UF 5 53 53 53 32 32 32 34 33 32 17 36 32 39 32 39 39 36 32 32 37 47 47 47 47 47 47 47 47 39 38 53 53 53 53 36 32 38 38 39 32 37 5248474639 29251817161312119875 36 20 20 20 53 36 35 34 33 32 20 20 20 4711 4711 5 38 47 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 4711 I2S_BB_TO_AP_BCLK I2S_AP_TO_MAGGIE_DOUT I2C5_SDA I2C5_SCL BOARD_ID2 WLCSP CSP 0% 0.00 1/32W 01005 MF ROOM=SOC 1/32W 01005 MF 10K 5% ROOM=SOC 01005 ROOM=SOC MF 1/32W 5% 10K 0% 0.00 1/32W 01005 MF ROOM=SOC 0% 0.00 1/32W 01005 MF ROOM=SOC 1.0UF 5 53 53 53 32 32 32 34 33 32 17 36 32 39 32 39 39 36 32 32 37 47 47 47 47 47 47 47 47 39 38 53 53 53 53 36 32 38 38 39 32 37 5248474639 29251817161312119875 36 20 20 20 53 36 34 33 32 20 20 20 4711 4711 5 38 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 4711 SDASCL VCC VSS NC NC NC NC NC NC NC NC SYM 6 OF 16 I2C1_SCL SPI3_SSIN SPI3_SCLK SPI2_SSIN SPI2_MISO SPI3_MOSI SPI2_SCLK SPI3_MISO SPI2_MOSI SPI1_SSIN SPI1_SCLK SPI1_MOSI SPI1_MISO SPI0_SSIN SPI0_MOSI SPI0_SCLK I2S3_BCLK I2S3_LRCK I2S3_DOUT SPI0_MISO I2S3_MCK I2S3_DIN I2S2_MCK I2S1_DIN I2S2_DIN I2S2_BCLK I2S2_LRCK I2S2_DOUT I2S1_DOUT I2S0_MCK I2S0_DIN I2S1_MCK I2S0_DOUT I2S0_LRCK I2S1_LRCK I2S0_BCLK I2S1_BCLK DROOP SOCHOT DWI_DO CLK32K_OUT NAND_SYS_CLK GPU_TRIGGER DWI_CLK PMU_SCLK PMU_MISO PMU_MOSI SPI4_SCLK I2C3_SDA I2C3_SCL SPI4_MISO I2C5_SCL GPIO_42 GPIO_43 I2C5_SDA SPI4_MOSI I2C2_SCL I2C2_SDA I2C1_SDA I2C0_SDA I2C0_SCL NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
RESERVERD FOR SSHB ID ON DEV BOARD BOOT_CONFIG1 DEV ONLY Nostuff per #24511702 D101/D111 ONLY D101/D111 ONLY D101/D111 ONLY; for GNSS D101/D111 ONLY BOARD_ID4 SOC - GPIO INTERFACES D10/D11 ONLY #24608280 D101/D111 ONLY #24557547:Delete R1204 BOOT_CONFIG0 Dev only #25120460:REQUEST_DFU Assignment PP1V85 AP_TO_ICEFALL_FW_DWLD_REQ53 2 1 R1210 AM2 AP3 CG14 CG16 BG4 A37 B37 C37 D37 U2 W4 W2 AA4 AH2 AK4 AK3 AM4 B39 C39 D39 E39 CJ7 CL5 AH3 AH4 AG2 BU3 BU2 AY3 AY2 AV3 AT2 AT4 A39 E41 C41 A41 E42 D42 AA3 AA2 CG20 CK11 CH14 CL9 CJ11 BG2 BE3 BE4 BE2 BC4 BC3 BB4 BB2 AE2 AC3 AE4 AH64 AP65 AP66 AT64 AT66 AT67 AV67 AV65 AY66 AY65 BB66 BC65 BB64 U0700 AP_TO_TOUCH_MAMBA_RESET_L BOARD_REV0 UART_AP_TO_NFC_TXD AP_TO_BB_COREDUMP PMU_TO_AP_BUF_VOL_DOWN_L PMU_TO_AP_BUF_POWER_KEY_L AP_TO_BB_MESA_ON AP_TO_BB_IPC_GPIO1 NC_DFU_STATUS AP_TO_ACC_BUCK_VSEL AP_TO_MAGGIE_CRESETB_L AP_TO_LCM_RESET_L AP_BI_HOMER_BOOTLOADER_ALIVE AP_TO_NAND_FW_STRAP ALS_TO_AP_INT_L AP_TO_SPKAMP2_RESET_L AP_TO_BB_TIME_MARK MAGGIE_TO_AP_CDONE PP1V8 TOUCH_TO_AP_INT_L PMU_TO_AP_THROTTLE_CPU_L BB_TO_AP_RESET_DETECT_L NC_AP_TO_GNSS_TIME_MARK AP_TO_BB_RESET_L BUTTON_VOL_UP_L AP_TO_BBPMU_RADIO_ON_L AP_TO_NFC_FW_DWLD_REQ PMU_TO_AP_FORCE_DFU BOARD_REV3 UART_AP_DEBUG_TXD PROX_BI_AP_AOP_INT_PWM_L UART_AP_DEBUG_RXD BOARD_REV1 BOARD_REV2 AP_TO_BT_WAKE PMU_TO_AP_BUF_RINGER_A AP_TO_WLAN_DEVICE_WAKE AP_TO_NFC_DEV_WAKE NC_BB_TO_AP_RESET_ACT_L NC_AP_UART2_RTS_L NC_AP_UART2_CTS_L UART_AP_TO_BT_TXD UART_BT_TO_AP_CTS_L UART_NFC_TO_AP_RXD UART_AP_TO_HOMER_TXD UART_HOMER_TO_AP_RXD UART_AP_TO_WLAN_TXD UART_WLAN_TO_AP_RXD SWI_AP_BI_TIGRIS UART_AP_TO_WLAN_RTS_L UART_AP_TO_ACCESSORY_TXD UART_ACCESSORY_TO_AP_RXD UART_WLAN_TO_AP_CTS_L UART_BT_TO_AP_RXD UART_AP_TO_BT_RTS_L NC_AP_UART2_RXD UART_NFC_TO_AP_CTS_L UART_AP_TO_NFC_RTS_L NC_AP_UART2_TXD NC_AP_TO_BB_IPC_GPIO2 NC_AP_TO_GNSS_WAKE 1/32W 5% 01005 MF 10K ROOM=SOC NOSTUFF CSP CAYMAN-2GB-20NM-DDR-M 39 5 53 53 20 20 53 53 27 36 39 36 17 29 33 53 36 52 48 47 46 39 29 25 18 17 16 13 11 9 8 7 5 39 20 53 53 44 20 53 53 20 4 5 40 2913 40 5 5 53 20 53 53 53 53 53 36 36 53 53 21 53 40 40 53 53 53 53 53 UART_NFC_TO_AP_RXD UART_AP_TO_HOMER_TXD UART_HOMER_TO_AP_RXD UART_AP_TO_WLAN_TXD UART_WLAN_TO_AP_RXD SWI_AP_BI_TIGRIS UART_AP_TO_WLAN_RTS_L UART_AP_TO_ACCESSORY_TXD UART_ACCESSORY_TO_AP_RXD UART_WLAN_TO_AP_CTS_L UART_BT_TO_AP_RXD UART_AP_TO_BT_RTS_L NC_AP_UART2_RXD UART_NFC_TO_AP_CTS_L UART_AP_TO_NFC_RTS_L NC_AP_UART2_TXD NC_AP_TO_BB_IPC_GPIO2 NC_AP_TO_GNSS_WAKE 1/32W 5% 01005 MF 10K ROOM=SOC NOSTUFF CSP CAYMAN-2GB-20NM-DDR-M 39 5 53 53 20 20 53 53 27 36 39 36 17 29 33 53 36 52 48 47 46 39 29 25 18 17 16 13 11 9 8 7 5 39 20 53 53 44 20 53 53 20 4 5 40 2913 40 5 5 53 20 53 53 53 53 53 36 36 53 53 21 53 40 40 53 53 53 53 53 UART_AP_TO_BT_RTS_L NC_AP_UART2_RXD UART_NFC_TO_AP_CTS_L UART_AP_TO_NFC_RTS_L NC_AP_UART2_TXD NC_AP_TO_BB_IPC_GPIO2 NC_AP_TO_GNSS_WAKE 1/32W 5% 01005 MF 10K ROOM=SOC NOSTUFF CSP CAYMAN-2GB-20NM-DDR-M 39 5 53 53 20 20 53 53 27 36 39 36 17 29 33 53 36 52 48 47 46 39 29 25 18 17 16 13 11 9 8 7 5 39 20 53 53 44 20 53 53 20 4 5 40 2913 40 5 5 53 20 53 53 53 53 53 36 36 53 53 21 53 40 40 53 53 53 53 53 NC_AP_UART2_RXD UART_NFC_TO_AP_CTS_L UART_AP_TO_NFC_RTS_L NC_AP_UART2_TXD NC_AP_TO_BB_IPC_GPIO2 NC_AP_TO_GNSS_WAKE 1/32W 5% 01005 MF 10K ROOM=SOC NOSTUFF CSP CAYMAN-2GB-20NM-DDR-M 39 5 53 53 20 20 53 53 27 36 39 36 17 29 33 53 36 52 48 47 46 39 29 25 18 17 16 13 11 9 8 7 5 39 20 53 53 44 20 53 53 20 4 5 40 2913 40 5 5 53 20 53 53 53 53 53 36 36 53 53 21 53 40 40 53 53 53 53 53 NC NC NC SYM 5 OF 16 TMR32_PWM1 UART0_RXD GPIO_4 REQUEST_DFU2 REQUEST_DFU1 GPIO_41 GPIO_40 GPIO_36 GPIO_38 GPIO_37 GPIO_39 GPIO_35 GPIO_32 GPIO_31 GPIO_34 GPIO_33 GPIO_30 GPIO_27 GPIO_26 GPIO_28 GPIO_29 GPIO_25 GPIO_24 GPIO_23 GPIO_21 GPIO_22 GPIO_20 GPIO_19 GPIO_18 GPIO_15 GPIO_16 GPIO_17 GPIO_11 GPIO_13 GPIO_14 GPIO_10 GPIO_9 GPIO_7 GPIO_8 GPIO_5 GPIO_6 GPIO_1 GPIO_2 GPIO_3 GPIO_0 TMR32_PWM0 TMR32_PWM2 UART2_RTS* UART2_CTS* UART1_TXD UART0_TXD UART1_CTS* UART3_TXD UART3_RXD UART7_TXD UART7_RXD UART4_TXD UART4_RXD UART5_RTXD UART4_RTS* UART6_TXD UART6_RXD UART4_CTS* UART1_RXD UART1_RTS* UART2_RXD UART3_CTS* UART3_RTS* UART2_TXD GPIO_12 NC NC NC NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
Use internal pullup in SOC (AOP side). SOC - AOP BB_SWDIO has pullup in Radio_MLB pages #25756894:South Carbon R2 #24512059: Remove R1300 PU Internal pullup in AOP. Radar 21210869 #25756894:North Carbon R1 (+Mg,P) DOCK_CONNECT can be GPIO, but input only. Radar 21680759 21 R1306 BV3 BU4 CM33 CL37 CG41 CH35 CJ37 CM31 CH29 CG29 CL11 CJ22 CJ20 CK14 CG35 CL16 CL14 CJ16 CJ27 CJ18 CK39 CH41 CM37 CM35 CK37 CG39 CJ39 CL35 CJ24 CM11 CJ33 CG33 CK31 CM12 CK22 CK29 CK24 CK27 CJ31 CK20 CH31 CG31 CJ29 CK18 CK16 CK12 CM29 CM16 U0700 21 R1305 21 R1303 2 1 R1304 I2S_AOP_TO_MAGGIE_L26_MCLK PROX_BI_AP_AOP_INT_PWM_L UART_BB_TO_AOP_RXD I2S_CODEC_XSP_TO_AOP_LRCLK UART_TOUCH_TO_AOP_RXD PP1V8 PMU_TO_SYSTEM_COLD_RESET_L PMU_TO_AOP_TRISTAR_ACTIVE_READY AOP_TO_MESA_BLANKING_EN AOP_TO_PMU_ACTIVE_REQUEST AOP_TO_PMU_SLEEP1_REQUEST PMU_TO_AOP_CLK32K SWD_AP_BI_HOMER_SWDIO SWD_AOP_BI_BB_SWDIO HOMER_TO_AOP_WAKE_INT SWD_AP_TO_MANY_SWCLK I2C_AOP_SCL AUDIO_TO_AOP_INT_L AOP_TO_MESA_I2C_ISO_EN SPI_IMU_TO_AOP_MISO PMU_TO_AOP_IRQ_L SPI_AOP_TO_IMU_MOSI I2C_AOP_SDA LCM_TO_MANY_BSYNC ACCEL_GYRO_TO_AOP_INT SPI_AOP_TO_ACCEL_GYRO_CS_L ACCEL_GYRO_TO_AOP_DATARDY AOP_TO_MAGGIE_EN PHOSPHORUS_TO_AOP_INT_L I2S_CODEC_XSP_TO_AOP_BCLK MESA_TO_AOP_FDINT UART_AOP_TO_BB_TXD MAGGIE_TO_AOP_INT UART_AOP_TO_MAGGIE_TXD I2S_AOP_TO_CODEC_XSP_DOUT BOT_ACCEL_GYRO_TO_AOP_DATARDY SPI_AOP_TO_BOT_ACCEL_GYRO_CS_L TRISTAR_TO_AOP_INT SPI_AOP_TO_PHOSPHORUS_CS_L SWD_AP_BI_NAND_SWDIO AOP_TO_WLAN_CONTEXT_A SPI_AOP_TO_IMU_SCLK PMU_TO_AOP_SLEEP1_READY COMPASS_TO_AOP_INT SPI_AOP_TO_COMPASS_CS_L SPI_AOP_TO_IMU_SCLK_R1 SPI_AOP_TO_IMU_SCLK_R2 UART_AOP_TO_TOUCH_TXD I2S_CODEC_XSP_TO_AOP_DIN I2S_AOP_TO_MAGGIE_L26_MCLK_R AOP_TO_SPKAMP1_ARC_RESET_L AOP_TO_WLAN_CONTEXT_B 49.9 1% ROOM=SOC 01005 1/32W MF CAYMAN-2GB-20NM-DDR-M CSP 1% 1/32W 01005 ROOM=SOC MF 49.9 33.2 1/32W 1% ROOM=SOC MF 01005 1.00K 5% ROOM=SOC MF 01005 1/32W NOSTUFF 36 35 34 33 29 12 53 32 39 52484746 39292518171612119875 207 4037207 38 20 20 20 36 53 36 533617 48 35 34 33 32 48 24 20 24 48 53 39 23 20 24 24 24 36 24 32 38 53 36 36 32 24 24 40 24 17 53 20 15 24 24 24 24 39 32 3534 53 SYM 7 OF 16 CFSB_AOP AWAKE_RESET* AOP_PDM_CLK0 AOP_PDM_DATA0 AWAKE_REQ AOP_DDR_REQ AOP_DDR_RESET* DOCK_ATTENTION DOCK_CONNECT AOP_PDM_DATA1 RT_CLK32768 SWD_TMS2 SWD_TMS3 AOP_SWD_TMS1 AOP_SWD_TMS0 AOP_SWD_TCK_OUT AOP_UART1_TXD AOP_UART0_RXD AOP_UART0_TXD AOP_UART1_RXD AOP_I2C0_SCL AOP_FUNC_13 AOP_FUNC_14 AOP_SPI_SCLK AOP_SPI_MISO AOP_FUNC_15 AOP_SPI_MOSI AOP_I2C0_SDA AOP_FUNC_7 AOP_FUNC_5 AOP_FUNC_4 AOP_FUNC_3 AOP_FUNC_6 AOP_FUNC_11 AOP_FUNC_9 AOP_FUNC_8 AOP_FUNC_10 AOP_FUNC_12 AOP_FUNC_0 AOP_FUNC_1 AOP_FUNC_2 AOP_I2S_MCK AOP_I2S_LRCK AOP_I2S_DOUT AOP_I2S_DIN AOP_I2S_BCLK AOP_UART2_RXD AOP_UART2_TXD 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
1.06V @1.0A MAX 0.9V @tbd A MAX 0.67V @TBDA MAX 0.92V @10.7A MAX 1.03V @12.9A MAX 0.80V @TBD A MAX 0.80V @TBDA MAX 0.80V @4.1A MAX SOC - CPU, GPU & SOC RAILS 1.06V @17.4A MAX 0.625V @tbd A MAX 1.03V @1.44A MAX 0.92V @1.50A MAX 0.67V @TBD A MAX 0.80V @TBD A MAX 2 1 C1414 AW25 J60 BF40 Y60 Y36 Y10 V30 T60 T10 P55 J34 J21 J13 CE45 CE17 CE13 CA47 CA43 CA38 CA34 CA30 CA25 CA21 CA17 CA13 BW10 BT55 BT51 BT47 BT43 BT38 BT34 BT30 BT25 BT21 BT17 BT13 BP58 BP53 BP49 BP45 BP40 BP36 BP32 BP28 BP23 BP19 BP15 BM55 BK53 BK49 BK45 BK40 BK36 BK32 BK28 BF58 BF53 BF49 BF45 BF36 BF32 BF28 BD60 BD6 BD55 BD51 BD47 BD43 BD38 BD34 BD30 BD25 AW60 AW55 AW51 AW47 AW43 AW38 AW34 AW30 AR55 AR51 AR47 AR43 AR38 AR34 AR30 AR25 AN58 AN53 AN49 AN45 AN40 AN36 AN32 AN28 AL6 AJ36 AJ32 AJ28 AF60 AD32 AD28 U0700 AJ47 BK21 AL47 Y53 Y49 Y45 Y40 Y23 Y19 Y15 P51 P47 P43 P38 P34 P30 P25 P21 P17 AF51 AF47 AF43 AJ45 Y28 V55 V51 V38 V34 V25 V13 T53 T40 T36 T15 P13 L53 L49 L45 L40 L36 L32 L28 L23 L19 L15 J51 J47 J43 J38 J30 J25 AJ53 AJ49 AJ40 AF55 AD53 AD49 AD45 AD40 AB55 AB51 AB47 AB43 AB25 AB21 AB17 AB13 BH8 BA19 BA15 AW8 AU19 AR8 AN15 AF8 BK23 AJ10 BK15 BK10 BH21 BH17 BH13 BF23 BF10 BD8 BD21 BA23 BA10 AW21 AW17 AW13 AU15 AU10 AR21 AR17 AR13 AN23 AN19 AN10 AL8 AL21 AJ23 AF17 AF13 AD23 AD19 AD15 AD10 U0700 2 1 C1434 2 1 C1408 2 1 C1401 2 1 C1403 4 3 2 1 C1407 1 PP1411 1 PP1410 1PP1402 1 PP1403 1 PP1409 1 PP1408 4 3 2 1 C1435 4 3 2 1 C1439 1 PP1401 2 1 C1444 21 XW1401 2 1 C1436 4 3 2 1 C1402 4 3 2 1 C1410 4 3 2 1 C1415 4 3 2 1 C1420 4 3 2 1 C1409 4 3 2 1 C1452 4 3 2 1 C1454 4 3 2 1 C1416 2 1 C1466 4 3 2 1 C1425 4 3 2 1 C1429 4 3 2 1 C1456 4 3 2 1 C1457 4 3 2 1 C1421 4 3 2 1 C1426 2 1 C1448 4 3 2 1 C1432 4 3 2 1 C1437 4 3 2 1 C1433 2 1 C1459 2 1 C1458 4 3 2 1 C1465 4 3 2 1 C1460 4 3 2 1 C1461 21 XW1403 2 1 XW1402 2 1 C1449 4 3 2 1 C1442 4 3 2 1 C1438 4 3 2 1 C1440 4 3 2 1 C1418 4 3 2 1 C1423 4 3 2 1 C1428 4 3 2 1 C1431 4 3 2 1 C1427 4 3 2 1 C1430 4 3 2 1 C1404 4 3 2 1 C1411 4 3 2 1 C1417 4 3 2 1 C1422 4 3 2 1 C1406 4 3 2 1 C1413 4 3 2 1 C1419 4 3 2 1 C1424 4 3 2 1 C1405 4 3 2 1 C1412 PP_GPU_VAR PP_CPU_VAR PP_GPU_SRAM_VAR PP_CPU_SRAM_VAR PP_CPU_VAR AP_VDD_GPU_SENSE PP_SOC_VAR PP_GPU_VAR AP_VDD_CPU_SENSE TP_AP_VSS_CPU_SENSE BUCK0_PP_CPU_FB BUCK2_PP_SOC_FB BUCK1_PP_GPU_FB TP_VDD_SOC_SENSE TP_VSS_SENSE 15UF 6.3V X5R 0402-1 ROOM=SOC 20% CSP CAYMAN-2GB-20NM-DDR-M CAYMAN-2GB-20NM-DDR-M CSP 0402-1 X5R 6.3V 20% 15UF X5R 15UF 20% 6.3V 0402-1 6.3V X5R 0402-1 20% 15UF 6.3V 20% 10UF CERM-X5R ROOM=SOC 0402-9 20% 0402 4V CERM ROOM=SOC 7.5UF ROOM=SOC P2MM-NSM SM ROOM=SOC P2MM-NSM SM SM ROOM=SOC P2MM-NSM ROOM=SOC P2MM-NSM SM ROOM=SOC P2MM-NSM SM ROOM=SOC P2MM-NSM SM 0402 4V CER 7.5UF ROOM=SOC 20% 0402 4V CER 20% 7.5UF ROOM=SOC SM P2MM-NSM ROOM=SOC ROOM=SOC CERM-X5R 10UF 0402-9 6.3V 20% SHORT-20L-0.05MM-SM OMIT ROOM=SOC NO_XNET_CONNECTION ROOM=SOC CERM-X5R 10UF 0402-9 6.3V 20% 0402 4V 20% CERM 4.3UF ROOM=SOC ROOM=SOC 4V 20% 1UF CERM 0402 4V 20% 0402 CERM ROOM=SOC 1UF ROOM=SOC 0402 4V 1UF 20% CERM 4.3UF ROOM=SOC 4V 20% CERM 0402 ROOM=SOC 20% 4.3UF 4V CERM 0402 ROOM=SOC 4.3UF 20% CERM 0402 4V ROOM=SOC 7.5UF 0402 CERM 4V 20% ROOM=SOC 0201-1 20% 2.2UF X5R-CERM 6.3V 0.47UF 0402 6.3V 20% CERM ROOM=SOC ROOM=SOC 0402 0.47UF 6.3V 20% CERM 0402 ROOM=SOC 6.3V 20% CERM 0.47UF ROOM=SOC 0.47UF 0402 6.3V 20% CERM 7.5UF ROOM=SOC 4V 0402 20% CERM 7.5UF 20% ROOM=SOC 4V 0402 CERM 6.3V 20% 2.2UF 0201-1 ROOM=SOC X5R-CERM 20% ROOM=SOC 7.5UF 4V CERM 0402 4V ROOM=SOC 20% 0402 CERM 7.5UF 20% 4V ROOM=SOC CERM 0402 7.5UF ROOM=SOC CERM-X5R 6.3V 20% 0402-9 10UF 0402-9 CERM-X5R ROOM=SOC 10UF 6.3V 20% ROOM=SOC 0402 4V 4.3UF 20% CERM 7.5UF ROOM=SOC 4V 20% CERM 0402 ROOM=SOC 7.5UF 0402 4V 20% CERM NO_XNET_CONNECTION OMIT ROOM=SOC SHORT-20L-0.05MM-SM ROOM=SOC OMIT SHORT-20L-0.05MM-SM NO_XNET_CONNECTION ROOM=SOC 0201-1 2.2UF20% 6.3V X5R-CERM 0402 ROOM=SOC 0.47UF 6.3V 20% CERM ROOM=SOC 1UF 0402 4V 20% CERM 4V 0402 7.5UF 20% ROOM=SOC CERM ROOM=SOC 20% 1UF 4V 0402 CERM 20% CERM 0402 4V 1UF ROOM=SOC 0402 4V 20% CERM ROOM=SOC 1UF 1UF 0402 20% CERM ROOM=SOC 4V ROOM=SOC 0402 4V 20% CERM 4.3UF 4V 20% ROOM=SOC 4.3UF CERM 04020402 4V 20% 7.5UF ROOM=SOC CERM CERM 20% 4V 0402 7.5UF ROOM=SOC 7.5UF 0402 4V 20% CERM ROOM=SOC 4.3UF ROOM=SOC 0402 20% 4V CERM 0.47UF 6.3V 20% ROOM=SOC CERM 0402 ROOM=SOC 0402 0.47UF 6.3V 20% CERM ROOM=SOC 0402 6.3V 20% 0.47UF CERM 20% 6.3V CERM ROOM=SOC 0.47UF 0402 ROOM=SOC 0402 4V 4.3UF 20% CERM 0402 4V 4.3UF 20% ROOM=SOC CERM 1814 1814 18 18 1814 20 18 1814 20 18 18 18 SYM 9 OF 16 VDD_SOCVDD_SOC SYM 8 OF 16 VDD_GPU_SRAM VDD_CPU_SRAM VDD_CPU VDD_GPU VDD_GPU_SENSE VSS_SENSE VDD_SOC_SENSE VSS_CPU_SENSE VDD_CPU_SENSE PP PP PP PP PP PP PP |---|||||||--|||== 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
1.06 - 1.17V @4mA MAX (CURRENT INCLUDED IN VDD2) 0.797-0.945V @9 mA MAX 1.06-1.17V @0.85A MAX DDR IMPEDANCE CONTROL 0.765-0.840V @60mA MAX TBD-TBDV @1.9A MAX SOC - POWER SUPPLIES 1.06 - 1.17V @1.74A MAX H64 H4 CD65 CG3 P58 J8 BW60 CE8 Y62 V60 T62 P60 K67 E67 AH67 AE67 AD62 AC67 AB60 Y6 V8 T6 P8 L6 K1 E1 AH1 AE1 AC1 AB8 CH67 CD67 BW62 BT60 BP62 BM60 BL67 BK62 BJ67 BH60 BE67 CH1 CD1 CC6 CA8 BW6 BT8 BP6 BM8 BL1 BJ1 BE1 W67 W1 R67 R1 N67 N1 D66 D2 CK66 CK2 CJ66 CJ2 C66 C2 BY67 BY1 BV67 BV1 BR67 BR1 BB65 BB3 AM65 AM3 AA66 H65 K65 K64 H3 K3 K4 CB64 BY64 CB65 BN2 CF4 CD3 CF3 U0700 CE40 CE30 CC36 AW23 Y8 Y58 T8 T58 T32 L60 L58 L10 J62 J55 J23 J17 G36 G32 CC45 CC32 CC28 CC23 CC19 CC15 CC10 BW8 BW58 BW53 BW49 BW45 BW40 BW36 BW32 BW28 BW23 BW19 BW15 BP60 BP10 BM51 BM47 BM43 BM38 BM34 BM30 BM25 BM21 BM17 BM13 BK6 BK58 BH55 BH51 BH47 BH43 BH38 BH34 BH30 BH25 BA58 BA53 BA49 BA45 BA40 BA36 BA32 BA28 AU6 AU58 AU53 AU49 AU45 AU40 AU36 AU32 AU28 AR60 AL60 AL55 AL51 AL43 AL38 AL34 AL30 AL25 AJ58 AF62 AF38 AF34 AF30 AF25 AD58 AB38 AB34 AB30 U0700 2 1 C1512 2 1 C1513 2 1 C1510 2 1 C1501 2 1 C1508 2 1 C1509 2 1 C1507 2 1 C1529 2 1 C1511 2 1 C1515 4 3 2 1 C1527 2 1 C1528 2 1 C1522 21 FL1501 2 1 C1519 2 1 C1504 2 1 C1518 2 1 C1523 2 1 R1505 2 1 R1506 4 3 2 1 C1503 2 1 C1514 2 1 C1506 2 1 R1504 2 1 R1503 2 1 R1502 2 1 R1501 4 3 2 1 C1502 PP0V9_SOC_FIXED PP1V1_SDRAM PP0V8_AOP PP1V1 PP1V1 PP1V1 PP1V1_SDRAM PMU_TO_AOP_SLEEP1_READY PP1V1_DDR_PLL DDR2_RREF DDR3_RREF DDR0_RREF DDR1_RREF DDR0_ZQ DDR3_ZQ SYSTEM_ALIVE CAYMAN-2GB-20NM-DDR-M CSP CSP CAYMAN-2GB-20NM-DDR-M CERM-X5R 10UF ROOM=SOC 0402-9 6.3V 20% CERM-X5R 0402-9 10UF 6.3V 20% ROOM=SOC 20% 6.3V ROOM=SOC 01005-1 0.22UF X5R 20% 6.3V 10UF 0402-9 ROOM=SOC CERM-X5R 20% 6.3V 0.22UF ROOM=SOC 01005-1 X5R 20% 6.3V 01005-1 0.22UF ROOM=SOC X5R ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC 0201-1 6.3V 20% 2.2UF X5R-CERM ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF 20% 4V 1UF 0402 ROOM=SOC CERM 10UF 20% 6.3V 0402-9 CERM-X5R ROOM=SOC 2.2UF 20% 6.3V X5R-CERM 0201-1 ROOM=SOC 100OHM-25%-0.12A ROOM=SOC 01005 ROOM=SOC 2.2UF 20% 6.3V X5R-CERM 0201-1 2.2UF 20% 6.3V X5R-CERM 0201-1 ROOM=SOC X5R-CERM 2.2UF 20% 6.3V 0201-1 ROOM=SOC 20% 6.3V ROOM=SOC 0.22UF 01005-1 X5R 240 1% ROOM=SOC MF 01005 1/32W ROOM=SOC 240 1% MF 01005 1/32W 20% ROOM=SOC 7.5UF 4V 0402 CERM 2.2UF 20% 6.3V X5R-CERM ROOM=SOC 0201-1 20% 6.3V CERM-X5R 10UF 0402-9 ROOM=SOC ROOM=SOC 1% 240 MF 01005 1/32W 1% 240 ROOM=SOC MF 01005 1/32W 1% ROOM=SOC 240 MF 01005 1/32W 1% ROOM=SOC 240 MF 01005 1/32W 20% 4.3UF ROOM=SOC 4V CERM 0402 18 10 9 8 7 191815 19 18157 18 15 7 18 15 7 191815 2013 212017 SYM 11 OF 16 DDR1_SYS_ALIVE DDR0_SYS_ALIVE DDR3_SYS_ALIVE DDR2_SYS_ALIVE VDD2 VDDIO11_PLL_DDR0 VDDIO11_PLL_DDR3 DDR3_ZQ DDR0_ZQ DDR1_RREF DDR1_RET* DDR0_RREF DDR0_RET* DDR3_RREF DDR2_RREF DDR2_RET* VDDIO11_RET_DDR0 VDDIO11_RET_DDR2 VDDIO11_RET_DDR3 VDDIO11_RET_DDR1 VDDIO11_DDR0 VDDIO11_DDR1 VDDIO11_DDR2 VDDIO11_DDR3 VDDIO11_PLL_DDR1 VDDIO11_PLL_DDR2 DDR3_RET* SYM 10 OF 16 VDD_FIXED VDD_LOW VDD_FIXED_CPU VDD_FIXED =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
VDD12_PLL_SOC:1.14-1.26V @31mA MAX VDD12_PLL_CPU:1.14-1.26V @13mA MAX 1.70-1.95V @134mA MAX SOC - POWER SUPPLIES 1.62-1.98V @10mA MAX 1.62-1.98V @43mA MAX TBD-TBDV @30mA MAX 1.62-1.98V @1mA MAX 1.62-1.98V @1mA MAX 1.62-1.98V @2mA MAX J58 BF38 Y55 Y51 Y47 Y43 Y30 Y25 Y21 Y17 Y13 W65 W3 V62 V6 V58 V53 V40 V36 V32 V28 V15 V10 U67 U1 T55 T51 T38 T34 T25 T13 R66 R64 R4 R2 P62 P6 P53 P49 P45 P40 P36 P32 P28 P23 P19 P15 P10 M67 M66 M65 M64 M4 M3 M2 M1 L8 L62 L55 L51 L47 L43 L38 L34 L30 L25 L21 L17 L13 K66 K2 J6 J53 J49 J45 J40 J32 J28 J19 J15 J10 H67 H66 H2 H1 G8 G51 G47 G43 G38 F67 F66 F65 F64 F4 F3 F2 F1 E9 E7 E66 E65 E64 E61 E59 E57 E54 E5 E4 E37 E3 E29 E27 E26 E22 E20 E2 E18 E14 E12 D9 D7 D67 D65 D63 D59 D56 D52 D5 D46 D41 D4 D35 D31 D3 D29 D27 D26 D24 D22 D20 U0700 D18 D16 D14 D12 D11 D1 CM66 CM63 CM59 CM56 CM52 CM5 CM48 CM44 CM41 CM4 CM39 CM27 CM24 CM2 CM18 CL7 CL67 CL65 CL63 CL59 CL56 CL52 CL48 CL44 CL41 CL4 CL39 CL33 CL3 CL27 CL24 CL18 CL12 CL1 CK64 CK61 CK57 CK54 CK50 CK5 CK46 CK42 CK41 CK4 CJ67 CJ65 CJ64 CJ61 CJ57 CJ54 CJ50 CJ5 CJ46 CJ42 CJ41 CJ4 CJ3 CJ1 CH9 CH7 CH66 CH65 CH64 CH63 CH61 CH59 CH56 CH54 CH52 CH5 CH48 CH46 CH44 CH42 CH4 CH39 CH33 CH3 CH27 CH24 CH2 CH18 CH12 CG67 CG66 CG65 CG64 CG61 CG59 CG56 CG54 CG52 CG5 CG48 CG46 CG44 CG42 CG4 CG27 CG24 CG2 CG11 CG1 CF67 CF66 CF65 CF64 CF2 CF1 CE62 CE6 CE53 CE47 CE15 CE10 CD66 CD64 CD4 CD2 CC8 T30 CL22 CC43 CC38 CC34 CC30 CC21 CC17 CC13 CB67 CB66 CB3 CB1 CA62 CA6 CA58 CA53 CA49 CA45 CA40 CA36 CA32 CA28 CA23 CA19 CA15 U0700 CA10 C7 C64 C61 C57 C54 C52 C4 C35 C33 C29 C26 C22 C18 C14 C11 BY65 CE51 BW51 BW47 BW43 BW38 BW34 BW30 BW25 BW21 BW17 BW13 BV66 BV64 BV4 BV2 BU67 BU1 BT62 BT6 BT58 BT53 BT49 BT45 BT40 BT36 BT32 BT28 BT23 BT19 BT15 BT10 BR65 BR3 BP8 BP55 BP51 BP47 BP43 BP38 BP34 BP30 BP25 BP21 BP17 BP13 BN67 BN1 BM62 BM6 BM58 BM53 BM49 BM45 BM40 BM36 BM32 BM28 BM23 BM19 BM15 BM10 BL66 BL64 BL4 BL2 BK8 BK60 BK55 BK51 BK47 BK43 BK38 BK34 BK30 BK25 AL49 BK17 BK13 BH62 BH6 BH58 BH53 BH49 BH45 BH40 BH36 BH32 BH28 BH23 BH19 BH15 BH10 BG67 BG65 BG3 BG1 BF8 BF55 BF51 BF47 BF43 BF34 BF30 BF25 BF21 BD62 BD58 BD53 BD49 BD45 BD40 BD36 BD32 BD28 BD23 BD10 BC67 BC66 BC2 BC1 BA8 BA60 BA55 BA51 BA47 BA43 BA38 BA34 BA30 BA21 BA17 BA13 B67 B65 B52 B46 B41 B35 B3 B1 U0700 AY67 AY64 AY4 AY1 AW62 AW6 AW58 AW53 AW49 AW45 AW40 AW36 AW32 AW28 CH50 AW19 AW15 AW10 AV66 AV64 AV4 AV2 AV1 AU8 AU60 AU55 AU51 AU47 AU43 AU38 AU34 AU30 AU25 AU21 AU17 AU13 AT65 AT3 AT1 AR62 AR6 AR58 AR53 AR49 AR45 AR40 AR36 AR32 AR28 AR19 AR15 AR10 AP67 AP64 AP4 AP1 AN8 AN60 AN55 AN51 AN47 AN43 AN38 AN34 AN30 AN25 AN21 AN17 AN13 AL62 AL58 AL53 AL45 AL40 AL36 AL32 AL28 AL23 AK67 AK66 AK2 AK1 AJ8 AJ55 AJ51 AL10 AJ43 AJ38 AJ34 AJ30 AJ25 AJ21 AG67 AG65 AG3 AG1 AF6 AF58 AF53 AF49 AF45 AF40 AF36 AF32 AF28 AF23 AF19 AF15 AF10 AD8 AD60 AD55 AD51 AD47 AD43 AD34 AD30 AD25 AD21 AD17 AD13 AC66 AC64 AC4 AC2 AB62 AB6 AB58 AB53 AB49 AB45 AB40 AB36 AB32 AB28 AB23 AB19 AB15 AB10 AA67 AA1 A9 A66 A63 A59 A56 A52 A5 A35 A31 A27 A24 A20 A2 A16 A12 U0700 CE43 CE38 CE36 CE34 CE32 CE28 CE23 CE19 BF6 BA6 AN6 AJ6 AD6 G53 G49 G45 G40 BF62 BA62 AU62 AN62 AJ62 BF60 CE21 J36 AF21 BK19 AR23 CC40 CG9 G34 CG7 Y38 Y34 AD38 AD36 Y32 BA25 T28 AU23 CK65 CK3 C65 C3 BB67 BB1 AM67 AM1 U0700 2 1 C1606 2 1 C1604 21 R1602 2 1 C1615 2 1 C1609 2 1 C1613 2 1 C1601 2 1 C1603 2 1 C1611 21 R1601 2 1 C1605 2 1 C1614 2 1 C1610 2 1 C1607 2 1 C1612 2 1 C1608 2 1 C1602 PP1V2_SOC PP1V8_SDRAM PP1V8_SDRAM PP1V2_REF PP1V2_PLL_CPU PP1V2_PLL_SOC PP1V8 CAYMAN-2GB-20NM-DDR-M CSPCSP CAYMAN-2GB-20NM-DDR-MCAYMAN-2GB-20NM-DDR-M CSP CAYMAN-2GB-20NM-DDR-M CSP CSP CAYMAN-2GB-20NM-DDR-M CKPLUS_WAIVE=PWRTERM2GND CKPLUS_WAIVE=PWRTERM2GND 20% 01005 0.1UF 6.3V X5R-CERM ROOM=SOC ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC MF 01005 1/32W 0.00 0% 6.3V 2.2UF 0201-1 20% X5R-CERM ROOM=SOC ROOM=SOC 20% 01005 6.3V X5R-CERM 0.1UF ROOM=SOC 0.1UF 6.3V 20% X5R-CERM 01005 20% 0.1UF 6.3V X5R-CERM 01005 ROOM=SOCROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF 01005 1/32W ROOM=SOC MF 0.00 0% ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF 6.3V 20% 2.2UF ROOM=SOC X5R-CERM 0201-1 ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF 10UF 6.3V 20% 0402-9 CERM-X5R ROOM=SOC 19 10 8 53 52 48 47 41 40 37 36 32 21 20 18 16 53 52 48 47 41 40 37 36 32 21 20 18 16 19 52 48 47 46 39 29 25 18 17 13 12 11 9 8 7 5 SYM 16 OF 16 VSSVSS SYM 15 OF 16 VSSVSS SYM 14 OF 16 VSS VSS SYM 13 OF 16 VSS VSS SYM 12 OF 16 VDD18_EFUSE1 VDD18_EFUSE2 VDD1 VDDIO18_GRP2 VDDIO18_GRP1 VDDIO18_GRP10 VDD18_TSADC1 VDD18_TSADC0 VDD18_TSADC2 VDD18_LPOSC VDD12_GPU_UVD VDD12_CPU_UVD VDD18_TSADC5 VDD18_TSADC4 VDD18_FMON VDD18_TSADC3 VDD12_PLL_SOC VDD12_SOC_UVD VDD12_PLL_CPU VDDIO18_GRP4 VDDIO18_GRP3 =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
315mA MAX PROBE POINTS 1007mA MAX 1230mA MAX (1us peak power) #24543147:10uF for 32GB #26326159:10uF for C1719 2 1 C1713 D6 B2 P6 P4 P2 OE10 OE0 OC10 OC0 L7 L5 L3 G7 B6 B4 E5 R5 OF10 OF0 OB10 OB0 A5 R7 R3 J9 J1 F2 A7 A3 OG10 OG0 OD10 OD0 OA10 OA0 D8 F8 M2 K2 P8 N7 N5 N3 M8 K8 H8 H6 G9 K6 K4 M6 J7 J5 M4 G5 C5 F4 G1 B8 C7 F6 E7 E3 H2 J3 G3 H4 D4 D2 C3 U1701 2 1 C1704 2 1 C1748 2 1 C1736 2 1 C1739 2 1 C1741 2 1 C1754 2 1 C1753 2 1 C1752 2 1 C1735 2 1 C1734 2 1 C1732 2 1 C1708 2 1 C1711 2 1 C1717 2 1 C1747 2 1 C1745 2 1 C1743 2 1 C1723 2 1 C1712 2 1 C1730 2 1 C1703 2 1 C1706 2 1 C1709 2 1 C1714 2 1 C1720 2 1 C1728 2 1 C1737 2 1 C1738 2 1 C1740 2 1 C1742 2 1 C1744 2 1 C1746 2 1 C1731 2 1 C1749 2 1 C1750 2 1 C1751 2 1 C1729 2 1 C1733 1 PP1701 1 PP1702 21 R1707 21 R1702 2 1 C1724 2 1 C1727 2 1 C1722 2 1 C1726 2 1 C1725 2 1 R1701 2 1 C1721 2 1 C1719 2 1 C1716 2 1 C1705 2 1 C1702 2 1 C1701 2 1 C1710 21 R1703 2 1 C1718 2 1 C1715 2 1 C1707 2 1 R1704 PP1V8 NAND_AGND PP0V9_NAND PP1V8 90_PCIE_AP_TO_NAND_REFCLK_P 90_PCIE_AP_TO_NAND_REFCLK_N NAND_AGND SWD_AP_NAND_SWCLK_R PP1V8_NAND_AVDD SWD_AP_BI_NAND_SWDIO_R PCIE_AP_TO_NAND_RESET_L AP_TO_NAND_FW_STRAP PMU_TO_NAND_LOW_BATT_BOOT_L NAND_ZQ AP_TO_NAND_RESET_L SWD_AP_BI_NAND_SWDIO SWD_AP_TO_MANY_SWCLK SYSTEM_ALIVE 90_PCIE_AP_TO_NAND_TXD_N 90_PCIE_AP_TO_NAND_TXD_P PCIE_NAND_RESREF PCIE_NAND_BI_AP_CLKREQ_L 90_PCIE_AP_TO_NAND_REFCLK_N 90_PCIE_AP_TO_NAND_REFCLK_P AP_TO_NAND_SYS_CLK NAND_VREF 90_PCIE_NAND_TO_AP_RXD_P 90_PCIE_NAND_TO_AP_RXD_N PP3V0_NAND 0402-1 15UF OMIT ROOM=NAND X5R 6.3V 20% VLGA THGBX6T1T82LFXF ROOM=NAND CRITICAL BOMOPTION=OMIT_TABLE X5R 0402-1 ROOM=NAND 15UF 6.3V 20% 6.3V OMIT 15UF 20% ROOM=NAND 0402-1 X5R 100PF 01005 NP0-C0G 16V 5% ROOM=NAND 1.0UF ROOM=NAND X5R 0201-1 6.3V 20% 0201-1 6.3V 1.0UF X5R ROOM=NAND 20% 0201-1 6.3V 20% ROOM=NAND 1.0UF X5R 20% 6.3V X5R 0201-1 ROOM=NAND 1.0UF 20% 6.3V X5R 1.0UF ROOM=NAND 0201-1 C0G-CERM ROOM=NAND 01005 220PF 10V 5% ROOM=NAND 01005 100PF 16V 5% NP0-C0G ROOM=NAND 01005 NP0-C0G 16V 39PF 5% 5% 01005 220PF C0G-CERM 10V ROOM=NAND 16V 5% 01005 22PF CERM ROOM=NAND 16V 5% 01005 NP0-C0G 68PF ROOM=NAND 1.0UF X5R 0201-1 ROOM=NAND 6.3V 20% 1.0UF X5R ROOM=NAND 6.3V 20% 0201-1 1.0UF X5R 20% ROOM=NAND 0201-1 6.3V 16V 5% 01005 NP0-C0G 39PF ROOM=NAND 16V 5% 100PF 01005 NP0-C0G ROOM=NAND X5R 15UF ROOM=NAND 0402-1 6.3V 20% 5% 01005 10V 220PF ROOM=NAND C0G-CERM 16V 5% 01005 22PF CERM ROOM=NAND 16V 5% 100PF 01005 NP0-C0G ROOM=NAND 5% 01005 10V 220PF C0G-CERM ROOM=NAND 16V 5% 100PF 01005 NP0-C0G ROOM=NAND 16V 5% 01005 NP0-C0G ROOM=NAND 68PF 0201-1 1.0UF ROOM=NAND 6.3V 20% X5R 1.0UF X5R 0201-1 ROOM=NAND 6.3V 20% 1.0UF X5R ROOM=NAND 6.3V 20% 0201-1 1.0UF X5R 6.3V 20% ROOM=NAND 0201-1 1.0UF X5R ROOM=NAND 20% 6.3V 0201-1 0201-1 ROOM=NAND 20% 1.0UF 6.3V X5R 01005 NP0-C0G 16V 5% ROOM=NAND 68PF 20% 6.3V X5R 0201-1 ROOM=NAND 1.0UF 1.0UF 20% 6.3V X5R 0201-1 ROOM=NAND 0201-1 X5R 20% 6.3V 1.0UF ROOM=NAND X5R ROOM=NAND 0402-1 15UF 6.3V 20% OMIT 15UF 20% 6.3V X5R ROOM=NAND 0402-1 SM P2MM-NSM ROOM=NAND SM P2MM-NSM ROOM=NAND 01005 MF ROOM=NAND 1/32W 0% 0.00 01005 MF1/32W ROOM=NAND 0% 0.00 01005 ROOM=NAND 10% 6.3V 0.01UF X5R 0402-1 ROOM=NAND 15UF 20% 6.3V X5RX5R 15UF 0402-1 ROOM=NAND 6.3V 20% ROOM=NAND 0201-1 X5R-CERM 6.3V 20% 2.2UF 01005 ROOM=NAND X5R 10% 0.01UF 6.3V 01005 1/32W MF 0.5% 34.8 ROOM=NAND OMIT 20% 6.3V X5R 15UF 0402-1 ROOM=NAND 0402-9 10UF 6.3V CERM-X5R 20% ROOM=NANDROOM=NAND X5R 15UF 20% OMIT 0402-1 6.3V 6.3V 0402-1 X5R ROOM=NAND 15UF 20% 0402-1 X5R 15UF 6.3V 20% ROOM=NAND 0402-1 15UF X5R ROOM=NAND 6.3V 20% 01005 0.1UF ROOM=NAND 6.3V 20% X5R-CERM 01005 1/32W MF ROOM=NAND 1% 24.9 ROOM=NAND 01005 22PF CERM 16V 5% ROOM=NAND 01005 220PF C0G-CERM 10V 5% X5R 15UF 0402-1 ROOM=NAND 6.3V 20% 01005 1/32W MF 3.01K ROOM=NAND 1% 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 17 19 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 17 8 17 8 17 8 12 20 7 13 533613 212015 8 8 8 17 8 17 8 11 8 8 VER-1 VDD VDD PCI_AVDD_H PCIE_TX1_M PCIE_TX1_P PCIE_CLKREQ* TRST* RESET* PCIE_RX1_M PCIE_TX0_P PCIE_TX0_M VSS VSS PCIE_RX0_P PCIE_RX0_M PCI_RESREF PCIE_RX1_P ZQ VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSSA EXT_D0 EXT_D1 EXT_D2 EXT_D3 EXT_D4 EXT_D5 EXT_D6 EXT_D7 EXT_NCE EXT_NRE EXT_NWE EXT_RNB EXT_CLE EXT_ALE VDD VDD VDD VDD VDD AVDD1 VCC VCC VCC VCC VCC VDDIO VCC VDDIO VDDIO VDDIO VDDIO VDDIO VREF PCI_VDD2 PCI_VDD1 PCIE_REFCLK_M PCIE_REFCLK_P CLK_IN PCI_AVDD_CLK2 PCI_AVDD_CLK1 NC NC NC NC PP PP NC NC NC NC NC NC NC NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
BUCK9 BUCK2BUCK0 4.7AMAX13.4AMAX BUCK8 13.4AMAX BUCK3BUCK4 4.7AMAX 0.67V/0.80V 0.67V - 0.92V 1.7AMAX (pendingvendorqual) BUCK5 3.2AMAX 1.5AMAX BUCK6 1.5AMAX 0.75AMAX 1.5AMAX 0.80V - 1.06V 0.80V - 0.92V BUCK7 BUCK1 1.03V for overdrive only 0.625V - 1.06V Voltages per Cayman Power Spec, Sec. 2.2, rev 0.9.2, #24557869 D10/D101:#24681501,TY ONLY, D11/D11: Both Vendor 2 1 L1803 2 1 L1801 2 1 L1804 21 L1802 2 1 L1805 2 1 L1818 21 L1811 2 1 C1840 2 1 XW1807 2 1 C1802 2 1 C1874 2 1 C1875 2 1 C1876 2 1 C1877 2 1 C1864 2 1 C1801 H13 H14 R13 M8 F11 H6 N7 L19 L18 F19 F18 V6 U6 K19 K18 D1 C1 B1 M3 M2 M1 T3 T2 H3 H2 H1 D13 C13 B13 A13 D17 C17 B17 A17 D9 C9 B9 A9 D5 C5 B5 A5 V5 U5 V2 U2 M19 M18 P16 G19 G18 H15 V7 U7 R8 J19 J18 H16 A2 D2 C2 B2 F5 V4 U4 L3 L2 L1 N3 N2 N1 K5 V3 U3 U1 T1 R1 R3 R2 R7 J3 J2 J1 G3 G2 G1 J5 D12 C12 B12 A12 D14 C14 B14 A14 D16 C16 B16 A16 A18 D18 C18 B18 F12 D10 C10 B10 A10 D8 C8 B8 A8 D6 C6 B6 A6 A4 D4 C4 B4 F10 U1801 21 XW1805 21 L1817 2 1 C1830 2 1 C1836 2 1 C1861 21 L1816 21 XW1804 21 L1814 2 1 L1815 2 1 C1816 2 1 C1823 2 1 C1822 2 1 C1829 2 1 C1835 2 1 C1860 2 1 C1841 2 1 C1871 21 L1813 2 1 L1812 21 L1810 2 1 C1814 2 1 C1821 2 1 C1828 2 1 C1834 2 1 C1866 2 1 C1873 2 1 C1813 2 1 C1820 2 1 C1827 2 1 C1833 2 1 C1839 2 1 C1865 2 1 XW18062 1 C1870 2 1 C1862 2 1 C1863 2 1 C1869 2 1 C1868 2 1 C1867 2 1 C1872 2 1 C1811 21 L1809 21 L1807 2 1 L1808 21 L1806 2 1 C1856 2 1 C1849 2 1 C1859 2 1 C1855 2 1 C1852 2 1 C1848 2 1 C1858 2 1 C1854 2 1 C1851 2 1 C1847 2 1 C1810 2 1 C1809 2 1 C1808 2 1 C1807 2 1 C1806 2 1 C1805 2 1 C1804 2 1 C1803 2 1 C1845 2 1 C1843 2 1 C1838 2 1 C1832 2 1 C1826 2 1 C1819 2 1 C1844 2 1 C1842 2 1 C1837 2 1 C1831 2 1 C1825 2 1 C1857 2 1 XW1801 2 1 XW1803 2 1 XW1802 2 1 C1853 2 1 C1850 2 1 C1846 2 1 C1818 BUCK5_LX0PP0V9_SOC_FIXED BUCK5_FB PP2V8_UT_AF_VAR PP_GPU_SRAM_VAR PP_CPU_SRAM_VAR PP1V1 PP1V8_MAGGIE_IMU PP1V8_TOUCH BUCK2_PP_SOC_FB BUCK1_PP_GPU_FB BUCK0_PP_CPU_FB PP1V8 BUCK9_LX0 BUCK7_LX0 BUCK6_LX0 BUCK9_FB BUCK6_FB BUCK4_FB BUCK4_LX1 BUCK4_LX0 BUCK3_LX0 BUCK3_FB BUCK2_LX1 BUCK2_LX0 BUCK1_LX3 BUCK1_LX2 BUCK1_LX1 BUCK1_LX0 BUCK0_LX3 BUCK0_LX1 BUCK0_LX0 PP_SOC_VAR PP1V8_SDRAM PP1V1_SDRAM PP_GPU_VAR BUCK0_LX2 PP_CPU_VAR VDD_MAIN_SNS BUCK8_LX0 BUCK8_FB PP_VDD_MAIN PP1V25_BUCK BUCK7_FB ROOM=PMU 1UH-20%-2.1A-0.12OHM CRITICAL PIQA20121T-SM CRITICAL ROOM=PMU PIQA20121T-SM 1UH-20%-2.1A-0.12OHM 0603 1.0UH-20%-1.5A-0.161OHM CRITICAL MCFE2016T-SM 1.0UH-20%-2.25A-0.086OHM CRITICAL ROOM=PMU PIQA20121T-SM 0.47UH-20%-3.8A-0.048OHM NO_XNET_CONNECTION=1 CRITICAL ROOM=PMU CRITICALPINA20121T-SM 0.22UH-20%-6.7A-0.023OHM NO_XNET_CONNECTION=1 ROOM=PMU 0402-1ROOM=PMU 15UF X5R 6.3V 20% OMIT ROOM=SOC SHORT-20L-0.05MM-SM NO_XNET_CONNECTION=1 ROOM=PMU 0402-1 X5R 6.3V 20% 15UF ROOM=PMU 0402-1 X5R 6.3V 20% 15UF 20% 6.3V 2.2UF ROOM=PMU 0201-1 X5R-CERM 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 ROOM=PMU 0402-1 15UF X5R 6.3V 20% 0402-1ROOM=PMU 15UF X5R 6.3V 20% D2333A1 WLCSP ROOM=PMU OMIT SHORT-20L-0.05MM-SM NO_XNET_CONNECTION=1 ROOM=SOC PIQA20161T-SM 1.0UH-20%-3.6A-0.060OHM CRITICAL ROOM=PMU NO_XNET_CONNECTION=1 ROOM=PMU 0402-1 X5R 6.3V 20% 15UF ROOM=PMU 0402-1 X5R 6.3V 20% 15UF 5% 10V C0G-CERM ROOM=PMU 01005 220PF PIQA20161T-SM 1.0UH-20%-3.6A-0.060OHM CRITICAL ROOM=PMU NO_XNET_CONNECTION=1 OMIT SHORT-20L-0.05MM-SM ROOM=SOC NO_XNET_CONNECTION=1 PIQA20161T-SM 1.0UH-20%-3.6A-0.060OHM ROOM=PMU CRITICAL PIQA20121T-SM 0.47UH-20%-3.8A-0.048OHM CRITICALNO_XNET_CONNECTION=1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 ROOM=PMU ROOM=PMU 0402-1 15UF X5R 6.3V 20% ROOM=PMU 0402-1 15UF X5R 6.3V 20% ROOM=PMU 0402-1 15UF X5R 6.3V 20% ROOM=PMU 01005 220PF C0G-CERM 10V 5% ROOM=PMU 0402-1 15UF X5R 6.3V 20% ROOM=PMU 01005 220PF C0G-CERM 10V 5% PINA20121T-SM 0.22UH-20%-6.7A-0.023OHM ROOM=PMU CRITICALNO_XNET_CONNECTION=1 0.22UH-20%-6.7A-0.023OHM PINA20121T-SM CRITICAL ROOM=PMUNO_XNET_CONNECTION=1 PIQA20161T-SM 1.0UH-20%-3.6A-0.060OHM CRITICAL ROOM=PMU NO_XNET_CONNECTION=1 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 20% 6.3V X5R 15UF ROOM=PMU 0402-1 5% 10V C0G-CERM 220PF ROOM=PMU 01005 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% OMIT SHORT-20L-0.05MM-SM ROOM=SOC NO_XNET_CONNECTION=1 5% 10V C0G-CERM 220PF ROOM=PMU 01005 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 5% 10V C0G-CERM 220PF ROOM=PMU 01005 5% 10V C0G-CERM 220PF ROOM=PMU 01005 5% 10V C0G-CERM 220PF ROOM=PMU 01005 01005 ROOM=PMU 220PF C0G-CERM 10V 5% 220PF C0G-CERM 10V 5% 01005 ROOM=PMU NO_XNET_CONNECTION=1 PINA20121T-SM CRITICAL 0.22UH-20%-6.7A-0.023OHM ROOM=PMU PINA20121T-SM 0.22UH-20%-6.7A-0.023OHM ROOM=PMU CRITICALNO_XNET_CONNECTION=1 CRITICAL ROOM=PMU 1.0UH-3.6A-0.06OHM NO_XNET_CONNECTION=1 MEKK2016T-SM NO_XNET_CONNECTION=1 PINA20121T-SM 0.22UH-20%-6.7A-0.023OHM CRITICAL ROOM=PMU 1.0UH-20%-3.6A-0.060OHM PIQA20161T-SM ROOM=PMU CRITICALNO_XNET_CONNECTION=1 2.2UF20% 6.3V X5R-CERM ROOM=PMU 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 20% X5R-CERM 6.3V 2.2UF 0201-1 ROOM=PMU 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 2.2UF ROOM=PMU 0201-1 X5R-CERM 6.3V 20% 6.3V X5R-CERM 2.2UF 20% 0201-1 ROOM=PMU X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 20% 15UF 6.3V 0402-1 ROOM=PMU X5R 6.3V 20% 15UF ROOM=PMU 0402-1 6.3V 15UF 20% 0402-1ROOM=PMU X5R 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 0402-1ROOM=PMU 6.3V 20% 15UF X5R 0402-1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 20% X5R 15UF ROOM=PMU 6.3V 0402-1 20% X5R 15UF ROOM=PMU 6.3V 0402-1 20% 6.3V X5R 15UF ROOM=PMU 0402-1 20% 6.3V X5R 15UF ROOM=PMU 0402-1 20% 6.3V X5R 15UF ROOM=PMU 20% 6.3V CERM-X5R 10UF ROOM=PMU 0402-9 OMIT ROOM=SOC SHORT-20L-0.05MM-SM NO_XNET_CONNECTION=1 OMIT SHORT-20L-0.05MM-SM ROOM=SOC NO_XNET_CONNECTION=1 NO_XNET_CONNECTION=1ROOM=SOC SHORT-20L-0.05MM-SM OMIT 20% 6.3V CERM-X5R 10UF ROOM=PMU 0402-9 ROOM=PMU 20% 6.3V CERM-X5R 10UF 0402-9 20% 6.3V CERM-X5R 10UF 0402-9 ROOM=PMU 0402-1 20% 6.3V X5R 15UF ROOM=PMU 15 10 9 8 7 25 14 14 157 3624 47463938 14 14 14 52484746 39292517161312119875 14 53524847 4140373632212016 1915 14 14 19 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 10 9 4 19 SYM 2 OF 4 BAT/USBBUCKINPUT SWITCHOUTPUTS VDD_BUCK6 VBUCK4_SW BUCK3_SW1 BUCK3_SW2 BUCK3_SW3 BUCK4_SW1 BUCK3_FB VBUCK3_SW BUCK3_LX0 BUCK4_LX0 BUCK4_LX1 BUCK4_FB BUCK2_FB BUCK2_LX0 BUCK1_FB BUCK1_LX3 BUCK2_LX1 BUCK0_LX3 BUCK1_LX1 BUCK0_FB BUCK1_LX2 BUCK1_LX0 BUCK0_LX1 BUCK0_LX0 BUCK0_LX2 VDD_BUCK1_01 VDD_MAIN VDD_MAIN_SW VDD_BUCK0_23 VDD_BUCK2 VDD_BUCK1_23 VDD_BUCK4 VDD_BUCK3 VDD_BUCK5 VDD_BUCK7 VDD_BUCK8 VDD_BUCK9 BUCK5_LX0 BUCK5_FB BUCK6_LX0 BUCK6_FB BUCK7_LX0 BUCK7_FB BUCK8_LX0 BUCK8_FB BUCK9_LX0 BUCK9_FB VDD_MAIN_E VDD_MAIN_N VDD_BUCK0_01 VDD_MAIN_W VDD_MAIN_W VDD_MAIN_SNS 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
#24989262 #24989262:OTP-AO LDO17 default off,50mA Iout_max VPUMP: 10nF min. @4.6V VBUF_1V2 LDO17 LDO3 LDO6 LDO9 +/-4.5% LDO10 LDO11 LDO8 1.2-2.475V 1.2-2.475V LDO1 (Ca) LDO2 (Ca) 1.2-2.475V 2.4-3.675V 2.4-3.675V 0.7-1.2V 2.5-3.6V(tbc) 1.2-2.475V LDO7 (Cb) 1.2-2.475V 2.4-3.675V +/-30mV 250mA LDO14 LDO13 LDO12 LDO7 LDO15 0.7-1.4V 1.2-2.475V 250mA LDO19 LDO16 LDO18 LDO4 LDO5 LDO1 LDO_RTC 250mA 1150mA0.7-1.2V LDO11 (Cb) LDO# +/-75mV LDO6 (Cb) LDO9 (Cb) LDO5 (F) LDO# LDO3 (Ca) LDO4 (D) ADJ.RANGE, LOW 1.2-2.475V ADJ.RANGE, HI 2.4-3.675V 2.4-3.675V 2.4-3.675V +/-2.5% +/-30mV +/-25mV 250mA 1000mA MAX.CURRENT +/-2.5% 50mA +/-1.4% 60mA+/-2.5% 50mA ACCURACY 50mA +/-2.5% (500/100mA in bypass) LDO15 (Ca) LDO14 (Gb) LDO13 (Cb) LDO12 (E) +/-30mV +/-2.5% 2.4-3.675V 2.4-3.675V 400mA 250mA 250mA 10mA 50mA 250mA 400mA 10mA 50mA 400mA 10mA MAX.CURRENT 2.4-3.675V 2.4-3.675V ADJ.RANGE, HI +/-3.0% +/-30mV +/-30mV ACCURACY +/-5% +/-2.5% +/-3.0% +/-2.0% +/-3.0% +/-5.0% 2.4-3.675V ADJ.RANGE, LOW 1.2-2.475V 1.2-2.475V 1.8V 0.7-1.4V 1.2-2.475V 1.2-2.475V 1.2V 0.7-1.4V 2.5V LDO17 (Ca) BUF_1V2 LDO19 (Gb) LDO16 (Cb) LDO18 (Gb) ADELYN LDO SPECS U15 = PMU XTAL GND 1.2-2.475V 2.4-3.675V LDO8 (Cb) LDO10 (Ga) LDO2 NewforADELYN 2 1 R1901 2 1 C1923 2 1 C1930 2 1 C1904 2 1 C1905 2 1 C1915 2 1 C1912 2 1 C1919 2 1 C1909 2 1 C1902 2 1 XW1902 V8 V19 V12 V1 U8 T13 U15 T8 T7 T6 T4 T15 T5 R4 R17 P15 P4 P3 P2 P1 N4 N19 N18 N17 M4 M17 L8 L4 L17 K8 K4 K3 K2 K17 K1 J8 J4 J17 H4 H19 H18 H17 G4 G17 F4 F3 F2 F17 F1 E9 E8 E7 E6 E5 E4 E3 E2 E19 E18 E17 E16 E15 E14 E13 E12 E11 E10 E1 D7 D3 D19 D15 D11 C7 C3 C19 C15 C11 B7 B3 B19 B15 B11 A7 P14 A3 P13 A19 H8 A15 A11 A1 U1801 R5 G15 U18 U17 T11 T18 U12 U16 U14 P7 U13 T9 P17 R18 P18 T17 T14 U10 U9 T16 T10 U11 T12 U19 V18 V17 T19 V16 V13 R9 R19 P19 R14 V10 V9 R16 R10 V11 R12 R15 P8J6 U1801 2 1 C1935 2 1 C1933 2 1 C1932 2 1 XW1901 2 1 C1922 2 1 C1913 2 1 C1908 2 1 C1925 2 1 C1926 2 1 C1927 2 1 C1921 2 1 C1918 2 1 C1916 2 1 C1901 2 1 C1907 2 1 C1911 2 1 C1910 2 1 C1914 PP2V9_NH_AVDD PP0V9_NAND PP0V8_AOP PP3V3_USB PP1V8_HAWKING PP1V2_REF PMU_VPUMP PP_VDD_MAIN PMU_VSS_RTC PMU_PRE_UVLO_DET VDD_MAIN_SNS PP_VDD_MAIN PP1V1_SDRAM PP1V25_BUCK PP_VDD_MAIN PP_VDD_BOOST PP3V0_TRISTAR_ANT_PROX PP1V2_NH_NV_DVDD PP1V2_UT_DVDD PP_LDO17 PP1V8_ALWAYS PP3V0_MESA PP1V2_SOC PP1V8_MESA PP_ACC_VAR PP3V0_NAND PP3V0_ALS_APS_CONVOY PP1V8_VA 0.00 0201 NOSTUFFMF 1% 1/20W 20% 2.2UF 6.3V X5R-CERM 0201-1 ROOM=PMU 0201-1 ROOM=PMU X5R-CERM 20% 2.2UF 6.3V 2.2UF 6.3V 20% X5R-CERM 0201-1 ROOM=PMU 5% 16V 33PF 01005 ROOM=PMU NP0-C0G-CERM 6.3V X5R ROOM=PMU 15UF20% 0402-1 X5R ROOM=PMU 20% 6.3V 0402-1 15UF 20% 0201-1 X5R-CERM 2.2UF ROOM=PMU 6.3V 220PF C0G-CERM 10V 5% 01005 ROOM=PMU 47NF X5R-CERM ROOM=PMU 6.3V 01005 20% ROOM=PMU SHORT-20L-0.05MM-SM OMIT WLCSP D2333A1 WLCSP D2333A1 ROOM=PMU 20% 6.3V X5R 0201-1 1.0UF 20% 6.3V X5R 0201-1 1.0UF ROOM=PMU 0.22UF 20% 6.3V X5R ROOM=PMU 01005-1 NO_XNET_CONNECTION ROOM=PMU OMIT SHORT-20L-0.05MM-SM 2.2UF ROOM=PMU 0201-1 X5R-CERM 6.3V 20% 20% 6.3V ROOM=PMU X5R-CERM 0201-1 2.2UF 20% X5R-CERM ROOM=PMU 0201-1 6.3V 2.2UF X5R 0201-1 20% 6.3V ROOM=PMU 1.0UF ROOM=PMU 0201-1 20% 6.3V X5R-CERM 2.2UF 0201-1 2.2UF 20% 6.3V X5R-CERM ROOM=PMU 2.2UF X5R-CERM ROOM=PMU 20% 6.3V 0201-1 20% 6.3V X5R-CERM 2.2UF 0201-1 ROOM=PMU 6.3V ROOM=PMU 20% 0201-1 X5R-CERM 2.2UF X5R 20% 6.3V 0402-1 ROOM=PMU 15UF 20% 6.3V CERM-X5R 10UF 0402-9 ROOM=PMUROOM=PMU 20% 6.3V 0402-9 10UF CERM-X5RCERM-X5R 0402-9 6.3V 10UF 20% ROOM=PMU 6.3V CERM-X5R 20% 0402-9 ROOM=PMU 10UF 29 17 15 7 44 16 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 20 20 18 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 18 15 18 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 53 38 37 32 25 23 53414029 29 25 2120 38 16108 4838 464027 5217 2925 35343332 NC NC NC SYM 4 OF 4 VSS VSS SYM 1 OF 4 LDO LDOINPUT VDD_LDO4 VPP_OTP VLDO2 VLDO8 VDD_LDO19 VDD_LDO19 TP_DET VDD_LDO10 VDD_LDO11_13 VDD_LDO14 VDD_LDO7_8 VDD_LDO16 VDD_LDO18 VDD_LDO6_BYP VDD_LDO9 VDD_LDO5 VDD_LDO1 VDD_LDO2_15 VPUMP VBUF_1V2 VLDO19 VLDO18 VLDO14 VLDO13 VLDO17 VLDO16 VLDO15 VLDO12 VLDO9_FB VLDO10 VLDO11 VLDO9 VBYPASS VLDO7 VLDO6 VLDO4 VLDO3 VDD_LDO3_17 VLDO5_1 VLDO5_0 VLDO1 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
GPIO21 = I2C SCL is for Chestnut dark current mitigation RS = requires sequencer Sequencer controllable #24511807: Stuff for Carrier TBD Button for two-finger reset: 20711463 and 21196187 RS RS RS BUTTON PULL-UP RESISTORS NOTE:VDROOP_DET filtering is now inside Adelyn RADIO PA NTC AP NTC FOREHEAD NTC NOTE:100PF CAPS ARE THE SAMPLING CAPS FOR PMU ADC Reserved for MENU key on dev board REAR CAMERA NTC Active high with int 200k PD HIGH=FORCE PWM MODE D101/D111 ONLY: TCXO_RF Supplies 32K #24825674: Add R2020 to meet timing spec #26169957: R2020 to 100ohm (D10x only) I2C1_AP_SCL47 I2C0_AP_SCL 37 47 I2C1_AP_SDA47 21 R2020 2 1 C2013 2 1 C2001 1 PP2002 1 PP2001 1 PP2003 21 R2009 2 1 R2012 2 1 R2007 2 1 R2008 2 1 R2015 21 R2000 V15 V14 J7 F7 G7 F6 G6 N9 M7 L6 L5 P6 M6 R6 G16 H5 M9 R11 L11 P12 M13 N6 N13 P11 P10 P9 M5 N8 N10 M10 N5 P5 G5 K6 L7 L9 K10 K9 J10 J9 H10 H9 G8 F8 G9 F9 G10 G11 H12 G12 G13 F13 F14 G14 F15 F16 L13 L10 K11 J11 H11 N11 M11 N12 M12 H7 N14 N15 N16 M14 M15 M16 L16 L15 L14 K12 K13 J13 K14 K15 K16 J16 J15 J14 K7 L12 J12 U1801 21 Y2001 2 1 R2005 2 1 R2006 2 1 C2006 2 1 R2011 21 XW2001 2 1 C2002 2 1 C2004 2 1 C2003 2 1 C2011 2 1 R2010 2 1 R2004 2 1 R2003 2 1 R2002 2 1C2007 2 1 C2008 2 1 C2009 2 1C2010 2 1 R2001 21 XW2005 21 XW2004 21 XW2002 21 XW2003 FOREHEAD_NTC PMU_ADC_IN SPI_PMU_TO_PMGR_MISO PMU_TO_AOP_CLK32K PMU_VSS_RTC NC_GNSS_TO_PMU_HOST_WAKE PMU_TO_WLAN_REG_ON PMU_TO_BB_USB_VBUS_DETECT PMU_TO_NFC_EN PMU_TO_AP_FORCE_DFUPMU_TO_AP_FORCE_DFU_R PMUGPIO_TO_WLAN_CLK32K AP_TO_PMU_SOCHOT_L RADIO_PA_NTC REAR_CAMERA_NTC PMU_IREF CHESTNUT_TO_PMU_ADCMUX PMU_PRE_UVLO_DET BUTTON_POWER_KEY_L BUTTON_RINGER_A PP1V2_MAGGIE PMU_AMUX_AY BBPMU_TO_PMU_AMUX2 PMUGPIO_TO_WLAN_CLK32K AP_TO_PMU_TEST_CLKOUT TRISTAR_TO_PMU_USB_BRICK_ID AP_NTC PMU_TO_CODEC_DIGLDO_PULLDN PMU_TO_BT_REG_ON NC_PMU_TO_GNSS_EN PMU_TO_NAND_LOW_BATT_BOOT_L NFC_TO_PMU_HOST_WAKE PMU_TO_BBPMU_RESET_R_L BBPMU_TO_PMU_AMUX1 FOREHEAD_NTC_RETURN PMU_XTAL2 PMU_TO_BOOST_EN BT_TO_PMU_HOST_WAKE PMU_AMUX_BY PMU_TO_ACC_BUCK_SW_EN PMU_VREF PMU_TO_AP_PRE_UVLO_L PMU_TO_AP_THROTTLE_GPU_L PMU_TO_AP_THROTTLE_CPU_L AP_VDD_GPU_SENSE AP_VDD_CPU_SENSE TRISTAR_TO_PMU_USB_BRICK_ID PMU_ADC_IN BUTTON_VOL_DOWN_L PMU_TO_AP_BUF_RINGER_A PMU_TO_AP_BUF_POWER_KEY_L PMU_TO_AP_BUF_VOL_DOWN_L TIGRIS_TO_PMU_INT_L BB_TO_PMU_PCIE_HOST_WAKE_L WLAN_TO_PMU_HOST_WAKE PMU_TO_HOMER_RESET_L PMU_TO_LCM_PANICBPMU_VDD_RTC LCM_TO_CHESTNUT_PWR_EN SPI_PMGR_TO_PMU_MOSI SPI_PMGR_TO_PMU_SCLK PP1V8_SDRAM PP1V8_SDRAM AP_NTC_RETURN PMU_TO_BBPMU_RESET_L BUTTON_POWER_KEY_L RCAM_NTC_RETURN PP1V8_ALWAYS PP1V8_SDRAM BUTTON_RINGER_A BUTTON_VOL_DOWN_L PP1V8_ALWAYS PA_NTC_RETURN LCM_TO_MANY_BSYNC AP_TO_PMU_WDOG_RESET TRISTAR_TO_PMU_HOST_RESET AOP_TO_PMU_ACTIVE_REQUEST PMU_TO_SYSTEM_COLD_RESET_L BUTTON_VOL_UP_L AP_TO_PMU_AMUX_OUT ACC_BUCK_TO_PMU_AMUX BBPMU_TO_PMU_AMUX3 PMU_XTAL1 PMU_TCAL AOP_TO_PMU_SLEEP1_REQUEST PMU_TO_AOP_SLEEP1_READY PMU_TO_AOP_TRISTAR_ACTIVE_READY SYSTEM_ALIVE PMU_TO_AOP_IRQ_L I2C_PMU_SDA_R SHORT-20L-0.05MM-SM OMIT ROOM=SOC 100 01005 MF 1/32W 5% ROOM=PMU ROOM=PMU X5R 10% 01005 PLACE_NEAR=U1801:2mm 10V 1000PF X5R ROOM=PMU 01005 1000PF 10V 10% ROOM=SOC SHORT-20L-0.05MM-SM OMIT SM ROOM=SOC P2MM-NSM SM ROOM=SOC P2MM-NSM SM ROOM=PMU P2MM-NSM 0% 1/32W 01005 MF 0.00 NO_XNET_CONNECTION 10K MF 1/32W 5% ROOM=PMU 01005 MF 01005 5% ROOM=PMU 1/32W 220K NOSTUFF 100K ROOM=PMU MF 1/32W 01005 5% NOSTUFF 220K ROOM=PMU MF 1/32W 01005 5% NOSTUFF 1.00K MF 01005 5% 1/32W ROOM=PMU D2333A1WLCSP 32.768KHZ-20PPM-12.5PF CRITICAL ROOM=PMU 1.60X1.00-SM ROOM=PMU 100K MF 1/32W 01005 5% 100K MF 1/32W 01005 5% ROOM=PMU OMIT ROOM=SOC SHORT-20L-0.05MM-SM 0201 6.3V 20% ROOM=PMU X5R 0.22UF ROOM=PMU 1% 200K 201 1/20W MF OMIT ROOM=PMU SHORT-20L-0.05MM-SM 0.22UF 6.3V 0201 X5R ROOM=PMU 20% 22PF 16V 5% 01005 CERM ROOM=PMU 22PF 16V 5% CERM 01005 ROOM=PMU ROOM=PMU NP0-C0G 01005 100PF 5% 16V NP0-C0G 5% ROOM=PMU 01005 16V 100PF 3.92K 0201 0.1% ROOM=PMU 1/20W MF ROOM=PMU 10KOHM-1% 01005 ROOM=PMU 01005 10KOHM-1% ROOM=PMU 10KOHM-1% 01005 5% 01005 ROOM=PMU NP0-C0G 100PF 16V ROOM=PMU NP0-C0G 01005 100PF 5% 16V 5% ROOM=PMU 01005 NP0-C0G 16V 100PF 10KOHM-1% ROOM=PMU 01005 ROOM=SOC SHORT-20L-0.05MM-SM OMIT 20 11 13 19 53 53 53 124 5320 11 37 19 4420 4420 36 4 53 53 20 7 40 20 32 53 17 53 53 23 53 4 27 11 11 12 14 14 4020 20 4420 12 12 12 21 53 53 36 39 39 37 11 11 53 52 48 47 41 40 37 36 32 21 20 18 16 535248 47414037363221201816 53 44 20 212019 535248 47414037363221201816 44 20 44 20 212019 53 39 23 13 7 40 13 13 7 44 12 7 27 53 13 15 13 40 37 13 7 21 17 15 13 NC NC NC PP PP PP NC NC NC NC NC NC NC SYM 3 OF 4 REFS RESETS COMPARATORADC PMGR BUTTONS AMUX GPIO NTCXTAL GPIO3 SHDN RESET* RESET_IN3 RESET_IN2 SLEEP1_REQ CRASH* OUT_32K SLEEP_32K ACTIVE_RDY SYS_ALIVE FORCE_SYNC ACTIVE_REQ SLEEP1_RDY IRQ* SDA SCLK SCL MISO MOSI AMUX_A1 AMUX_A0 AMUX_A3 AMUX_A2 AMUX_A4 AMUX_A5 AMUX_B1 AMUX_B0 AMUX_B2 AMUX_B4 AMUX_B5 AMUX_B6 AMUX_B7 AMUX_B3 AMUX_BY TDEV3 TDEV2 TDEV1 XTAL1 TCAL TDEV5 TDEV4 XTAL2 VDD_RTC RESET_IN1 GPIO21 GPIO17 GPIO18 GPIO19 GPIO20 GPIO16 GPIO15 GPIO14 GPIO12 GPIO13 GPIO11 GPIO10 GPIO6 GPIO8 GPIO7 GPIO9 GPIO4 GPIO5 GPIO2 GPIO1 BUTTON2 BUTTON3 BUTTON4 BUTTONO1 BUTTONO2 BUTTONO3 BUTTON1 AMUX_A6 AMUX_A7 AMUX_AY ADC_IN IBAT VBAT BRICK_ID VDROOP0_DET VDROOP1_DET PRE_UVLO_DET VDROOP0* VDROOP1* PRE_UVLO* IREF VREF 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
See Charger C2113 on Pg46 #25112685,Remove Snub TO TRINITY F4: 100 kOhm pullup to VLDO (regulated output voltage) TIGRIS CHARGER #24558610: Change to 100ohm I2C1_AP_SDA47 I2C1_AP_SCL47 21 R2103 2 1 3 Q2102 2 1 C2103 2 1 R2105 2 1C2102 C2 D2 B2 A2 F4 F1 E5 C5 D5 B5 A5 F3 E3 G3 E4 F5 C3 D3 B3 A3 G4 G2 G1 F2 C4 D4 B4 A4 G5 E1 C1 D1 B1 A1 E2 U2101 2 1 C2114 2 1 R2102 21 C2105 B3 B2 B1 A3 A2 A1 C3 C2 C1 Q2101 21 R2104 2 1 C2104 2 1 C2118 2 1 C2117 2 1 C2115 2 1 C2112 2 1 C2111 2 1 C2109 2 1 C2108 2 1 C2110 2 1C2106 2 1 R2101 2 1 C2101 PP5V0_USB PP1V8_ALWAYS PP1V8_SDRAM PP_BATT_VCC TIGRIS_TO_BATTERY_SWI TIGRIS_TO_BATTERY_SWI_1V8 SWI_AP_BI_TIGRIS TIGRIS_BOOT TIGRIS_LDO TIGRIS_VBUS_DETECT TIGRIS_TO_PMU_INT_R_L VBATT_SENSE SYSTEM_ALIVE TRISTAR_TO_TIGRIS_VBUS_OFF TIGRIS_TO_PMU_INT_L TIGRIS_ACTIVE_DIODE USB_VBUS_DETECT TIGRIS_BUCK_LX TIGRIS_PMID PP_VDD_MAIN ROOM=CHARGER 4.2UF 0402-1 10% 16V X5R-CERM 01005 10% 16V CER-X7R 330PF ROOM=CHARGER 01005 10% 16V CER-X7R 330PF ROOM=CHARGER 330PF 16V 10% ROOM=CHARGER 01005 CER-X7R 5% 1/32W 01005 ROOM=CHARGER 100K MF 0402-1 10% 16V X5R-CERM 4.2UF ROOM=CHARGER 100 ROOM=CHARGER 5% 01005 1/32W MF DFN RV3C002UN ROOM=CHARGER 10% 330PF CER-X7R 16V 01005 40.2K MF 1/32W 01005 1% ROOM=CHARGER C0G-CERM 01005 5% 10V 220PFSN2400AB0 ROOM=CHARGER CRITICAL WCSP 10UF ROOM=CHARGER 20% 6.3V CERM-X5R 0402-9 100K 01005 ROOM=CHARGER MF 1/32W 5% NOSTUFF X5R ROOM=CHARGER NO_XNET_CONNECTION 10% 16V 0.047UF 0201 BGA CSD68827W ROOM=CHARGER CRITICAL ROOM=CHARGER 1% MF 1/32W 30.1K 01005 C0G-CERM 01005 5% 10V 220PF ROOM=CHARGER 0201-1 20% 6.3V X5R-CERM ROOM=CHARGER 2.2UF 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=CHARGER 2.2UF 6.3V 0201-1 X5R-CERM ROOM=CHARGER 20% ROOM=CHARGER 16V 10% 330PF CER-X7R 01005 ROOM=CHARGER 4.2UF 10% 16V X5R-CERM 0402-1 40 4 20 19 53 52 48 47 41 40 37 36 32 20 18 16 224 22 12 22 20 17 15 40 20 7 28 53524641403937353433 31282726252319181094 S D SYM_VER_1 G PMID VBUS PGND PGND PGND PGND HDQ_HOST HDQ_GAUGE ACT_DIODE BAT_SNS BAT BAT BAT BAT BUCK_SW BUCK_SW BUCK_SW BUCK_SW BOOT LDO TEST VBUS_DET INT VBUS_OVP_OFF SCL SDA SYS_ALIVE VBUS VBUS VBUS VBUS VDD_MAIN VDD_MAIN VDD_MAIN VDD_MAIN G S D 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok
iPhone 7 full schematic ok

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iPhone 7 full schematic ok

  • 1. BS0402 TP0424 TP0411 TP0400TP0401 TP0420TP0422 TP0415 TP0416 TP0407 TP0406 TP0405TP0404 TP0403 TP0402 TP0421 TP0419 TP8000_RF ZT0401 ZT0404 J4101 QPOET_RF LBPA_RF TDDPA_RF MLBPA_RF L8007_RF L8009_RF U SPD T_R F USPDT2_RF CL0401 BS0405 SUAT2_RF SUAT1_RF SGND_RF BS0403 U2402 M2600 R4401 U2404 J_SIM_RF MBHBPA_RF UATDI_RF LATDI_RF C4421 C4417 XW5616_RF XW2700 XW 2201 XW2404 XW3801 XW3333 XW2707 no_refdes+2 no_refdes+3 no_refdes+4 no_refdes+5 no_refdes+6 no_refdes+7 no_refdes+9 J3801 U3801 L3903L3902L3901 J2201 M2800 JLAT3_RF JLAT1_RF J4502 BS0406 FD0403 FD0402 FD 0408 FD0409 DZ4402 DZ4401 C 7730_RF L6707_RF R6706_RF L8008_RF R2001 C6704_RF DZ4404 DZ4403 FL3803 FL3910 C2443 C4106 C4109 C4105 C6716_RF C 8008_RF C6714_RF C6700_RF C4401 C4418 FL4112 FL3904 FL3915 FL3922 R4104 FL3919 FL4742 FL3801 FL3924 FL3806 FL3916 FL3804FL3802 FL4741 FL4405 FL4402 FL4403 FL4732 FL4404 FL4406 FL4731 FL4401 FL4120FL4116 FL4108 FL4101 FL4115 FL4119 FL4117 FL4118 FL4102 FL4407 FL4105 R2404 R3923 R4806 R4807 R3805 R4110 R4109 R4712 R4711 R2441 R3901 R3908 R3802 R2201 R4405 R4402 R4406 R4102 R4710 R4709 C2619 C4136 C4730 C4135 C2202 C3924C4507C3805 C3922 C3925 C3919 C4810 C4809 C3825 C3818 C3817 C3816 C2201 C3807 C3806 C3926 C4712 R4501 C4742 C4741 C3923 C0404 C4415 C4732 C0410 C4731 C4405 C4404 C4111 C4108 C4132C4128C4729 C4110 C4131 C4129 C2620 C4126 C4101 C4102 C4134 C3902 C2204 C3912 C3914 C3913 C3911 C3910 C3909 C3916 C4103 C3936 C3930 C3802 C3811 C3935 C3931 C3804 C3915 C0402 C0401 C4414 C4410 C4402 C0408 C4411 C4407C4403 C4406 C4104 C4127C4133 C4120 C4119 C4130 C3542 C3529 C3434 C2445 C2442 C3822 C2401 C2449 C2203 C3927 C3918 C3819 C3801 C3826 C3928 C0403 C4419 C2007 C0409 C4420 C4117 C4118 C1905 C6721_RF C 8005_RF C4122 C4121 C3803 C4107 C0405 C0411 C0406 C4413 C4408 C4409 C4412 C4116 C4422 C6720_RF C 8007_RF C3934 C3932 C2448 C2117 C2118 C3814 C3828 C3813 C3821 C3815 C2418 C4416 SH0403 PP2440 PP4501 PP3801 PP2403 PP2402 PP8000_RF PP2404 PP2401 PP3601 PP3602 PP2003 PP6919_RF PP6917_RF PP6918_RF PP6969_RF PP6979_RF PP6953_RF PP6973_RF PP6972_RF PP6921_RF PP6945_RF PP7601_RF PP7600_RF PP6942_RF PP6941_RF PP6920_RF PP6933_RF PP6905_RF PP6977_RF PP6974_RF PP6944_RF PP6943_RF PP6952_RF PP7000_RF PP6936_RF PP1702 PP1701 PP6940_RF PP6935_RF PP6939_RF PP6938_RF PP6980_RF no_refdes+1 U0700 L2301 NFCSW_RF TP0414 TP7505_RF TP0423 TP0413 TP7500_RF U3301 L1803 XW3202 BALUN_RF L1813 L1809 L1807 L1808 L1812 L1811 C7518_RF J4503 TUNFX_RF R3332 R3333 J4501 C5632_RF C5616_RF C5633_RF C5617_RF C5618_RF C5634_RF L5602_RF L5604_RF L5603_RF L5605_RF SWPMX_RF XW2001 XW1801 XW1802 XW1803 XW1403XW 1805 XW5614_RF XW5615_RF XW1402 XW1401 XW1902 XW1901 XW3203 XW1807 XW2002 XW 2005 XW 2004 XW2003 no_refdes+5 no_refdes+8 no_refdes+10 L7500_RF L7501_RF L5601_RF C1914 C1911 C1910 C1907 C3532 C3326 C1512 C3313 C3328 C3531 C3308 C3324 C3306 C3325 C3327 C1901 C1808 C1804 C1810 C1806 C5624_RF C5620_RF L3302 L1806 L1814 L1810 L1816 L1817 L1804 L1801 L1818 L1815 FD0407 R2002 R7508_RF R7509_RF R7520_RF DZ2906 DZ2905 DZ2907 FL2505 FL2901 FL2902 C7515_RF C7507_RF C7508_RF C3311 C7509_RF C7510_RF C7516_RF C7512_RF C7514_RF FL4815 FL2911 FL2910 FL6700_RF FL6703_RF FL2904 FL2909 FL2501 FL2504 FL2913 FL2908 FL2907 FL2906 R2905 FL2914 FL2903 R1306 R1305 FL6701_RF R4708 R2904 R2903 R4813 R4812 FL6702_RF R4707 R3301 R2008 R4815 R4808 R4809 R7512_RF R4604 R4603 R4706 R4811 R4810 R4705 R2915 R0901 R6900_RF R5911_RF C2513 C4708 C2924 C4803 C2520 C2910 C2905 C4804 C4707 C2906 C4813 C4812 C3312 C3333 C3332 C2503 C2514 C2904 C2926 C2902 C2911 C2933 C2921 C2908 C2934 C2935 C2903 C2931 C2932 C1867 C1871 C1869 C1811 C1872C1873 C0909 C0905 C0908 C0904 C1861 C1860 C3323 C3331 C2523 C2526 C2524 C2525 C2530 C2901 C2914 C2915 C7525_RF C3315 C0801 C0818 C0817 C0816 C0815 C2512 C0413 C2008 C5903_RF C2522 C2529 C2528 C6702_RF C6701_RF C6703_RF C6705_RF C3319 C2521 C3501 C3329 C2916 C2917 C2927 C2508 C2909 C2510 C2506 C1923 C1930 C1615 C3316 C5730_RF C0805 BB_RF U5801_RF C5614_RF C3318 SH0401 PP7608_RF PP7604_RF PP7603_RF PP5301 PP7501_RF PP1410PP0902 PP1411 PP6931_RF PP6971_RF PP6915_RF PP0802PP6916_RF PP0801 PP6970_RF PP6923_RF PP7502_RF PP6929_RF PP6906_RF PP6914_RF C4711 U2710 U3502 U3402 TP0409 TP0408 TP0412 TP0410 C3405 C2702 C2114 C3722 C3424 C2113 C4601 C3525 C3702C3724 C3718 C2611 C2612 C2609 C2610 C3710 C3407 C3404 C3403 C3539 C3538 C3524 C3432 C3929 C3713C3712C3714 C3901 C3530 C3707 C3715 C3716 C3823 C3537C3431 C1716 C1748 C1721 C1713 C1701 C1702 C1730 C1729 C1722 C1733 C1719C1704C1705C1707C1727 FD0400 FD0404 FD0410 FD0405 DZ6900_RF R7103_RF C6610_RF L6304_RF R2003 R2711 R6405_RF R6400_RF R7105_RF C6310_RF L6311_RF R7102_RF R7511_RF R6705_RF R6710_RF R6715_RF R6708_RF R6709_RF R6703_RF R6601_RF R6606_RF DZ6901_RF FL3903 FL3901 FL3902 C7013_RF C6415_RF C6417_RF C7010_RF C7014_RF C7125_RF R7101_RF C7124_RF C6405_RF C6404_RF C7118_RF C6403_RF C7122_RF C6410_RF C6402_RF C7009_RF C7112_RF C7121_RF C6728_RF C6713_RF C6726_RF C6711_RF C6727_RF C6602_RF C6614_RF C6601_RF C6611_RF C6613_RF C7731_RF C7011_RF C7012_RF R6301_RF C6338_RF C3535 C3428 C3703 C3903 FL4114 FL4730 FL4103 FL3920 FL3917 FL3913 FL3918 FL3811 FL3807 FL4121 FL4107 FL4729 FL4604 FL6603_RF FL6602_RF FL6401_RF FL6402_RF R7114_RF R6003_RF R7109_RF R3809 R6001_RF R6005_RF R6006_RF R7107_RF R6004_RF R6008_RF R7112_RF R7111_RF R6002_RF R7002_RF R7108_RF R7113_RFR6007_RF R7110_RF R6201_RF R2422 R7702_RF R7711_RF R1702 R1707 R2705 R2702 R4002 R2710 R2101 R2102 R2701 R3508 R2403 R0805 R0802 R3811 R3801 R2103 R3101 R1304 C4702 C4701 C3727C3726 C3921 C3920 C4710 C4709 C4608 C0420 C2617 C2104 C3938 C3717 C2102 C3939 C3917 C3812 C2703 C3526 C3427 C4008 C4007 C0418 C0417 C2613 C2614 C0407 C1715 C1703C1708 C1735 C1714 C3937 C3422 C3425 C6008_RF C6409_RF C4807 C2701 C6408_RF C6018_RF C6019_RF C6020_RF C7001_RF C3527 C4002 C6009_RF C6022_RF C6007_RF C6502_RF C6501_RFC6021_RF C7501_RF C2405 C6627_RF C6629_RF C2413 C6201_RF C1710 C2009 C6806_RF C6734_RF C0419 C1736 C1712 C6901_RF C1720 C1709 C1734 C5909_RF C5908_RF C5907_RF C7126_RFC7128_RF C2103C2112 C3709C3708 C3904 C3905 C7114_RF C7108_RF C6406_RF C6407_RF C7008_RF C6414_RF C7104_RF C7117_RF C7105_RF C6505_RF C6514_RF C6506_RF C6504_RF C6513_RF C6420_RF C6419_RFC7110_RF C6515_RF C6622_RF C6625_RF C6619_RF C6617_RF C0421 C2420 C0422 C0412 C6014_RF C7017_RF C7005_RF C6013_RF C6010_RF C6012_RF C6011_RF C6017_RF C6015_RF C6016_RF C7101_RF C3528 C5906_RF C4004 C4001 C3430 C1724 C1725 C2707C3534 C7007_RF C3536 C2115 C3940 C3933 C3824 C2700 C6804_RF C7006_RF C3426 C3429 C6006_RF C6024_RF C7529_RF C7530_RF C6023_RF C6801_RF C6803_RF C6805_RF C6802_RF C2414 C2408 C2505 C2705 C1726 PP4001 PP6978_RF U2700L2700 D2700 Q2701 Q2700 U1701 C2708 U2701 U4805 U4806 XCVR1_RF U2403 Q2102 GPIO_RF U4802 U4001 UPPDI_RF GFILT_RF C2110 C2106 C2108 SE2LDO_RF JUAT2_RF JUAT1_RF MHBLN_RF MLBLN_RF GLNA_RF PPLXR_RF LBLN_RF W5BPF_RF MCEW_RF DZ6903_RF DZ6905_RF DZ6902_RF DZ6904_RF UATCP_RF LATCP_RF MCNS_RF C2111 C2109 C2101 U2101 Q2101 U3703 U3702 L3703 U3701 D3701D3702 SE2_RF XCVR0_RF SWDSM_RF GSMPA_RF RXFIL_RF GSMRX_RF C6001_RF L3704 L6710_RF L6321_RF L6308_RF L6307_RF L6313_RF L6312_RF R6404_RF R6402_RF R7106_RF R7104_RF R6401_RF C6307_RF L6328_RF L7709_RF L6301_RF L6309_RF L6306_RF C6301_RF L6320_RF C6305_RF L6305_RF L6322_RF C7111_RF C6311_RF L6310_RF R6501_RF L6318_RF L6319_RF L6324_RF L6323_RF L6325_RF C6349_RF FL3906 FL3911 FL3908 FL3912 FL3909 FL7001_RF FL4106 L4022 L4021 L6700_RF L6200_RF L6101_RF L6104_RF L6102_RF L6103_RF L6110_RF L6109_RF L6111_RF L6201_RF L7122_RF C6729_RF C6508_RF C6511_RF C6332_RF C6507_RFC6510_RF C6509_RF C6512_RF C6302_RF C7120_RF C6002_RF C6003_RF C2105 C6416_RF C7123_RF C6411_RF C7119_RF C6309_RF C6308_RF C6306_RF C6348_RF C6350_RF R6605_RF R6502_RF R6503_RF C4005 C7106_RF C7004_RF C4003 C7103_RF C7113_RF C1751 C1753 C1743 C1746 C1738 C1750 C1749 C1747C1745 C1737 C1741 C1739 C1740 C1754 C1752 C1744 C1742 C7523_RF C7524_RF C7528_RF C7201_RF R2104 R2703 R2704 R2105 R4803 R4804 R4805 R3808 R3807 R3701 R3915 R4001 R7131_RF R7130_RF R7132_RF R1704 R1703 R6904_RFR1701 C2710 C6351_RF C6101_RF C6104_RF C6317_RF C6342_RF C6316_RF C6314_RF C6315_RF C6323_RF C6325_RF C6335_RF C6346_RF C6343_RF C6318_RF C6319_RF C6320_RF C6106_RF C6107_RF C6108_RF C6340_RF C6103_RF C6102_RF C6329_RF C6352_RF C6341_RF C6328_RF C6105_RF C6807_RF C6336_RF C6337_RF C6324_RF C6344_RF C6345_RF C6334_RF L7123_RF C6112_RF C6004_RF C6005_RF C2706 C6418_RF C6735_RF C6400_RF C6401_RF C7133_RF C7127_RFC7129_RF C6503_RF C6620_RF C6113_RF C6114_RF C 6116_RF C6115_RF C1718 C1711 C1706 C7016_RF C7015_RF C6333_RF C6204_RF C6205_RF C6203_RF C6117_RF C6118_RF C6111_RF C7531_RF C6109_RF C6110_RF C7131_RF C7130_RF C7132_RF C 7710_RF C7729_RF C7711_RF C7709_RF C6732_RF C2422 C2421 C6731_RF C6733_RF C6730_RF C2423 R6711_RF C1723 C1732 C1728 C1756 C1731 C1717 C3711 C4006 SWLATCP_RF C3719 C3706 C3721 C3704 C3705 C3720C3725 MHBDSM_RF LBDSM_RF SH0402 C7504_RF C0809 C0810 C0807 C0808 XW1804 XW1806 C1513 C1602 C1853 C1458 C1528 C1403 C1459 C1506 C1857 C1444 C1436 C1501C7602_RF C2309 C3208 C3211 C1850C1846 C2302 C2308 C7517_RF C1408 C1434 C2307 C7511_RF C1863 C1401 C1414 C1862 C1865 C1839 C1834 C1843 C1832 C1826 C1838 C1842 C1844C1807 C1837 C1819 C1845 C1831 C1818 C1825 C1829 C1840 C1822 C1864 C1801 C1803 C1813 C1814 C1866 C1827 C1833 C1821 C1828 C1820 C1915 C1805 C2304 C1912 C2303 C1809 C1823 C1830 C1835 C1874 C1836 C1802 C1841 C1816 C5621_RF C5701_RF C5622_RF C5625_RF C5703_RF C5702_RF C5623_RF FD0406 R2004 R1901 R5511_RF FL2506 FL2502 FL2500 FL2503 R7703_RF L7700_RF R7700_RF R4817 R4816 R0804 R2009 R7502_RF R7510_RF R7701_RF R1602 R1601 R1116 R0702 R1101 R0803 R5909_RF R5910_RF R5601_RF R1118 R1210 R1113 R1114 R2012 R7600_RF R3602 R3605 R2006 R3304 R0801 R0807 R0806 R3202 R2005 R2700 R2020 R1303 R0907 R0906 R1103 R3604 R3607 R3601 R7599_RF R0504 R0508 R0501 R0503 R0505 R0509 R3201 R4714 R4713 R5807_RF R2000 R6921_RF R6922_RF R5907_RF R5908_RF R4716 R4715 R4801 R4802 R1503 R1501 R1505 R1504 R1506 R1502 R5802_RF R5801_RF R4703 R4704 R0900 R5806_RF R4702 R4701 R5912_RF R5502_RF C0414 C4817 C4816 C4704 C4703 C2501 C2504 C2518 C2511 C2515 C4143 C1870 C2618 C2306 C3113 C3112 C0910 C1868 C1909 C2001 C2013 C0700 C0903 C0902 C7503_RF C1606C0701 C1601 C1609C1613 C0803 C1004 C0813 C0814 C0811 C0812 C3215 C3213 C3214 C3220 C3212 C5750_RF C3607 C0704 C3602 C3606 C0804 C0802 C3601 C5801_RF C5501_RF C7522_RF C2010 C2011 C1006 C7521_RF C7603_RF C3106 C3107 C5635_RF C1011 C1010 C0907 C0906 C0415 C0416 C7600_RF C7607_RF C1005 C7601_RF C7606_RF C1002 C2531 C2519 C2507 C2527 C1507 C1921 C1519 C1875 C1515 C1614C0900C1449 C1529 C1608 C7526_RFC7506_RF C1522 C0901 C7527_RF C1448 C1927 C1913 C1504 C1908 C1877 C1852 C0705 C0806 C1607 C1922 C1604 C1918 C1904 C1013C1518 C1851 C1610 C1611 C1514C1612 C1848 C1859 C1849C1847 C1001C1605 C1511 C1466 C5746_RF C1919 C2704 C5748_RF C5752_RF C5751_RF C5747_RF C5749_RF C5742_RF C5739_RF C3205 C1855 C1856 C5755_RF C5736_RF C1603 C1926 C1916 C3209 C5743_RF C5740_RF C5732_RF C5729_RF C5754_RF C5737_RF C5735_RF C5753_RF C3603 C1858 C5733_RF C1854 C5731_RF C5744_RF C5704_RF C5734_RF C5745_RF C3604C1876 C5738_RF C6900_RF PP7605_RF PP7615_RF PP7614_RF PP7613_RF PP7616_RF PP7612_RF PP7606_RF PP7607_RF PP7503_RF PP7504_RF PP7509_RF PP1402PP1401 PP1408 PP1403 PP7610_RF PP7624_RF PP6981_RF PP7500_RFPP7505_RF PP7617_RFPP7506_RF PP7507_RF PP7508_RF PP0701 PP7620_RF PP7622_RF PP7623_RF PP7621_RF PP7611_RF PP1409 PP2002 PP7619_RFPP7618_RF PP7609_RF PP6913_RF PP5304 PP2001 PP6926_RF PP6911_RF PP6925_RF PP6924_RF PP6909_RF PP6930_RF PP6900_RF PP6908_RF PP5303 PP6904_RF PP6903_RF PP6907_RF PP6912_RF RFBUF_RF C3605 U3602 L1802 U2301 U3603 WLAN_RF U2501 W2BPF_RF W25DI_RF L1805 NFC_RF U1801 Y2001 NFBST_RF C1435 C1439 L7600_RF C1405 C1412 C1422 C1430 C1402 C1427 C1502 C1465 C1409 C1452 C1454 L7502_RF C1433 C1417 C1460 C1461 C1411 C1407 C1503 C1437 C1416 C1404 C7604_RF C1421 C1432 C1426 C1440 C1413 C1406 C1442 C1456 C1419 C1424 C1457C1425 C1429 C1418 C1423 C1431 C1438 C1415 C1410 C1428 C1527C1420 U3601 C5627_RF C5604_RF C2301 C3203 C3201 C3202 C3204 C5608_RF Y0700 U1101 U3101 EPROM_RF R2010 R2011 C7702_RF L7701_RF L7702_RF L7703_RF R7704_RF C2002 C2006 C5804_RF C5629_RF C2509 C1101 C1925 C0800 C1933 C3217 C3221 C3222 C3223 C3224 C3225 C1935 C7502_RF C7505_RF C7500_RF C7520_RF C5605_RF C5626_RF C5628_RF C5611_RF C5607_RF C5613_RF C5602_RF C5603_RF C5609_RF C5610_RF C5612_RF C5901_RF C5726_RF C5720_RF C5711_RF C5715_RF C5719_RF C5728_RF C5721_RF C5708_RF C5714_RF C5707_RF C5716_RF C5724_RF C5712_RF C5710_RF C5705_RF C5727_RF C5717_RF C5709_RF C5713_RFC5725_RF C5706_RF C5722_RF C5723_RF C5718_RF FL1501 FL0700 R2301 R0701 R3603 R0413 R0800 R2015 R2007 R7506_RF R0700 R1001 R5906_RF R5206 R5503_RF R3104 R3103 R3611 R5803_RF R5505_RF R5504_RF R5501_RF C1902 C5636_RF C2502 C2004 C2003 C5502_RF C5905_RF C7703_RF C7706_RF C7705_RF C7700_RF C7704_RF C7707_RF C7701_RF C1509 C1523 C1510 C1508 C1932 C7708_RF C0702 C0703 C5902_RF C5741_RF C5904_RF C5601_RF BBPMU_RF Y5501_RF C5630_RF C5631_RF C5615_RF SH0400 Q4001 R2706 J4504 XW4501 PP5302 D10 PCB: 820-00188-08 VIETMOBILE.VN
  • 2. D10 MLB - DVT Schematic & PCB Callouts <rdar://problem/16684269> MCO 056-01342 System Block Diagram: BRD 820-00188 SCH 051-00419 SOC:MIPI AND ISP 48 SMALL FORM FACTOR SPECIFIC <SYNC_DATE43> LAST_MODIFICATION=Tue Jun 14 15:20:28 2016 62 <CSA_PAGE60> WIFI FRONT-END [77] <SYNC_MASTER1> SOC:LPDP <SYNC_MASTER48> <SYNC_MASTER47> <SYNC_MASTER51> <SYNC_MASTER62> <SYNC_MASTER61> <SYNC_DATE59> <SYNC_DATE58> SOC:PCIE <CSA_PAGE7> page1 [1] <CSA_PAGE1> 1 <CSA_PAGE5> page1 <SYNC_MASTER59> I2C MAP AOP <SYNC_MASTER60> <SYNC_MASTER18> <SYNC_DATE15> <CSA_PAGE57> <CSA_PAGE53> spare SYSTEM:BOARDID SYSTEM:MECHANICAL, TESTPOINTS 7 <SYNC_MASTER12> <SYNC_MASTER13> PMU: CONTROL AND CLOCKS PMU: SWITCHERS AND LDOS <SYNC_MASTER73> <SYNC_MASTER74> TRANSCEIVER0/1: PRX PORTS TRANSCEIVER0/1: POWER 65 <SYNC_MASTER78> 32 <SYNC_MASTER65> <SYNC_DATE55> SOC:POWER (1/3) <CSA_PAGE13> B2B FILTERS: UTAH B2B:DOCK FLEX ARC:DRIVER <SYNC_DATE47> <SYNC_MASTER4> <CSA_PAGE72> <SYNC_MASTER28> <SYNC_MASTER26> <CSA_PAGE87> <SYNC_DATE33> <SYNC_MASTER22> <CSA_PAGE3> <CSA_PAGE90> <CSA_PAGE86> <SYNC_MASTER43> <SYNC_MASTER50><SYNC_MASTER5> <SYNC_MASTER7> SYSTEM POWER:PMU (2/3) <CSA_PAGE64> <SYNC_DATE63> <SYNC_DATE65> <SYNC_DATE67> <SYNC_MASTER75> PMU: ET MODULATOR B2B:FOREHEAD <SYNC_MASTER38> B2B: SMALL FF SPECIFIC AUDIO:CALTRA CODEC (1/2) Accessory: Buck Circuit 8 <CSA_PAGE9> 59 24 21 SYSTEM POWER:PMU (1/3) BASEBAND GPIOS <SYNC_MASTER25> <SYNC_DATE9> SYSTEM POWER:PMU (3/3) AUDIO:CALTRA CODEC (2/2) 70 SOC:JTAG,USB,XTAL <CSA_PAGE6> B2B:ORB & MESA B2B FILTERS: DISPLAY & TOUCH 33 <CSA_PAGE25> <SYNC_MASTER37> 2 <SYNC_MASTER15> <SYNC_MASTER14> <SYNC_DATE8> 50 SYSTEM POWER:BATTERY CONN <SYNC_MASTER17> SOC:SERIAL spare <SYNC_DATE14> <SYNC_DATE37> <CSA_PAGE88> NAND 56 SOC:AOP 14 BOM_OMIT_TABLE 64 SOC:POWER (2/3) SOC:POWER (3/3) <CSA_PAGE24> <SYNC_MASTER19> AUDIO:SPEAKER AMP 2 <SYNC_MASTER86> <SYNC_MASTER80> <SYNC_MASTER63> <SYNC_MASTER76> spare <SYNC_MASTER42> UPPER ANTENNA FEEDS <SYNC_MASTER70> <SYNC_DATE64> <SYNC_MASTER66> <SYNC_MASTER69> <CSA_PAGE59> <SYNC_DATE66> <SYNC_MASTER29> <SYNC_DATE76> 75 DIVERSITY RECEIVE LNA'S <SYNC_DATE1> spare <SYNC_MASTER8> <SYNC_MASTER6> CELL,WIFI,NFC MLB UNIQUE <SYNC_MASTER20> <SYNC_MASTER21> <SYNC_MASTER24> <SYNC_MASTER32> <SYNC_MASTER11> <SYNC_MASTER10> BOM LIST 6 <SYNC_MASTER36> <SYNC_MASTER39> <SYNC_MASTER40> <SYNC_MASTER9> BASEBAND: POWER2 page1 26 39 <SYNC_DATE57> <SYNC_MASTER35> 44 <SYNC_MASTER31> 13 47 67 <CSA_PAGE68> ARC:MAGGIE NFC <SYNC_DATE74> <SYNC_DATE11> <SYNC_MASTER57> 66 <SYNC_MASTER58> <SYNC_DATE61> <SYNC_DATE46> <SYNC_DATE50> <SYNC_DATE48> <SYNC_DATE49> <SYNC_DATE53> <SYNC_DATE51> <SYNC_DATE52> <SYNC_DATE56> <SYNC_DATE62> <SYNC_DATE60> <SYNC_DATE69> <SYNC_DATE68> <SYNC_DATE75> <SYNC_DATE77> <SYNC_DATE73> <SYNC_DATE72> <SYNC_DATE71> <SYNC_DATE81> <SYNC_DATE80> <SYNC_DATE79> <SYNC_DATE78> <SYNC_DATE82> <SYNC_DATE83> <SYNC_DATE84> <SYNC_DATE89> <SYNC_DATE90> <SYNC_DATE88> <SYNC_DATE87> <SYNC_DATE86> <SYNC_DATE85> <SYNC_MASTER49> <SYNC_MASTER52> <SYNC_MASTER53> <SYNC_MASTER71> <SYNC_MASTER64> <SYNC_MASTER90> <SYNC_MASTER89> <SYNC_MASTER88> <SYNC_MASTER87> <SYNC_MASTER85> <SYNC_MASTER84> <SYNC_MASTER83> <SYNC_MASTER82> <SYNC_MASTER81> <SYNC_MASTER79> <CSA_PAGE48> <CSA_PAGE49> <CSA_PAGE50> <CSA_PAGE46> <CSA_PAGE47> <CSA_PAGE55> <CSA_PAGE51> <CSA_PAGE52> <CSA_PAGE58> <CSA_PAGE56> <CSA_PAGE54> <CSA_PAGE62> <CSA_PAGE63> <CSA_PAGE61> <SYNC_DATE5> <SYNC_DATE3> <SYNC_DATE2> <SYNC_DATE4> <SYNC_DATE6> <SYNC_DATE13> <SYNC_DATE12> <SYNC_DATE10> <SYNC_DATE17> <SYNC_DATE16> <SYNC_DATE18> <SYNC_DATE7> <SYNC_DATE19> <CSA_PAGE65> <CSA_PAGE66> <CSA_PAGE67> <CSA_PAGE69> <CSA_PAGE70> <CSA_PAGE71> <CSA_PAGE73> <CSA_PAGE74> <CSA_PAGE75> <CSA_PAGE76> <CSA_PAGE77> <CSA_PAGE82> <CSA_PAGE81> <CSA_PAGE80> <CSA_PAGE79> <CSA_PAGE78> <CSA_PAGE83> <CSA_PAGE84> <CSA_PAGE85> <CSA_PAGE89> <SYNC_DATE20> <SYNC_DATE26> <SYNC_DATE28> <SYNC_DATE31> <SYNC_DATE32> <SYNC_DATE30> <SYNC_DATE29> <SYNC_DATE23> <SYNC_DATE40> <SYNC_DATE39> <SYNC_DATE38> <SYNC_DATE35> <SYNC_DATE36> <SYNC_DATE42> <SYNC_DATE41> <SYNC_DATE44> <CSA_PAGE4> <SYNC_MASTER16> <SYNC_MASTER27> <SYNC_MASTER30> <SYNC_MASTER41> <CSA_PAGE8> <CSA_PAGE10> <CSA_PAGE11> <CSA_PAGE12> <CSA_PAGE14> <CSA_PAGE15> <CSA_PAGE17> <CSA_PAGE18> <CSA_PAGE19> <CSA_PAGE20> <CSA_PAGE33> <CSA_PAGE32> <CSA_PAGE31> <CSA_PAGE30> <CSA_PAGE28> <CSA_PAGE27> <CSA_PAGE26> <CSA_PAGE23> <CSA_PAGE22> <CSA_PAGE21> <CSA_PAGE34> <CSA_PAGE45> <CSA_PAGE44> <CSA_PAGE43> <CSA_PAGE42> <CSA_PAGE41> <CSA_PAGE40> <CSA_PAGE39> <CSA_PAGE38> <CSA_PAGE36> <CSA_PAGE35> 79 78 77 76 72 69 63 61 60 58 57 53 52 51 49 46 45 43 42 41 38 37 35 31 29 28 27 22 20 19 17 16 11 10 9 4 3 TDD TRANSMIT LOWER ANTENNA & COUPLERS RECEIVE MATCHING I2C TABLE I2C MAP: AP, TOUCH, HOMER, I2C5 spare <SYNC_MASTER77> DIVERSITY RECEIVE ASM'S <SYNC_DATE24> 40 <SYNC_MASTER33> <SYNC_MASTER45> 74 73 54 55 5 81 ICEFALL, SIM, DEBUG_CONN FDD TRANSMIT 34 25 18 12 TRISTAR 2 <CSA_PAGE29> 30 MLB SPECIFIC: BOM TABLE <CSA_PAGE2> <SYNC_DATE45> AUDIO:SPEAKER AMP 1 TRINITY: FF SPECIFIC SOC:GPIO & UART TRANSCEIVER0/1: TX PORTS 71 SYSTEM POWER:CHARGER 15 <SYNC_MASTER2>SYSTEM:BOM TABLES <CSA_PAGE16> DISPLAY & MESA:POWER BASEBAND: CONTROL 68 <SYNC_DATE25> <CSA_PAGE37> spare <SYNC_MASTER54> <SYNC_MASTER67> CAMERA:STROBE DRIVER 36 <SYNC_MASTER34> <SYNC_MASTER68> <SYNC_MASTER72> TEST POINTS & BOOT CONFIG 80 <SYNC_DATE34> <SYNC_MASTER23> TABLE OF CONTENTS UAT MATCH AND TUNER CONNECTOR [2] <SYNC_DATE22> <SYNC_DATE21> SENSORS 23 <SYNC_MASTER56> <SYNC_MASTER55> <SYNC_DATE54> <SYNC_DATE70> PERENNIAL <SYNC_MASTER3> <SYNC_MASTER44>B2B FILTERS: RIGHT BUTTON FLEX <SYNC_DATE27> SYSTEM POWER:BOOST WIFI_MLB SCHEMATIC <SYNC_MASTER46> 2016-06-1400064008778 ENGINEERING RELEASED TABLE OF CONTENTS TABLE OF CONTENTS CRITICALPCB1820-00188 PCBF,MLB,D10 ? CRITICAL ?SCH1 SCH,MLB,D10051-00419 CONTENTSPAGE <CSA> SYNC DATESYNC<CSA> CONTENTSPAGEDATE ECNREV DESCRIPTION OF REVISION 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. APPD DATE 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL TABLE_5_ITEM 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 3. NAND BOM Options Carbon Alternates Magnesium Alternates DDR PLL Alternate Mamba LDO Alternates I2C5 Alternate Global R/C Alternates ACC BUCK CIRCUIT Alternates Global Ferrite Alternates For Chestnut inductor; so it doesn't interfere with PMU inducotr Buck 7 alts reverted 11/13 UT LDO Alternates Except BUCK5 LX (BUCK5 LX is Taiyo only) #22686038:See Radar Global Varistor Alternates Active Diode Alternate Power Inductor Alternates updated 11/12 updated 11/12 152S00120 152S00077 ALTERNATE For Chestnut inductor onlyALL ALTERNATE152S00398 152S00204 ALL IND,PWR,0.22UH,20%,6.7a,23MOHM,2012 ALTERNATE152S00297 ALL152S00365 CYNTEC 2012 1UH 152S1843 CYNTEC 2012 1UHALTERNATE152S00297 ALL IND,MULT,1UH,1.2A,0.320 OHM,0603152S00366152S00402 ALLALTERNATE IND,PWR,SHLD,15 UH,0.72A,0.900 OHM,3225ALTERNATE152S1936152S00123 ALL 152S00121 152S00081 IND,PWR,SHLD,0.47 UH,3.8A,0.048 OHM,2012ALTERNATE ALL ALTERNATE IND,PWR,SHLD,1.0 UH,2.25A,0.150 OHM,2016152S00077 ALL152S00397 ALTERNATE ALL IND,PWR,SHLD,1.2 UH,3.0A,0.080 OHM,2016152S00118 152S00075 IC,LOAD SWITCH,WLCSP4353S01039 ALTERNATE U2710353S01007 PFET,12V,CSP4376S00164 ALTERNATE Q2700,Q2701376S00166 L2700 IND,MLD,0.47UH,2.5A,80Mohm,1608152S00557152S00558 ALTERNATE ALTERNATE371S00087 D2700 DIODE,SHOTTKY,30V,200MA,0201371S00064DIODES INC. ACT DIODEALTERNATE376S00047376S00106 Q2101 NAND,H,128GB,16nm,TLC335S00182 1 U1701 CRITICAL NAND_128G FERR, 240OHM, 0.38OHM DCR, 0201ALTERNATE155S0581 ALL155S00067 FLTR, 65 OHMS, 0605155S00012 ALLALTERNATE155S00168 FERR BD, 150OHM, TYALLALTERNATE155S00200 155S0610 FERR BD, 0.47UH, TY152S00489 ALLALTERNATE152S00456 ALLALTERNATE155S00194 FERR BD, 150OHM, TDK155S0610 377S0140 ALL377S0168 ALTERNATE VARISTOR, 6.8V, 100PF, 01005 138S0648 CAP,X5R,4.7UF,6.3V,0.65MM,0402,TAIYO138S0652 ALTERNATE ALL 138S00003 ALTERNATE138S00005 ALL CAP,X5R,15UF,6.3V,0.65MM,0402,TAIYO 132S0436132S0400 ALTERNATE ALL CAP,X5R,0.22UF,6.3V,01005,TDK 152S00117 152S00074 IND,PWR,SHLD,1.0 UH,3.0A,0.060 OHM,2016ALTERNATE L1806,L1810,L1814,L1816,L1817 ALTERNATE138S00003138S00048 CAP,X5R,15UF,6.3V,0.65MM,0402,KYOCERAALL ALTERNATE CAP,CER,3-TERM,7.5UF,20%,4V,0402,TAIYO/TDK138S0986 ALL138S00024 FERR, 240OHM, 0.38OHM DCR, 0201155S0581 ALTERNATE ALL155S00067 ALTERNATE FL1501 FERR BD,100OHM,25%,100MA,2OHM,01005155S00068155S00095 U1701335S00182 ALTERNATE335S00179 SD,15nm,TLC,128GB 132S0436 132S0400 CAP,CER,X5R,0.22UF,20%,6.3V,20%ALLALTERNATE CAP,CER,1UF,20%,10V,X5R,0201,KYOCERAALL138S0945 ALTERNATE138S0739 138S0739 ALTERNATE CAP,CER,1UF,20%,10V,X5R,0201,MURATAALL138S0706 138S0702 ALTERNATE ALL CAP, X5R, 4.3UF, 4V, 0610138S0657 118S0764 ALTERNATE ALL RES, 3.92K, 0.1%, 0201118S0717 138S00006 CAP, 3-TERM, 4.3UF, 4V, 0402ALTERNATE138S0835 ALL I2C5 ALTERNATEALTERNATE335S00234 335S00233 U1101 U3801353S00932 353S00576 ALTERNATE ST, LDO REG, 2.75V 335S00180 T,15nm,TLC,128GBALTERNATE U1701335S00182 335S00182335S00195 U1701ALTERNATE SS,1Ynm,TLC,128GB 335S00169 ALTERNATE U1701 S,16nm,MLC,32GB335S00209 U1701ALTERNATE335S00183 SS,3Dv3,TLC,256GB335S00190 CAP,X5R,15UF,20%,,6.3V,0.65MM,HRZTL,0402 C1748,C1713,C1716,C1721,C17335 NAND_128G138S00003 CRITICAL 138S0867 5 CAP,X5R,10UF,20%,6.3V,0.65MM,HRZTL,0402 C1748,C1713,C1716,C1721,C1733 CRITICAL NAND_32G NAND,H,256GB,3Dv3,TLC335S00156 1 U1701 CRITICAL NAND_256G NAND,H,32GB,16nm,MLC1 CRITICALU1701335S00169 NAND_32G ST, LDO REG, 2.925V, CSP 0.65x0.65ALTERNATE U2501353S00015353S00889 Updated version of CarbonALTERNATE338S00087 338S00226 U2401,U2404 ALTERNATE Larger Wafer (-29 flow) Magnesium338S00203338S00173 U2402 335S00183 U1701 SD,3Dv2,TLC,256GBALTERNATE335S00148 335S00169335S00201 U1701 T,15nm,MLC,32GBALTERNATE C1748,C1713,C1716,C1721,C17335 CAP,X5R,15UF,20%,,6.3V,0.65MM,HRZTL,0402138S00003 CRITICAL NAND_256G TABLE_5_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_5_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 4. D10x Specific BOM Callouts Cap 2.2UF Alternates CAYMAN DDR Alternates #24629229 #25634778: Exclude Kyocera as 2.2UF alt at only C2507/C2531 REFDES (other refdes no impact) #24681501 D10 EEEE CALLOUTS R4808,R4809 UTAH_CRES,MF,1K OHM, 5%, 1/32W, 01005117S0156 2 CRITICAL EEEE_SUPREMECRITICALEEEE_GXD6825-6838 1 EEEE CODE FOR 639-01755 EEEE_BEST1 EEEE CODE FOR 639-01754 EEEE_GXD5 CRITICAL825-6838 CRITICAL EEEE_SUPREME_ROWEEEE_H6TGEEEE CODE FOR 639-02373825-6838 TAIYO,IND,PWR,SHLD,1UH,3.6A,0.060OHM,20161152S00117 CRITICALL1803 EEEE_EXTREME_ROWEEEE CODE FOR 639-02374 EEEE_H6TH825-6838 CRITICAL1 EEEE_BEST_ROW1 CRITICALEEEE_H6TFEEEE CODE FOR 639-02372825-6838 825-6838 EEEE_EXTREMEEEEE_GXD7 CRITICAL1 EEEE CODE FOR 639-01756 ALTERNATE ALL DDR-S, 2G, B1 ALTERNATE ALL339S00253 DDR-H, 2G, B1 B5LX_TAIYO 339S00253 1 339S00255 339S00254 (C2507,C2531)138S00032 CAP,CER,X5R,2,2UF,20%6.3V,20%, KYOCERAALTERNATE138S00049 CAP,CER,X5R,2,2UF,20%,6.3V,20%,MURATAALLALTERNATE138S00032138S0831 TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 5. Current as of D10 MCO 056-01342-78 Back Shields DFU FORCE DFU O TP IS TO HELP WITH USB SI IN THE FACTORY FIXTURE. #25244799 MOJAVE ANALOG MUX A OUTPUT 100k to 200k ANALOG MUX B OUTPUT FOR DIAGS E75 Contained in radio_mlb pages Front Shields O O TOP SIDE FIDUCIALS LCM POWER GROUND VBUS LCM BACKLIGHT SINK2 LCM BACKLIGHT SINK1 LCM BACKLIGHT SOURCE AMUX TESTPOINTS VBATT ACCESSORY ID AND POWER Note: Fiducial used as test pointVDD_MAIN POWER GND TP 1TP0408 1 FD0408 1 FD0400 1TP0419 1 ZT0404 1 ZT0401 2 1 R0413 1TP0413 1TP0423 1TP0424 1TP0410 1TP0409 1TP0411 1TP0400 1TP0401 1TP0412 1TP0416 1TP0407 1TP0406 1TP0405 1TP0404 1TP0403 1TP0402 1TP0414 1TP0422 1TP0415 1TP0421 1TP0420 1 FD0407 2 1 C0413 2 1 C0414 2 1 C0415 2 1 C0416 2 1 C0418 2 1 C0419 2 1 C0420 2 1 C0421 2 1 C0422 2 1 C0417 2 1 C0408 2 1 C0409 2 1 C0410 2 1 C0411 2 1 C0412 2 1 C0407 2 1 C0402 2 1 C0406 2 1 C0405 2 1 C0404 2 1 C0403 2 1 C0401 1 BS0406 1 SH0403 1 SH0401 1 SH0400 1 SH0402 1CL0401 1 BS0405 1 BS0403 1 BS0402 1 FD0410 1 FD0409 1 FD0406 1 FD0405 1 FD0404 1 FD0403 1 FD0402 CHASSIS_GND_BS403 PP_LCM_BL_ANODE_CONN PP_LCM_BL_CAT2_CONN 90_TRISTAR_DP2_CONN_P CHASSIS_GND_BS402 PMU_AMUX_BY PP16V0_MESA CHASSIS_GND_BS402 90_TRISTAR_DP1_CONN_N PP_LCM_BL_CAT1_CONN PP_TRISTAR_ACC2 PP5V0_USB PP_BATT_VCC PP_VDD_MAIN PMU_AMUX_AY TRISTAR_CON_DETECT_L MESA_TO_BOOST_EN CHASSIS_GND_BS401 PP_TRISTAR_ACC1 90_TRISTAR_DP2_CONN_N 90_TRISTAR_DP1_CONN_P PMU_TO_AP_FORCE_DFU NORTH_SCREW_EXPOSED CHASSIS_GND_BS403 STDOFF-2.9OD1.9ID-0.85H-SM SM SHLD-EMI-LOWER-FRT-D10 SM SHLD-EMI-UPPER-FRT-D10 SM SHLD-EMI-UPPER-BK-D10 SM SHLD-EMI-LOWER-BK-D10 SM-SP CLIP-MLB-COAX-RETENTION-D10 STDOFF-2.56OD1.4ID.99H-SM STDOFF-2.56OD1.4ID.99H-SMSTDOFF-2.56OD1.4ID-1.10H-SM FID 0P5SM1P0SQ-NSP ROOM=ASSEMBLY ROOM=ASSEMBLY FID 0P5SM1P0SQ-NSP 0P5SQ-SMP3SQ-NSP FID ROOM=ASSEMBLY FID 0P5SM1P0SQ-NSP ROOM=ASSEMBLY FID 0P5SQ-SMP3SQ-NSP ROOM=ASSEMBLY FID ROOM=ASSEMBLY 0P5SQ-SMP3SQ-NSP 0P5SQ-SMP3SQ-NSP ROOM=ASSEMBLY FID ROOM=TEST TP-P55 ROOM=TEST FID 0P5SM1P0SQ-NSP FID ROOM=TEST 0P5SQ-SMP3SQ-NSP TP-P55 ROOM=TEST 2.70R1.80-NSP 2.70R1.80-NSP 1% 1/32W 200K MF 01005 ROOM=PMU TP-P55 ROOM=TEST TP-P55 ROOM=TEST TP-P55 ROOM=TEST ROOM=TEST TP-P55 ROOM=TEST TP-P55 TP-P55 ROOM=TEST TP-P55 ROOM=TEST ROOM=TEST TP-P55 TP-P55 ROOM=TEST TP-P55 ROOM=TEST ROOM=TEST TP-P55 TP-P55 ROOM=TEST ROOM=TEST TP-P55 ROOM=TEST TP-P55 ROOM=TEST TP-P55 TP-P55 ROOM=TEST TP-P55 ROOM=TEST ROOM=TEST TP-P55 TP-P55 ROOM=TEST ROOM=TEST TP-P55 ROOM=TEST TP-P55 ROOM=TEST FID 0P5SM1P0SQ-NSP 5% 01005 100PF 16V NP0-C0G 25V 01005 5% 56PF NP0-C0G-CERM 16V 2% CERM 01005 18PF 4PF 16V 01005 NP0-C0G +/-0.1PF C0G-CERM 10V 5% 220PF 01005 100PF 16V NP0-C0G 5% 01005 25V 5% 56PF NP0-C0G-CERM 01005 2% 18PF CERM 01005 16V NP0-C0G 16V 4PF +/-0.1PF 01005 220PF C0G-CERM 5% 10V 01005 220PF 01005 5% C0G-CERM 10V 5% 100PF 16V NP0-C0G 01005 NP0-C0G-CERM 01005 25V 5% 56PF CERM 2% 18PF 01005 16V 4PF 16V +/-0.1PF 01005 NP0-C0G 10V 01005 5% 220PF C0G-CERM 01005 10V 5% C0G-CERM 220PF NP0-C0G 16V +/-0.1PF 01005 4PF CERM 01005 16V 18PF 2% 01005 25V 5% 56PF NP0-C0G-CERM 100PF 5% NP0-C0G 16V 01005 C0G-CERM 01005 5% 10V 220PF 4 45 39 45 39 41 40 4 20 38 37 4 41 40 45 39 41 40 41 40 21 22 21 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 20 41 40 38 37 44 41 40 41 40 41 40 20 12 4 A A A A A A A A A A A A A A A A A A A A A A A 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 6. 01101 D101 DEV SELECTED --> 1101 PROTO2 1100 PROTO2v5 1011 EVT1 1010 EVT2 xxxx SPARE 1000 CARRIER xxxx SPARE SELECTED --> 01000 D10 MLB 01110 D111 MLB 01111 D111 DEV 01100 D101 MLB 01011 D11 DEV 01010 D11 MLB 01001 D10 DEV 0=EUREKA, 1=KAROO 0=MLB, 1=DEV 0=FORM FACTOR A, 1=FORM FACTOR B FLOAT=LOW, PULLUP=HIGH 000 SPI0 001 SPI0 TEST MODE 010 NVME0_X2 BOOT_CONFIG[2:0] FLOAT=LOW, PULLUP=HIGH xxxx SPARE 0000 PVT 0010 DVT 1110 PROTO1 1111 Pre-Proto w/D520 (non enclosure) FLOAT=LOW, PULLUP=HIGH BOARD_REV[3:0] 0=FORM FACTOR A, 1=FORM FACTOR B BOOT_CONFIG1=No connect BOOT_CONFIG0=No connect SELECTED --> 111 FAST SPI0 TEST BOARD_ID[4:0] 110 SLOW SPI0 TEST 100 NVME0 X1 101 NVME0 X1 TEST 011 NVME0 X2 TEST BOARD_ID0=No connect 0=EUREKA, 1=KAROO BOARD_ID4=No connect BOARD ID BOOT CONFIG BOOTSTRAPPING:BOARD REV PP1V811 PP1V812 21R0509 21R0505 21R0508 21R0504 21R0503 21R0501 BOARD_ID2 BOARD_ID1 BOARD_REV0 BOARD_REV3 MAKE_BASE=TRUE MAKE_BASE=TRUE PP1V8 BOARD_REV1 BOARD_REV2 NOSTUFF 01005 5%MF 1/32W ROOM=SOC 1.00K MF ROOM=SOC 5% NOSTUFF 1.00K 1/32W01005 5%MF01005 ROOM=SOC 1/32W 1.00K ROOM=SOC MF 1/32W5%01005 1.00K NOSTUFF 01005 MF 5% ROOM=SOC 1/32W 1.00K NOSTUFF ROOM=SOC 1/32W01005 MF 1.00K 5% NOSTUFF 11 11 12 12 5248474639 2925181716131211987 12 12 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 7. 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 8. tbd - tbd V @5mA MAX 3.14-3.46V @20mA MAX VDD18_USB: 1.71-1.89V @20mA MAXSOC - USB, JTAG, XTAL Dev ONLY VDD18_AMUX: 1.62-1.98V @1mA MAX VDD11_XTAL:1.06-1.17V @TBD mA MAX CL42 CM42 CK35 CC25 CG26 CE25 AJ60 CL20 CG50 CH26 CK26 CJ26 CM26 CL26 CM20 CM22 BJ2 BL3 BL65 CL29 CK33 CG37 CJ35 CH37 CL31 BJ4 CM14 BJ3 N64 U0700 1 PP0701 2 1 R0700 2 1 C0705 2 1 C0702 2 1 R0701 21 R0702 31 42 Y0700 2 1 C0703 21 FL0700 2 1 C0704 2 1 C0701 2 1 C0700 SWD_DOCK_TO_AP_SWCLK PP1V8 PP3V3_USB PP1V8 AP_TO_PMU_TEST_CLKOUT SWD_DOCK_BI_AP_SWDIO PMU_TO_SYSTEM_COLD_RESET_L PMU_TO_AOP_TRISTAR_ACTIVE_READY AP_TO_NAND_RESET_L XTAL_AP_24M_IN PP1V1 AP_USB_REXT SOC_24M_O XTAL_AP_24M_OUT USB_VBUS_DETECT AP_TO_PMU_AMUX_OUT 90_USB_AP_DATA_P AP_TO_PMU_WDOG_RESET PP1V1_XTAL PP0V9_SOC_FIXED 90_USB_AP_DATA_N CKPLUS_WAIVE=PWRTERM2GND CSP CAYMAN-2GB-20NM-DDR-M P2MM-NSM SM 01005 1/32W MF 1% 200 ROOM=SOC ROOM=SOC 0201-1 X5R-CERM 20% 6.3V 2.2UF 16V CERM 12PF 5% 01005 ROOM=SOC MF ROOM=SOC 1/32W 01005 1% 511K 01005 0% MF 0.00 1/32W ROOM=SOC ROOM=SOC CRITICAL 1.60X1.20MM-SM 24.000MHZ-30PPM-9.5PF-60OHM 16V 5% 01005 CERM 12PF ROOM=SOC 01005 240-OHM-25%-0.20A-0.9DCR ROOM=SOC 01005 ROOM=SOC X5R-CERM 20% 6.3V 0.1UF 01005 X5R-CERM 20% 6.3V 0.1UF ROOM=SOC 01005 X5R-CERM ROOM=SOC 6.3V 0.1UF 20% 40 5248474639 29251817161312119875 19 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 20 40 20 13 40 37 20 13 17 1815 21 20 40 20 18151098 40 NC NC NC NC NC SYM 1 OF 16 VDD12_UH1_HSIC0 VDD_FIXED_USB VDD33_USB VDD11_XTAL ANALOGMUX_OUT WDOG XO0 XI0 USB_REXT USB_ID UH1_HSIC0_DATA UH1_HSIC0_STB JTAG_TRST* JTAG_TDO JTAG_SEL CFSB COLD_RESET* TST_CLKOUT S3E_RESET* JTAG_TMS JTAG_TDI JTAG_TCK TESTMODE HOLD_RESET VDD18_USB VDD18_AMUX USB_DM USB_DP USB_VBUS PP NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 9. D10 NAND is now Gen3 (was Gen2). Caps intentionally 0.22uF #24557655:replace with 20% caps. SI no negative impact VDD12_PCIE_REFBUF:1.08-1.26V @40mA MAX WLAN RX PP's are now managed on Page 52 PCIELINK3PCIELINK2 PCIELINK1PCIELINK0 LINK 1 USED ON AP_DEV ONLY VDD_FIXED_PCIE_xxx:0.855-0.990V @225mA MAX SOC - PCIE INTERFACES VDD12_PCIE: 1.14-1.26V @10mA MAX PCIE_WLAN_BI_AP_CLKREQ_L 52 90_PCIE_AP_TO_WLAN_REFCLK_P 52 PCIE_AP_TO_WLAN_RESET_L52 90_PCIE_AP_TO_WLAN_REFCLK_N 52 PCIE_BB_BI_AP_CLKREQ_L 52 90_PCIE_AP_TO_BB_REFCLK_P 52 PCIE_AP_TO_BB_RESET_L52 90_PCIE_AP_TO_BB_REFCLK_N 52 CC47 BW55 CA60 CA55 CE60 CE55 CC62 CC53 CE49 CC49 CE58 CK63 CJ63 CM57 CL57 CM50 CL50 CK44 CJ44 CM61 CL61 CK56 CJ56 CK52 CJ52 CM46 CL46 CG63 CL64 CM64 CK59 CJ59 CL54 CM54 CJ48 CK48 BJ66 BE64BG64 BJ65 CH57 CG57 BE66 BE65BG66 BC64 U0700 2 1 R0801 2 1 C0804 21 R0803 21 R0804 2 1 R0806 2 1 R0800 2 1 R0802 2 1 R0805 21 C0810 21 C0809 21 C0808 21 C0807 2 1 C0806 2 1 C0805 2 1 C0803 2 1 C0802 2 1 C0801 2 1 C0800 PCIE_AP_TO_NAND_RESET_L 90_PCIE_AP_TO_NAND_TXD_P 90_PCIE_AP_TO_NAND_TXD_N 90_PCIE_NAND_TO_AP_RXD_N 90_PCIE_NAND_TO_AP_RXD_C_N 90_PCIE_AP_TO_NAND_TXD_C_P 90_PCIE_NAND_TO_AP_RXD_P 90_PCIE_AP_TO_NAND_REFCLK_P PCIE_NAND_BI_AP_CLKREQ_L 90_PCIE_AP_TO_NAND_TXD_C_N 90_AP_PCIE3_TXD_C_N 90_AP_PCIE3_TXD_C_P 90_AP_PCIE3_RXD_C_N 90_AP_PCIE3_RXD_C_P 90_AP_PCIE2_RXD_C_P AP_PCIE_RCAL PP1V2_SOC_PCIE_REFBUF PP0V9_SOC_FIXED_PCIE_REFBUF PP0V9_SOC_FIXED PP1V8 PP1V2_SOC 90_AP_PCIE2_TXD_C_N 90_AP_PCIE2_TXD_C_P 90_AP_PCIE2_RXD_C_N 90_PCIE_AP_TO_NAND_REFCLK_N 90_PCIE_NAND_TO_AP_RXD_C_P CAYMAN-2GB-20NM-DDR-M CSP 100K ROOM=SOC 5% MF 01005 1/32W 0.1UF ROOM=SOC 6.3V 20% X5R-CERM 01005 ROOM=SOC MF 01005 1/32W 0.00 0% MF 01005 0.00 ROOM=SOC 0% 1/32W 100K 5% ROOM=SOC MF 01005 1/32W 3.01K ROOM=SOC 1% MF 01005 1/32W 1/32W 100K 5% ROOM=SOC MF 01005 ROOM=SOC 100K 5% MF 01005 1/32W 20% X5R 0.22UF ROOM=SOC 01005 6.3V GND_VOID=TRUE 20% X5R ROOM=SOC 01005 GND_VOID=TRUE 0.22UF 6.3V 0.22UF GND_VOID=TRUE 20% X5R 6.3V 01005 ROOM=SOC 20% X5R 01005 0.22UF GND_VOID=TRUE 6.3VROOM=SOC ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC 2.2UF 20% 6.3V X5R-CERM 0201-1 ROOM=SOC 0.1UF 6.3V 20% X5R-CERM 01005 01005 ROOM=SOC X5R-CERM 6.3V 20% 0.1UF 0.1UF ROOM=SOC 6.3V 20% X5R-CERM 01005 1.0UF 0201-1 X5R ROOM=SOC 6.3V 20% 17 17 17 17 17 17 17 52 52 52 52 52 18151097 5248474639 2925181716131211975 19 16 10 52 52 52 17 NC NC NC NC NC NC NC NC LINK2 LINK3LINK0 LINK1 SYM 2 OF 16 VDD_FIXED_PCIE_CLK VDD_FIXED_PCIE_ANA VDD12_PCIE_REFBUF PCIE_CLKREQ3* PCIE_REF_CLK3_P VDD12_PCIE VDD_FIXED_PCIE_REFBUF PCIE_TX1_N PCIE_TX1_P PCIE_PERST1* PCIE_EXT_REF_CLK_N PCIE_EXT_REF_CLK_P PCIE_RX1_N PCIE_RX1_P PCIE_REF_CLK1_P PCIE_REF_CLK1_N PCIE_CLKREQ1* PCIE_PERST0* PCIE_TX0_N PCIE_TX0_P PCIE_RX0_P PCIE_RX0_N PCIE_CLKREQ0* PCIE_REF_CLK0_P PCIE_REF_CLK0_N PCIE_PERST3* PCIE_TX3_N PCIE_TX3_P PCIE_RX3_N PCIE_RX3_P PCIE_REF_CLK3_N PCIE_PERST2* PCIE_RX2_P PCIE_RX2_N PCIE_TX2_P PCIE_TX2_N PCIE_REF_CLK2_N PCIE_CLKREQ2* PCIE_REF_CLK2_P PCIE_REXT 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 10. D11/111 ONLY <--- Needed for Cayman debug; this pin cannot be input D11/111 ONLY 1.62-1.98V @7mA MAX SOC - MIPI & ISP INTERFACES Spare Dev ONLY Radar 20511449 D11/111 ONLY Dev only Per Radar 21221938 0.825-0.94V @25mA MAX Radar 21203307 AC return path for LCM MIPI which is referenced to GND and VDD_MAIN 2 1 C0909 2 1 C0905 2 1 C0910 G6 G17 G13 G21 G19 G15 G10 AA64 AC65 AE64 AA65 C48 B48 E50 D50 A48 C50 A50 E52 B50 E11 A11 C9 B5 B4 B7 B11 B9 C5 A4 A7 E16 B16 B12 B14 C16 C12 A14 E24 A26 C24 B20 A18 B22 B26 B24 C20 B18 A22 W66 W64 U66 U65 R65 U64 N66 N65 BR4 BR2 BN4 U0700 2 1 C0907 2 1 C0906 1 PP0902 2 1 C0904 2 1 C0908 21 R0907 21 R0906 2 1 C0903 2 1 C0902 2 1 C0901 2 1 R0901 2 1 R0900 2 1 C0900 90_MIPI_AP_TO_LCM_DATA1_N NC_MIPI_AP_TO_LCM_DATA2_P 90_MIPI_NH_TO_AP_CLK_P 90_MIPI_NH_TO_AP_CLK_N 90_MIPI_AP_TO_LCM_CLK_P 90_MIPI_AP_TO_LCM_CLK_N AP_TO_STROBE_DRIVER_HWEN SPI_AP_TO_MAGGIE_CS_L MIPID_REXT NC_MIPI_AP_TO_LCM_DATA2_N 90_MIPI_NH_TO_AP_DATA1_N NC_MIPI_AP_TO_LCM_DATA3_P 90_MIPI_NH_TO_AP_DATA1_P 90_MIPI_NH_TO_AP_DATA0_N 90_MIPI_NH_TO_AP_DATA0_P I2C_ISP_UT_SDA PP0V9_SOC_FIXED AP_TO_UT_SHUTDOWN_L AP_TO_NH_SHUTDOWN_L NC_AP_TO_NV_SHUTDOWN_L NC_AP_TO_NV_CLK_R I2C_ISP_UT_SCL I2C_ISP_NV_SDA I2C_ISP_NV_SCL I2C_ISP_NH_SCL I2C_ISP_NH_SDA AP_TO_MUON_BL_STROBE_EN AP_TO_NH_CLK AP_TO_UT_CLK PP1V8 MIPI0C_REXT 90_MIPI_AP_TO_LCM_DATA0_P 90_MIPI_AP_TO_LCM_DATA0_N 90_MIPI_AP_TO_LCM_DATA1_P AP_TO_UT_CLK_R AP_TO_NH_CLK_R TP_SENSOR3_RST NC_SENSOR0_ISTRB NC_MIPI_AP_TO_LCM_DATA3_N PP_VDD_MAIN 01005 ROOM=SOC 5% 10V 220PF C0G-CERM 01005 ROOM=SOC 5% 10V 220PF C0G-CERM 220PF C0G-CERM 10V 5% ROOM=SOC 01005 CAYMAN-2GB-20NM-DDR-M CSP 100PF NOSTUFF 01005 NP0-C0G 35V 5% NP0-C0G 01005 100PF 5% 35V NOSTUFF SM P2MM-NSM ROOM=SOC ROOM=SOC 220PF 01005 5% 10V C0G-CERM 10V 220PF 5% 01005 ROOM=SOC C0G-CERM ROOM=SOC 33.2 1% 1/32W 01005 MF 01005 33.2 1/32W MF 1% ROOM=SOC ROOM=SOC 01005 20% 6.3V X5R-CERM 0.1UF ROOM=SOC 01005 20% 6.3V X5R-CERM 0.1UF ROOM=SOC 20% 6.3V 0201-1 X5R-CERM 2.2UF 4.02K 01005 MF 1/32W 1% ROOM=SOC MF 01005 1% 4.02K 1/32W ROOM=SOC ROOM=SOC 0201-1 20% 6.3V X5R-CERM 2.2UF 39 45 45 39 39 26 36 45 45 45 45 48 18 15 10 8 7 25 29 48 46 46 48 48 37 29 25 5248474639 2925181716131211875 39 39 39 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 4 NC NC NC NC NC SYM 3 OF 16 SENSOR0_XSHUTDOWN SENSOR1_XSHUTDOWN MIPI1C_DPDATA0 SENSOR1_ISTRB MIPI1C_REXT SENSOR0_ISTRB MIPI1C_DPCLK MIPI1C_DPDATA1 MIPI1C_DNDATA0 MIPI1C_DNDATA1 MIPI1C_DNCLK ISP_I2C3_SCL ISP_I2C2_SDA ISP_I2C2_SCL ISP_I2C1_SCL ISP_I2C1_SDA ISP_I2C0_SCL ISP_I2C3_SDA SENSOR0_CLK SENSOR1_CLK SENSOR2_CLK SENSOR1_RST SENSOR3_RST SENSOR4_RST SENSOR2_RST SENSOR0_RST MIPID_DPCLK DISP_TOUCH_BSYNC0 DISP_TOUCH_BSYNC1 DISP_TOUCH_EB MIPID_REXT VDD18_MIPI VDD_FIXED_MIPI ISP_I2C0_SDA SENSOR_INT MIPID_DNCLK MIPI0C_DPDATA0 MIPI0C_DNDATA0 MIPI0C_DNDATA1 MIPI0C_DPDATA1 MIPI0C_DPDATA2 MIPI0C_DPDATA3 MIPI0C_DNDATA2 MIPI0C_DNDATA3 MIPI0C_DPCLK MIPI0C_DNCLK MIPI0C_REXT MIPID_DPDATA0 MIPID_DNDATA0 MIPID_DNDATA1 MIPID_DPDATA3 MIPID_DNDATA3 MIPID_DPDATA1 MIPID_DPDATA2 MIPID_DNDATA2 NC NC PP NC NC NC NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 11. VDD12_LPDP:1.14-1.26V @60mA MAX Desense for Wifi frequencies D11/111 ONLY Reserved for PanelID[1:0] on ap_dev board Reserved for PanelID[1:0] on ap_dev board Dev ONLY #24401637:Unconnect LPDPRX_EXT_C AC return path for LCM LPDP which is referenced to GND and VDD_MAIN GND ON MLB; other on Dev GND ON MLB; other on Dev D11/111 ONLY VDD12_PLL_LPDP:1.14-1.26V @3mA MAX LPDP Lanes swapped between D10 and D11 90_LPDP_UT_TO_AP_D0_N25 90_LPDP_UT_TO_AP_D0_P25 NC_90_LPDP_NV_TO_AP_D2_N46 90_LPDP_UT_TO_AP_D1_N25 90_LPDP_UT_TO_AP_D1_P25 LPDP_UT_BI_AP_AUX25 NC_90_LPDP_NV_TO_AP_D3_P46 NC_90_LPDP_NV_TO_AP_D3_N46 NC_AP_LPDP_AUX246 NC_90_LPDP_NV_TO_AP_D2_P46 2 1 C1013 2 1 C1001 G23 G30 G28 G25 G62 G60 G58 G55 A64 B64 B63 C63 A61 B61 B56 C56 A54 B54 A57 B57 D57 B59 C59 D64 E63 D61 E56 D54 A33 B33 B31 C31 A29 B29 B27 C27 E31 E35 D33 E33 BN3 AP2 U0700 2 1 C1010 2 1 C1011 2 1 C1002 2 1 C1005 2 1C1006 2 1 R1001 2 1 C1004 PP_VDD_MAIN AP_LPDPRX_RCAL_NEG PP1V2_SOC PP0V9_SOC_FIXED ROOM=SOC 0201-1 2.2UF X5R-CERM 20% 6.3V ROOM=SOC 0201-1 2.2UF X5R-CERM 20% 6.3V CKPLUS_WAIVE=PWRTERM2GND CSP CKPLUS_WAIVE=PWRTERM2GND CKPLUS_WAIVE=PWRTERM2GND CAYMAN-2GB-20NM-DDR-M 33PF NP0-C0G-CERM 16V 5% ROOM=SOC 01005 33PF NP0-C0G-CERM 16V 5% ROOM=SOC 01005 01005 15PF NP0-C0G-CERM 16V 5% ROOM=SOC 0.01UF ROOM=SOC X5R 6.3V 10% 01005 ROOM=SOC 0.1UF X5R-CERM 6.3V 20% 01005 100PF 5% 16V ROOM=SOC 01005 NP0-C0G 300 1% 01005-1 MF ROOM=SOC 1/32W 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 9 4 18 15 9 8 7 NC NC NC NC NC NC NC NC SYM 4 OF 16 VDD12_LPDP_TX VDD12_LPDP_RX VDD12_PLL_LPDP LPDPRX_EXT_C LPDPRX_RCAL_N LPDPRX_BYP_CLK_P LPDPRX_BYP_CLK_N LPDPRX_RCAL_P LPDPRX_RX_D4_N LPDPRX_AUX_D0_P LPDPRX_AUX_D2_P LPDPRX_AUX_D4_P LPDPRX_AUX_D1_P LPDPRX_AUX_D3_P LPDPRX_RX_D4_P LPDPRX_RX_D2_N LPDPRX_RX_D3_P LPDPRX_RX_D3_N LPDPRX_RX_D2_P LPDPRX_RX_D1_P LPDPRX_RX_D0_N LPDPRX_RX_D1_N LPDPRX_RX_D0_P LPDP_TX3P LPDP_TX3N LPDP_TX2N LPDP_TX2P LPDP_TX0P LPDP_TX1N LPDP_TX0N LPDP_TX1P DP_WAKEUP EDP_HPD LPDP_AUX_P LPDP_CAL_VSS_EXT LPDP_AUX_N LPDP_CAL_DRV_OUT NC NC NC NC NC NC NC NC NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 12. To Cayman I2S1/2/3 MCLK NC #24559456 BOARD_ID0 SOC - SERIAL INTERFACES Route as daisy-chain. No T's allowed. I2C5 See Radar#25316444 for Details PP1V85 B2A1 A2B1 U1101 CJ12 CM9 CG22 CJ14 CH16 CH22 CH20 C42 E44 A42 B42 D44 A44 B44 C44 R3 N4 N3 N2 CB4 BY3 BY4 CB2 AG4 AH65 AK64 AH66 BN66 CH11 CK9 CJ9 CG18 CM7 BU66 BN64 BJ64 BN65 BR66 D48 A46 E46 C46 E48 BV65 BU64 BU65 BR64 BY66 AE65 AE66 U4 U3 AG66 AG64 CG12 CK7 BY2 AM64 AK65 AE3 AM66 U0700 21 R1116 2 1 R1113 2 1 R1114 21 R1101 21 R1118 2 1 C1101 21 R1103 BOARD_ID1 I2S_AP_TO_BT_BCLK I2S_BB_TO_AP_DIN I2S_AP_TO_BB_DOUT I2S_AP_TO_CODEC_MCLK_R I2S_AP_TO_CODEC_MSP_BCLK I2S_CODEC_TO_AP_MSP_DIN I2S_AP_TO_CODEC_MSP_DOUT I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK AP_TO_NAND_SYS_CLK SPI_AP_TO_CODEC_MAGGIE_MOSI AP_TO_CUMULUS_CLK32K I2S_AP_TO_CODEC_MCLK SPI_AP_TO_TOUCH_SCLK SPI_AP_TO_TOUCH_MOSI SPI_AP_TO_CODEC_MAGGIE_SCLK_R SPI_CODEC_MAGGIE_TO_AP_MISO I2S_AP_TO_CODEC_MSP_LRCLK DWI_PMGR_TO_BACKLIGHT_CLK I2C2_AP_SCL I2C2_AP_SDA I2C1_AP_SDA I2C1_AP_SCL I2C0_AP_SDA I2C0_AP_SCL I2C3_AP_SCL I2C3_AP_SDA AP_TO_NAND_SYS_CLK_R SPI_TOUCH_TO_AP_MISO SPI_AP_TO_MESA_MOSI I2S_BB_TO_AP_LRCLK I2S_AP_TO_BT_DOUT I2S_BT_TO_AP_DIN I2S_AP_TO_BT_LRCLK SPI_AP_TO_CODEC_MAGGIE_SCLK SPI_AP_TO_MESA_SCLK SPI_MESA_TO_AP_MISO SPI_AP_TO_TOUCH_CS_L SPI_AP_TO_CODEC_CS_L DWI_PMGR_TO_BACKLIGHT_DATA PP1V8 I2S_MAGGIE_TO_AP_DIN PMU_TO_AP_THROTTLE_GPU_L AP_TO_PMU_SOCHOT_L PMU_TO_AP_PRE_UVLO_L I2S_BB_TO_AP_BCLK I2S_AP_TO_MAGGIE_DOUT I2S_MAGGIE_TO_AP_L26_CODEC_BCLK SPI_PMGR_TO_PMU_MOSI SPI_PMU_TO_PMGR_MISO SPI_PMGR_TO_PMU_SCLK I2C5_SDA I2C5_SCL BOARD_ID2 SPI_AP_TO_TOUCH_SCLK_R MESA_TO_AP_INT I2C5_SDA PP1V8 I2C5_SCL CRITICAL ROOM=SOC WLCSP CSP CAYMAN-2GB-20NM-DDR-M 0% 0.00 1/32W 01005 MF ROOM=SOC 1/32W 01005 MF 10K 5% ROOM=SOC 01005 ROOM=SOC MF 1/32W 5% 10K 0% 0.00 1/32W 01005 MF ROOM=SOC 0% 0.00 1/32W 01005 MF ROOM=SOC ROOM=SOC 1.0UF 0201-1 X5R 20% 6.3V 1/32W 01005 MF 1% 33.2 ROOM=SOC 5 53 53 53 32 32 32 36 35 34 33 32 17 36 32 39 32 39 39 36 32 32 37 47 47 47 47 47 47 47 47 39 38 53 53 53 53 36 32 38 38 39 32 37 5248474639 29251817161312119875 36 20 20 20 53 36 36 35 34 33 32 20 20 20 4711 4711 5 38 4711 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 4711 I2S_BB_TO_AP_DIN I2S_AP_TO_BB_DOUT I2S_AP_TO_CODEC_MCLK_R I2S_AP_TO_CODEC_MSP_BCLK I2S_CODEC_TO_AP_MSP_DIN I2S_AP_TO_CODEC_MSP_DOUT I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK I2S_AP_TO_CODEC_MCLK I2S_AP_TO_CODEC_MSP_LRCLK I2C2_AP_SCL I2C2_AP_SDA I2C1_AP_SDA I2C1_AP_SCL I2C0_AP_SDA I2C0_AP_SCL I2C3_AP_SCL I2C3_AP_SDA I2S_BB_TO_AP_LRCLK I2S_AP_TO_BT_DOUT I2S_BT_TO_AP_DIN I2S_AP_TO_BT_LRCLK I2S_MAGGIE_TO_AP_DIN I2S_BB_TO_AP_BCLK I2S_AP_TO_MAGGIE_DOUT I2S_MAGGIE_TO_AP_L26_CODEC_BCLK I2C5_SDA I2C5_SCL BOARD_ID2 CRITICAL WLCSP CSP CAYMAN-2GB-20NM-DDR-M 0% 0.00 1/32W 01005 MF ROOM=SOC 1/32W 01005 MF 10K 5% ROOM=SOC 01005 ROOM=SOC MF 1/32W 5% 10K 0% 0.00 1/32W 01005 MF ROOM=SOC 0% 0.00 1/32W 01005 MF ROOM=SOC ROOM=SOC 1.0UF 0201-1 X5R 20% 6.3V MF 5 53 53 53 32 32 32 36 35 34 33 32 17 36 32 39 32 39 39 36 32 32 37 47 47 47 47 47 47 47 47 39 38 53 53 53 53 36 32 38 38 39 32 37 5248474639 29251817161312119875 36 20 20 20 53 36 35 34 33 32 20 20 20 4711 4711 5 38 4711 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 4711 I2S_BT_TO_AP_DIN I2S_AP_TO_BT_LRCLK I2S_MAGGIE_TO_AP_DIN I2S_BB_TO_AP_BCLK I2S_MAGGIE_TO_AP_L26_CODEC_BCLK I2C5_SDA I2C5_SCL BOARD_ID2 CRITICAL WLCSP CSP 0% 0.00 1/32W 01005 MF ROOM=SOC 1/32W 01005 MF 10K 5% ROOM=SOC 01005 ROOM=SOC MF 1/32W 5% 10K 0% 0.00 1/32W 01005 MF ROOM=SOC 0% 0.00 1/32W 01005 MF ROOM=SOC 1.0UF 0201-1 5 53 53 53 32 32 32 35 34 33 32 17 36 32 39 32 39 39 36 32 32 37 47 47 47 47 47 47 47 47 39 38 53 53 53 53 36 32 38 38 39 32 37 5248474639 29251817161312119875 36 20 20 20 53 36 35 34 33 32 20 20 20 4711 4711 5 38 47 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 4711 I2S_AP_TO_BT_LRCLK I2S_BB_TO_AP_BCLK I2S_MAGGIE_TO_AP_L26_CODEC_BCLK I2C5_SDA I2C5_SCL BOARD_ID2 WLCSP CSP 0% 0.00 1/32W 01005 MF ROOM=SOC 1/32W 01005 MF 10K 5% ROOM=SOC 01005 ROOM=SOC MF 1/32W 5% 10K 0% 0.00 1/32W 01005 MF ROOM=SOC 0% 0.00 1/32W 01005 MF ROOM=SOC 1.0UF 5 53 53 53 32 32 32 34 33 32 17 36 32 39 32 39 39 36 32 32 37 47 47 47 47 47 47 47 47 39 38 53 53 53 53 36 32 38 38 39 32 37 5248474639 29251817161312119875 36 20 20 20 53 36 35 34 33 32 20 20 20 4711 4711 5 38 47 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 4711 I2S_BB_TO_AP_BCLK I2S_AP_TO_MAGGIE_DOUT I2C5_SDA I2C5_SCL BOARD_ID2 WLCSP CSP 0% 0.00 1/32W 01005 MF ROOM=SOC 1/32W 01005 MF 10K 5% ROOM=SOC 01005 ROOM=SOC MF 1/32W 5% 10K 0% 0.00 1/32W 01005 MF ROOM=SOC 0% 0.00 1/32W 01005 MF ROOM=SOC 1.0UF 5 53 53 53 32 32 32 34 33 32 17 36 32 39 32 39 39 36 32 32 37 47 47 47 47 47 47 47 47 39 38 53 53 53 53 36 32 38 38 39 32 37 5248474639 29251817161312119875 36 20 20 20 53 36 34 33 32 20 20 20 4711 4711 5 38 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 4711 SDASCL VCC VSS NC NC NC NC NC NC NC NC SYM 6 OF 16 I2C1_SCL SPI3_SSIN SPI3_SCLK SPI2_SSIN SPI2_MISO SPI3_MOSI SPI2_SCLK SPI3_MISO SPI2_MOSI SPI1_SSIN SPI1_SCLK SPI1_MOSI SPI1_MISO SPI0_SSIN SPI0_MOSI SPI0_SCLK I2S3_BCLK I2S3_LRCK I2S3_DOUT SPI0_MISO I2S3_MCK I2S3_DIN I2S2_MCK I2S1_DIN I2S2_DIN I2S2_BCLK I2S2_LRCK I2S2_DOUT I2S1_DOUT I2S0_MCK I2S0_DIN I2S1_MCK I2S0_DOUT I2S0_LRCK I2S1_LRCK I2S0_BCLK I2S1_BCLK DROOP SOCHOT DWI_DO CLK32K_OUT NAND_SYS_CLK GPU_TRIGGER DWI_CLK PMU_SCLK PMU_MISO PMU_MOSI SPI4_SCLK I2C3_SDA I2C3_SCL SPI4_MISO I2C5_SCL GPIO_42 GPIO_43 I2C5_SDA SPI4_MOSI I2C2_SCL I2C2_SDA I2C1_SDA I2C0_SDA I2C0_SCL NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 13. RESERVERD FOR SSHB ID ON DEV BOARD BOOT_CONFIG1 DEV ONLY Nostuff per #24511702 D101/D111 ONLY D101/D111 ONLY D101/D111 ONLY; for GNSS D101/D111 ONLY BOARD_ID4 SOC - GPIO INTERFACES D10/D11 ONLY #24608280 D101/D111 ONLY #24557547:Delete R1204 BOOT_CONFIG0 Dev only #25120460:REQUEST_DFU Assignment PP1V85 AP_TO_ICEFALL_FW_DWLD_REQ53 2 1 R1210 AM2 AP3 CG14 CG16 BG4 A37 B37 C37 D37 U2 W4 W2 AA4 AH2 AK4 AK3 AM4 B39 C39 D39 E39 CJ7 CL5 AH3 AH4 AG2 BU3 BU2 AY3 AY2 AV3 AT2 AT4 A39 E41 C41 A41 E42 D42 AA3 AA2 CG20 CK11 CH14 CL9 CJ11 BG2 BE3 BE4 BE2 BC4 BC3 BB4 BB2 AE2 AC3 AE4 AH64 AP65 AP66 AT64 AT66 AT67 AV67 AV65 AY66 AY65 BB66 BC65 BB64 U0700 AP_TO_TOUCH_MAMBA_RESET_L BOARD_REV0 UART_AP_TO_NFC_TXD AP_TO_BB_COREDUMP PMU_TO_AP_BUF_VOL_DOWN_L PMU_TO_AP_BUF_POWER_KEY_L AP_TO_BB_MESA_ON AP_TO_BB_IPC_GPIO1 NC_DFU_STATUS AP_TO_ACC_BUCK_VSEL AP_TO_MAGGIE_CRESETB_L AP_TO_LCM_RESET_L AP_BI_HOMER_BOOTLOADER_ALIVE AP_TO_NAND_FW_STRAP ALS_TO_AP_INT_L AP_TO_SPKAMP2_RESET_L AP_TO_BB_TIME_MARK MAGGIE_TO_AP_CDONE PP1V8 TOUCH_TO_AP_INT_L PMU_TO_AP_THROTTLE_CPU_L BB_TO_AP_RESET_DETECT_L NC_AP_TO_GNSS_TIME_MARK AP_TO_BB_RESET_L BUTTON_VOL_UP_L AP_TO_BBPMU_RADIO_ON_L AP_TO_NFC_FW_DWLD_REQ PMU_TO_AP_FORCE_DFU BOARD_REV3 UART_AP_DEBUG_TXD PROX_BI_AP_AOP_INT_PWM_L UART_AP_DEBUG_RXD BOARD_REV1 BOARD_REV2 AP_TO_BT_WAKE PMU_TO_AP_BUF_RINGER_A AP_TO_WLAN_DEVICE_WAKE AP_TO_NFC_DEV_WAKE NC_BB_TO_AP_RESET_ACT_L NC_AP_UART2_RTS_L NC_AP_UART2_CTS_L UART_AP_TO_BT_TXD UART_BT_TO_AP_CTS_L UART_NFC_TO_AP_RXD UART_AP_TO_HOMER_TXD UART_HOMER_TO_AP_RXD UART_AP_TO_WLAN_TXD UART_WLAN_TO_AP_RXD SWI_AP_BI_TIGRIS UART_AP_TO_WLAN_RTS_L UART_AP_TO_ACCESSORY_TXD UART_ACCESSORY_TO_AP_RXD UART_WLAN_TO_AP_CTS_L UART_BT_TO_AP_RXD UART_AP_TO_BT_RTS_L NC_AP_UART2_RXD UART_NFC_TO_AP_CTS_L UART_AP_TO_NFC_RTS_L NC_AP_UART2_TXD NC_AP_TO_BB_IPC_GPIO2 NC_AP_TO_GNSS_WAKE 1/32W 5% 01005 MF 10K ROOM=SOC NOSTUFF CSP CAYMAN-2GB-20NM-DDR-M 39 5 53 53 20 20 53 53 27 36 39 36 17 29 33 53 36 52 48 47 46 39 29 25 18 17 16 13 11 9 8 7 5 39 20 53 53 44 20 53 53 20 4 5 40 2913 40 5 5 53 20 53 53 53 53 53 36 36 53 53 21 53 40 40 53 53 53 53 53 UART_NFC_TO_AP_RXD UART_AP_TO_HOMER_TXD UART_HOMER_TO_AP_RXD UART_AP_TO_WLAN_TXD UART_WLAN_TO_AP_RXD SWI_AP_BI_TIGRIS UART_AP_TO_WLAN_RTS_L UART_AP_TO_ACCESSORY_TXD UART_ACCESSORY_TO_AP_RXD UART_WLAN_TO_AP_CTS_L UART_BT_TO_AP_RXD UART_AP_TO_BT_RTS_L NC_AP_UART2_RXD UART_NFC_TO_AP_CTS_L UART_AP_TO_NFC_RTS_L NC_AP_UART2_TXD NC_AP_TO_BB_IPC_GPIO2 NC_AP_TO_GNSS_WAKE 1/32W 5% 01005 MF 10K ROOM=SOC NOSTUFF CSP CAYMAN-2GB-20NM-DDR-M 39 5 53 53 20 20 53 53 27 36 39 36 17 29 33 53 36 52 48 47 46 39 29 25 18 17 16 13 11 9 8 7 5 39 20 53 53 44 20 53 53 20 4 5 40 2913 40 5 5 53 20 53 53 53 53 53 36 36 53 53 21 53 40 40 53 53 53 53 53 UART_AP_TO_BT_RTS_L NC_AP_UART2_RXD UART_NFC_TO_AP_CTS_L UART_AP_TO_NFC_RTS_L NC_AP_UART2_TXD NC_AP_TO_BB_IPC_GPIO2 NC_AP_TO_GNSS_WAKE 1/32W 5% 01005 MF 10K ROOM=SOC NOSTUFF CSP CAYMAN-2GB-20NM-DDR-M 39 5 53 53 20 20 53 53 27 36 39 36 17 29 33 53 36 52 48 47 46 39 29 25 18 17 16 13 11 9 8 7 5 39 20 53 53 44 20 53 53 20 4 5 40 2913 40 5 5 53 20 53 53 53 53 53 36 36 53 53 21 53 40 40 53 53 53 53 53 NC_AP_UART2_RXD UART_NFC_TO_AP_CTS_L UART_AP_TO_NFC_RTS_L NC_AP_UART2_TXD NC_AP_TO_BB_IPC_GPIO2 NC_AP_TO_GNSS_WAKE 1/32W 5% 01005 MF 10K ROOM=SOC NOSTUFF CSP CAYMAN-2GB-20NM-DDR-M 39 5 53 53 20 20 53 53 27 36 39 36 17 29 33 53 36 52 48 47 46 39 29 25 18 17 16 13 11 9 8 7 5 39 20 53 53 44 20 53 53 20 4 5 40 2913 40 5 5 53 20 53 53 53 53 53 36 36 53 53 21 53 40 40 53 53 53 53 53 NC NC NC SYM 5 OF 16 TMR32_PWM1 UART0_RXD GPIO_4 REQUEST_DFU2 REQUEST_DFU1 GPIO_41 GPIO_40 GPIO_36 GPIO_38 GPIO_37 GPIO_39 GPIO_35 GPIO_32 GPIO_31 GPIO_34 GPIO_33 GPIO_30 GPIO_27 GPIO_26 GPIO_28 GPIO_29 GPIO_25 GPIO_24 GPIO_23 GPIO_21 GPIO_22 GPIO_20 GPIO_19 GPIO_18 GPIO_15 GPIO_16 GPIO_17 GPIO_11 GPIO_13 GPIO_14 GPIO_10 GPIO_9 GPIO_7 GPIO_8 GPIO_5 GPIO_6 GPIO_1 GPIO_2 GPIO_3 GPIO_0 TMR32_PWM0 TMR32_PWM2 UART2_RTS* UART2_CTS* UART1_TXD UART0_TXD UART1_CTS* UART3_TXD UART3_RXD UART7_TXD UART7_RXD UART4_TXD UART4_RXD UART5_RTXD UART4_RTS* UART6_TXD UART6_RXD UART4_CTS* UART1_RXD UART1_RTS* UART2_RXD UART3_CTS* UART3_RTS* UART2_TXD GPIO_12 NC NC NC NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 14. Use internal pullup in SOC (AOP side). SOC - AOP BB_SWDIO has pullup in Radio_MLB pages #25756894:South Carbon R2 #24512059: Remove R1300 PU Internal pullup in AOP. Radar 21210869 #25756894:North Carbon R1 (+Mg,P) DOCK_CONNECT can be GPIO, but input only. Radar 21680759 21 R1306 BV3 BU4 CM33 CL37 CG41 CH35 CJ37 CM31 CH29 CG29 CL11 CJ22 CJ20 CK14 CG35 CL16 CL14 CJ16 CJ27 CJ18 CK39 CH41 CM37 CM35 CK37 CG39 CJ39 CL35 CJ24 CM11 CJ33 CG33 CK31 CM12 CK22 CK29 CK24 CK27 CJ31 CK20 CH31 CG31 CJ29 CK18 CK16 CK12 CM29 CM16 U0700 21 R1305 21 R1303 2 1 R1304 I2S_AOP_TO_MAGGIE_L26_MCLK PROX_BI_AP_AOP_INT_PWM_L UART_BB_TO_AOP_RXD I2S_CODEC_XSP_TO_AOP_LRCLK UART_TOUCH_TO_AOP_RXD PP1V8 PMU_TO_SYSTEM_COLD_RESET_L PMU_TO_AOP_TRISTAR_ACTIVE_READY AOP_TO_MESA_BLANKING_EN AOP_TO_PMU_ACTIVE_REQUEST AOP_TO_PMU_SLEEP1_REQUEST PMU_TO_AOP_CLK32K SWD_AP_BI_HOMER_SWDIO SWD_AOP_BI_BB_SWDIO HOMER_TO_AOP_WAKE_INT SWD_AP_TO_MANY_SWCLK I2C_AOP_SCL AUDIO_TO_AOP_INT_L AOP_TO_MESA_I2C_ISO_EN SPI_IMU_TO_AOP_MISO PMU_TO_AOP_IRQ_L SPI_AOP_TO_IMU_MOSI I2C_AOP_SDA LCM_TO_MANY_BSYNC ACCEL_GYRO_TO_AOP_INT SPI_AOP_TO_ACCEL_GYRO_CS_L ACCEL_GYRO_TO_AOP_DATARDY AOP_TO_MAGGIE_EN PHOSPHORUS_TO_AOP_INT_L I2S_CODEC_XSP_TO_AOP_BCLK MESA_TO_AOP_FDINT UART_AOP_TO_BB_TXD MAGGIE_TO_AOP_INT UART_AOP_TO_MAGGIE_TXD I2S_AOP_TO_CODEC_XSP_DOUT BOT_ACCEL_GYRO_TO_AOP_DATARDY SPI_AOP_TO_BOT_ACCEL_GYRO_CS_L TRISTAR_TO_AOP_INT SPI_AOP_TO_PHOSPHORUS_CS_L SWD_AP_BI_NAND_SWDIO AOP_TO_WLAN_CONTEXT_A SPI_AOP_TO_IMU_SCLK PMU_TO_AOP_SLEEP1_READY COMPASS_TO_AOP_INT SPI_AOP_TO_COMPASS_CS_L SPI_AOP_TO_IMU_SCLK_R1 SPI_AOP_TO_IMU_SCLK_R2 UART_AOP_TO_TOUCH_TXD I2S_CODEC_XSP_TO_AOP_DIN I2S_AOP_TO_MAGGIE_L26_MCLK_R AOP_TO_SPKAMP1_ARC_RESET_L AOP_TO_WLAN_CONTEXT_B 49.9 1% ROOM=SOC 01005 1/32W MF CAYMAN-2GB-20NM-DDR-M CSP 1% 1/32W 01005 ROOM=SOC MF 49.9 33.2 1/32W 1% ROOM=SOC MF 01005 1.00K 5% ROOM=SOC MF 01005 1/32W NOSTUFF 36 35 34 33 29 12 53 32 39 52484746 39292518171612119875 207 4037207 38 20 20 20 36 53 36 533617 48 35 34 33 32 48 24 20 24 48 53 39 23 20 24 24 24 36 24 32 38 53 36 36 32 24 24 40 24 17 53 20 15 24 24 24 24 39 32 3534 53 SYM 7 OF 16 CFSB_AOP AWAKE_RESET* AOP_PDM_CLK0 AOP_PDM_DATA0 AWAKE_REQ AOP_DDR_REQ AOP_DDR_RESET* DOCK_ATTENTION DOCK_CONNECT AOP_PDM_DATA1 RT_CLK32768 SWD_TMS2 SWD_TMS3 AOP_SWD_TMS1 AOP_SWD_TMS0 AOP_SWD_TCK_OUT AOP_UART1_TXD AOP_UART0_RXD AOP_UART0_TXD AOP_UART1_RXD AOP_I2C0_SCL AOP_FUNC_13 AOP_FUNC_14 AOP_SPI_SCLK AOP_SPI_MISO AOP_FUNC_15 AOP_SPI_MOSI AOP_I2C0_SDA AOP_FUNC_7 AOP_FUNC_5 AOP_FUNC_4 AOP_FUNC_3 AOP_FUNC_6 AOP_FUNC_11 AOP_FUNC_9 AOP_FUNC_8 AOP_FUNC_10 AOP_FUNC_12 AOP_FUNC_0 AOP_FUNC_1 AOP_FUNC_2 AOP_I2S_MCK AOP_I2S_LRCK AOP_I2S_DOUT AOP_I2S_DIN AOP_I2S_BCLK AOP_UART2_RXD AOP_UART2_TXD 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 15. 1.06V @1.0A MAX 0.9V @tbd A MAX 0.67V @TBDA MAX 0.92V @10.7A MAX 1.03V @12.9A MAX 0.80V @TBD A MAX 0.80V @TBDA MAX 0.80V @4.1A MAX SOC - CPU, GPU & SOC RAILS 1.06V @17.4A MAX 0.625V @tbd A MAX 1.03V @1.44A MAX 0.92V @1.50A MAX 0.67V @TBD A MAX 0.80V @TBD A MAX 2 1 C1414 AW25 J60 BF40 Y60 Y36 Y10 V30 T60 T10 P55 J34 J21 J13 CE45 CE17 CE13 CA47 CA43 CA38 CA34 CA30 CA25 CA21 CA17 CA13 BW10 BT55 BT51 BT47 BT43 BT38 BT34 BT30 BT25 BT21 BT17 BT13 BP58 BP53 BP49 BP45 BP40 BP36 BP32 BP28 BP23 BP19 BP15 BM55 BK53 BK49 BK45 BK40 BK36 BK32 BK28 BF58 BF53 BF49 BF45 BF36 BF32 BF28 BD60 BD6 BD55 BD51 BD47 BD43 BD38 BD34 BD30 BD25 AW60 AW55 AW51 AW47 AW43 AW38 AW34 AW30 AR55 AR51 AR47 AR43 AR38 AR34 AR30 AR25 AN58 AN53 AN49 AN45 AN40 AN36 AN32 AN28 AL6 AJ36 AJ32 AJ28 AF60 AD32 AD28 U0700 AJ47 BK21 AL47 Y53 Y49 Y45 Y40 Y23 Y19 Y15 P51 P47 P43 P38 P34 P30 P25 P21 P17 AF51 AF47 AF43 AJ45 Y28 V55 V51 V38 V34 V25 V13 T53 T40 T36 T15 P13 L53 L49 L45 L40 L36 L32 L28 L23 L19 L15 J51 J47 J43 J38 J30 J25 AJ53 AJ49 AJ40 AF55 AD53 AD49 AD45 AD40 AB55 AB51 AB47 AB43 AB25 AB21 AB17 AB13 BH8 BA19 BA15 AW8 AU19 AR8 AN15 AF8 BK23 AJ10 BK15 BK10 BH21 BH17 BH13 BF23 BF10 BD8 BD21 BA23 BA10 AW21 AW17 AW13 AU15 AU10 AR21 AR17 AR13 AN23 AN19 AN10 AL8 AL21 AJ23 AF17 AF13 AD23 AD19 AD15 AD10 U0700 2 1 C1434 2 1 C1408 2 1 C1401 2 1 C1403 4 3 2 1 C1407 1 PP1411 1 PP1410 1PP1402 1 PP1403 1 PP1409 1 PP1408 4 3 2 1 C1435 4 3 2 1 C1439 1 PP1401 2 1 C1444 21 XW1401 2 1 C1436 4 3 2 1 C1402 4 3 2 1 C1410 4 3 2 1 C1415 4 3 2 1 C1420 4 3 2 1 C1409 4 3 2 1 C1452 4 3 2 1 C1454 4 3 2 1 C1416 2 1 C1466 4 3 2 1 C1425 4 3 2 1 C1429 4 3 2 1 C1456 4 3 2 1 C1457 4 3 2 1 C1421 4 3 2 1 C1426 2 1 C1448 4 3 2 1 C1432 4 3 2 1 C1437 4 3 2 1 C1433 2 1 C1459 2 1 C1458 4 3 2 1 C1465 4 3 2 1 C1460 4 3 2 1 C1461 21 XW1403 2 1 XW1402 2 1 C1449 4 3 2 1 C1442 4 3 2 1 C1438 4 3 2 1 C1440 4 3 2 1 C1418 4 3 2 1 C1423 4 3 2 1 C1428 4 3 2 1 C1431 4 3 2 1 C1427 4 3 2 1 C1430 4 3 2 1 C1404 4 3 2 1 C1411 4 3 2 1 C1417 4 3 2 1 C1422 4 3 2 1 C1406 4 3 2 1 C1413 4 3 2 1 C1419 4 3 2 1 C1424 4 3 2 1 C1405 4 3 2 1 C1412 PP_GPU_VAR PP_CPU_VAR PP_GPU_SRAM_VAR PP_CPU_SRAM_VAR PP_CPU_VAR AP_VDD_GPU_SENSE PP_SOC_VAR PP_GPU_VAR AP_VDD_CPU_SENSE TP_AP_VSS_CPU_SENSE BUCK0_PP_CPU_FB BUCK2_PP_SOC_FB BUCK1_PP_GPU_FB TP_VDD_SOC_SENSE TP_VSS_SENSE 15UF 6.3V X5R 0402-1 ROOM=SOC 20% CSP CAYMAN-2GB-20NM-DDR-M CAYMAN-2GB-20NM-DDR-M CSP 0402-1 X5R 6.3V 20% 15UF X5R 15UF 20% 6.3V 0402-1 6.3V X5R 0402-1 20% 15UF 6.3V 20% 10UF CERM-X5R ROOM=SOC 0402-9 20% 0402 4V CERM ROOM=SOC 7.5UF ROOM=SOC P2MM-NSM SM ROOM=SOC P2MM-NSM SM SM ROOM=SOC P2MM-NSM ROOM=SOC P2MM-NSM SM ROOM=SOC P2MM-NSM SM ROOM=SOC P2MM-NSM SM 0402 4V CER 7.5UF ROOM=SOC 20% 0402 4V CER 20% 7.5UF ROOM=SOC SM P2MM-NSM ROOM=SOC ROOM=SOC CERM-X5R 10UF 0402-9 6.3V 20% SHORT-20L-0.05MM-SM OMIT ROOM=SOC NO_XNET_CONNECTION ROOM=SOC CERM-X5R 10UF 0402-9 6.3V 20% 0402 4V 20% CERM 4.3UF ROOM=SOC ROOM=SOC 4V 20% 1UF CERM 0402 4V 20% 0402 CERM ROOM=SOC 1UF ROOM=SOC 0402 4V 1UF 20% CERM 4.3UF ROOM=SOC 4V 20% CERM 0402 ROOM=SOC 20% 4.3UF 4V CERM 0402 ROOM=SOC 4.3UF 20% CERM 0402 4V ROOM=SOC 7.5UF 0402 CERM 4V 20% ROOM=SOC 0201-1 20% 2.2UF X5R-CERM 6.3V 0.47UF 0402 6.3V 20% CERM ROOM=SOC ROOM=SOC 0402 0.47UF 6.3V 20% CERM 0402 ROOM=SOC 6.3V 20% CERM 0.47UF ROOM=SOC 0.47UF 0402 6.3V 20% CERM 7.5UF ROOM=SOC 4V 0402 20% CERM 7.5UF 20% ROOM=SOC 4V 0402 CERM 6.3V 20% 2.2UF 0201-1 ROOM=SOC X5R-CERM 20% ROOM=SOC 7.5UF 4V CERM 0402 4V ROOM=SOC 20% 0402 CERM 7.5UF 20% 4V ROOM=SOC CERM 0402 7.5UF ROOM=SOC CERM-X5R 6.3V 20% 0402-9 10UF 0402-9 CERM-X5R ROOM=SOC 10UF 6.3V 20% ROOM=SOC 0402 4V 4.3UF 20% CERM 7.5UF ROOM=SOC 4V 20% CERM 0402 ROOM=SOC 7.5UF 0402 4V 20% CERM NO_XNET_CONNECTION OMIT ROOM=SOC SHORT-20L-0.05MM-SM ROOM=SOC OMIT SHORT-20L-0.05MM-SM NO_XNET_CONNECTION ROOM=SOC 0201-1 2.2UF20% 6.3V X5R-CERM 0402 ROOM=SOC 0.47UF 6.3V 20% CERM ROOM=SOC 1UF 0402 4V 20% CERM 4V 0402 7.5UF 20% ROOM=SOC CERM ROOM=SOC 20% 1UF 4V 0402 CERM 20% CERM 0402 4V 1UF ROOM=SOC 0402 4V 20% CERM ROOM=SOC 1UF 1UF 0402 20% CERM ROOM=SOC 4V ROOM=SOC 0402 4V 20% CERM 4.3UF 4V 20% ROOM=SOC 4.3UF CERM 04020402 4V 20% 7.5UF ROOM=SOC CERM CERM 20% 4V 0402 7.5UF ROOM=SOC 7.5UF 0402 4V 20% CERM ROOM=SOC 4.3UF ROOM=SOC 0402 20% 4V CERM 0.47UF 6.3V 20% ROOM=SOC CERM 0402 ROOM=SOC 0402 0.47UF 6.3V 20% CERM ROOM=SOC 0402 6.3V 20% 0.47UF CERM 20% 6.3V CERM ROOM=SOC 0.47UF 0402 ROOM=SOC 0402 4V 4.3UF 20% CERM 0402 4V 4.3UF 20% ROOM=SOC CERM 1814 1814 18 18 1814 20 18 1814 20 18 18 18 SYM 9 OF 16 VDD_SOCVDD_SOC SYM 8 OF 16 VDD_GPU_SRAM VDD_CPU_SRAM VDD_CPU VDD_GPU VDD_GPU_SENSE VSS_SENSE VDD_SOC_SENSE VSS_CPU_SENSE VDD_CPU_SENSE PP PP PP PP PP PP PP |---|||||||--|||== 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 16. 1.06 - 1.17V @4mA MAX (CURRENT INCLUDED IN VDD2) 0.797-0.945V @9 mA MAX 1.06-1.17V @0.85A MAX DDR IMPEDANCE CONTROL 0.765-0.840V @60mA MAX TBD-TBDV @1.9A MAX SOC - POWER SUPPLIES 1.06 - 1.17V @1.74A MAX H64 H4 CD65 CG3 P58 J8 BW60 CE8 Y62 V60 T62 P60 K67 E67 AH67 AE67 AD62 AC67 AB60 Y6 V8 T6 P8 L6 K1 E1 AH1 AE1 AC1 AB8 CH67 CD67 BW62 BT60 BP62 BM60 BL67 BK62 BJ67 BH60 BE67 CH1 CD1 CC6 CA8 BW6 BT8 BP6 BM8 BL1 BJ1 BE1 W67 W1 R67 R1 N67 N1 D66 D2 CK66 CK2 CJ66 CJ2 C66 C2 BY67 BY1 BV67 BV1 BR67 BR1 BB65 BB3 AM65 AM3 AA66 H65 K65 K64 H3 K3 K4 CB64 BY64 CB65 BN2 CF4 CD3 CF3 U0700 CE40 CE30 CC36 AW23 Y8 Y58 T8 T58 T32 L60 L58 L10 J62 J55 J23 J17 G36 G32 CC45 CC32 CC28 CC23 CC19 CC15 CC10 BW8 BW58 BW53 BW49 BW45 BW40 BW36 BW32 BW28 BW23 BW19 BW15 BP60 BP10 BM51 BM47 BM43 BM38 BM34 BM30 BM25 BM21 BM17 BM13 BK6 BK58 BH55 BH51 BH47 BH43 BH38 BH34 BH30 BH25 BA58 BA53 BA49 BA45 BA40 BA36 BA32 BA28 AU6 AU58 AU53 AU49 AU45 AU40 AU36 AU32 AU28 AR60 AL60 AL55 AL51 AL43 AL38 AL34 AL30 AL25 AJ58 AF62 AF38 AF34 AF30 AF25 AD58 AB38 AB34 AB30 U0700 2 1 C1512 2 1 C1513 2 1 C1510 2 1 C1501 2 1 C1508 2 1 C1509 2 1 C1507 2 1 C1529 2 1 C1511 2 1 C1515 4 3 2 1 C1527 2 1 C1528 2 1 C1522 21 FL1501 2 1 C1519 2 1 C1504 2 1 C1518 2 1 C1523 2 1 R1505 2 1 R1506 4 3 2 1 C1503 2 1 C1514 2 1 C1506 2 1 R1504 2 1 R1503 2 1 R1502 2 1 R1501 4 3 2 1 C1502 PP0V9_SOC_FIXED PP1V1_SDRAM PP0V8_AOP PP1V1 PP1V1 PP1V1 PP1V1_SDRAM PMU_TO_AOP_SLEEP1_READY PP1V1_DDR_PLL DDR2_RREF DDR3_RREF DDR0_RREF DDR1_RREF DDR0_ZQ DDR3_ZQ SYSTEM_ALIVE CAYMAN-2GB-20NM-DDR-M CSP CSP CAYMAN-2GB-20NM-DDR-M CERM-X5R 10UF ROOM=SOC 0402-9 6.3V 20% CERM-X5R 0402-9 10UF 6.3V 20% ROOM=SOC 20% 6.3V ROOM=SOC 01005-1 0.22UF X5R 20% 6.3V 10UF 0402-9 ROOM=SOC CERM-X5R 20% 6.3V 0.22UF ROOM=SOC 01005-1 X5R 20% 6.3V 01005-1 0.22UF ROOM=SOC X5R ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC 0201-1 6.3V 20% 2.2UF X5R-CERM ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF 20% 4V 1UF 0402 ROOM=SOC CERM 10UF 20% 6.3V 0402-9 CERM-X5R ROOM=SOC 2.2UF 20% 6.3V X5R-CERM 0201-1 ROOM=SOC 100OHM-25%-0.12A ROOM=SOC 01005 ROOM=SOC 2.2UF 20% 6.3V X5R-CERM 0201-1 2.2UF 20% 6.3V X5R-CERM 0201-1 ROOM=SOC X5R-CERM 2.2UF 20% 6.3V 0201-1 ROOM=SOC 20% 6.3V ROOM=SOC 0.22UF 01005-1 X5R 240 1% ROOM=SOC MF 01005 1/32W ROOM=SOC 240 1% MF 01005 1/32W 20% ROOM=SOC 7.5UF 4V 0402 CERM 2.2UF 20% 6.3V X5R-CERM ROOM=SOC 0201-1 20% 6.3V CERM-X5R 10UF 0402-9 ROOM=SOC ROOM=SOC 1% 240 MF 01005 1/32W 1% 240 ROOM=SOC MF 01005 1/32W 1% ROOM=SOC 240 MF 01005 1/32W 1% ROOM=SOC 240 MF 01005 1/32W 20% 4.3UF ROOM=SOC 4V CERM 0402 18 10 9 8 7 191815 19 18157 18 15 7 18 15 7 191815 2013 212017 SYM 11 OF 16 DDR1_SYS_ALIVE DDR0_SYS_ALIVE DDR3_SYS_ALIVE DDR2_SYS_ALIVE VDD2 VDDIO11_PLL_DDR0 VDDIO11_PLL_DDR3 DDR3_ZQ DDR0_ZQ DDR1_RREF DDR1_RET* DDR0_RREF DDR0_RET* DDR3_RREF DDR2_RREF DDR2_RET* VDDIO11_RET_DDR0 VDDIO11_RET_DDR2 VDDIO11_RET_DDR3 VDDIO11_RET_DDR1 VDDIO11_DDR0 VDDIO11_DDR1 VDDIO11_DDR2 VDDIO11_DDR3 VDDIO11_PLL_DDR1 VDDIO11_PLL_DDR2 DDR3_RET* SYM 10 OF 16 VDD_FIXED VDD_LOW VDD_FIXED_CPU VDD_FIXED =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 17. VDD12_PLL_SOC:1.14-1.26V @31mA MAX VDD12_PLL_CPU:1.14-1.26V @13mA MAX 1.70-1.95V @134mA MAX SOC - POWER SUPPLIES 1.62-1.98V @10mA MAX 1.62-1.98V @43mA MAX TBD-TBDV @30mA MAX 1.62-1.98V @1mA MAX 1.62-1.98V @1mA MAX 1.62-1.98V @2mA MAX J58 BF38 Y55 Y51 Y47 Y43 Y30 Y25 Y21 Y17 Y13 W65 W3 V62 V6 V58 V53 V40 V36 V32 V28 V15 V10 U67 U1 T55 T51 T38 T34 T25 T13 R66 R64 R4 R2 P62 P6 P53 P49 P45 P40 P36 P32 P28 P23 P19 P15 P10 M67 M66 M65 M64 M4 M3 M2 M1 L8 L62 L55 L51 L47 L43 L38 L34 L30 L25 L21 L17 L13 K66 K2 J6 J53 J49 J45 J40 J32 J28 J19 J15 J10 H67 H66 H2 H1 G8 G51 G47 G43 G38 F67 F66 F65 F64 F4 F3 F2 F1 E9 E7 E66 E65 E64 E61 E59 E57 E54 E5 E4 E37 E3 E29 E27 E26 E22 E20 E2 E18 E14 E12 D9 D7 D67 D65 D63 D59 D56 D52 D5 D46 D41 D4 D35 D31 D3 D29 D27 D26 D24 D22 D20 U0700 D18 D16 D14 D12 D11 D1 CM66 CM63 CM59 CM56 CM52 CM5 CM48 CM44 CM41 CM4 CM39 CM27 CM24 CM2 CM18 CL7 CL67 CL65 CL63 CL59 CL56 CL52 CL48 CL44 CL41 CL4 CL39 CL33 CL3 CL27 CL24 CL18 CL12 CL1 CK64 CK61 CK57 CK54 CK50 CK5 CK46 CK42 CK41 CK4 CJ67 CJ65 CJ64 CJ61 CJ57 CJ54 CJ50 CJ5 CJ46 CJ42 CJ41 CJ4 CJ3 CJ1 CH9 CH7 CH66 CH65 CH64 CH63 CH61 CH59 CH56 CH54 CH52 CH5 CH48 CH46 CH44 CH42 CH4 CH39 CH33 CH3 CH27 CH24 CH2 CH18 CH12 CG67 CG66 CG65 CG64 CG61 CG59 CG56 CG54 CG52 CG5 CG48 CG46 CG44 CG42 CG4 CG27 CG24 CG2 CG11 CG1 CF67 CF66 CF65 CF64 CF2 CF1 CE62 CE6 CE53 CE47 CE15 CE10 CD66 CD64 CD4 CD2 CC8 T30 CL22 CC43 CC38 CC34 CC30 CC21 CC17 CC13 CB67 CB66 CB3 CB1 CA62 CA6 CA58 CA53 CA49 CA45 CA40 CA36 CA32 CA28 CA23 CA19 CA15 U0700 CA10 C7 C64 C61 C57 C54 C52 C4 C35 C33 C29 C26 C22 C18 C14 C11 BY65 CE51 BW51 BW47 BW43 BW38 BW34 BW30 BW25 BW21 BW17 BW13 BV66 BV64 BV4 BV2 BU67 BU1 BT62 BT6 BT58 BT53 BT49 BT45 BT40 BT36 BT32 BT28 BT23 BT19 BT15 BT10 BR65 BR3 BP8 BP55 BP51 BP47 BP43 BP38 BP34 BP30 BP25 BP21 BP17 BP13 BN67 BN1 BM62 BM6 BM58 BM53 BM49 BM45 BM40 BM36 BM32 BM28 BM23 BM19 BM15 BM10 BL66 BL64 BL4 BL2 BK8 BK60 BK55 BK51 BK47 BK43 BK38 BK34 BK30 BK25 AL49 BK17 BK13 BH62 BH6 BH58 BH53 BH49 BH45 BH40 BH36 BH32 BH28 BH23 BH19 BH15 BH10 BG67 BG65 BG3 BG1 BF8 BF55 BF51 BF47 BF43 BF34 BF30 BF25 BF21 BD62 BD58 BD53 BD49 BD45 BD40 BD36 BD32 BD28 BD23 BD10 BC67 BC66 BC2 BC1 BA8 BA60 BA55 BA51 BA47 BA43 BA38 BA34 BA30 BA21 BA17 BA13 B67 B65 B52 B46 B41 B35 B3 B1 U0700 AY67 AY64 AY4 AY1 AW62 AW6 AW58 AW53 AW49 AW45 AW40 AW36 AW32 AW28 CH50 AW19 AW15 AW10 AV66 AV64 AV4 AV2 AV1 AU8 AU60 AU55 AU51 AU47 AU43 AU38 AU34 AU30 AU25 AU21 AU17 AU13 AT65 AT3 AT1 AR62 AR6 AR58 AR53 AR49 AR45 AR40 AR36 AR32 AR28 AR19 AR15 AR10 AP67 AP64 AP4 AP1 AN8 AN60 AN55 AN51 AN47 AN43 AN38 AN34 AN30 AN25 AN21 AN17 AN13 AL62 AL58 AL53 AL45 AL40 AL36 AL32 AL28 AL23 AK67 AK66 AK2 AK1 AJ8 AJ55 AJ51 AL10 AJ43 AJ38 AJ34 AJ30 AJ25 AJ21 AG67 AG65 AG3 AG1 AF6 AF58 AF53 AF49 AF45 AF40 AF36 AF32 AF28 AF23 AF19 AF15 AF10 AD8 AD60 AD55 AD51 AD47 AD43 AD34 AD30 AD25 AD21 AD17 AD13 AC66 AC64 AC4 AC2 AB62 AB6 AB58 AB53 AB49 AB45 AB40 AB36 AB32 AB28 AB23 AB19 AB15 AB10 AA67 AA1 A9 A66 A63 A59 A56 A52 A5 A35 A31 A27 A24 A20 A2 A16 A12 U0700 CE43 CE38 CE36 CE34 CE32 CE28 CE23 CE19 BF6 BA6 AN6 AJ6 AD6 G53 G49 G45 G40 BF62 BA62 AU62 AN62 AJ62 BF60 CE21 J36 AF21 BK19 AR23 CC40 CG9 G34 CG7 Y38 Y34 AD38 AD36 Y32 BA25 T28 AU23 CK65 CK3 C65 C3 BB67 BB1 AM67 AM1 U0700 2 1 C1606 2 1 C1604 21 R1602 2 1 C1615 2 1 C1609 2 1 C1613 2 1 C1601 2 1 C1603 2 1 C1611 21 R1601 2 1 C1605 2 1 C1614 2 1 C1610 2 1 C1607 2 1 C1612 2 1 C1608 2 1 C1602 PP1V2_SOC PP1V8_SDRAM PP1V8_SDRAM PP1V2_REF PP1V2_PLL_CPU PP1V2_PLL_SOC PP1V8 CAYMAN-2GB-20NM-DDR-M CSPCSP CAYMAN-2GB-20NM-DDR-MCAYMAN-2GB-20NM-DDR-M CSP CAYMAN-2GB-20NM-DDR-M CSP CSP CAYMAN-2GB-20NM-DDR-M CKPLUS_WAIVE=PWRTERM2GND CKPLUS_WAIVE=PWRTERM2GND 20% 01005 0.1UF 6.3V X5R-CERM ROOM=SOC ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC MF 01005 1/32W 0.00 0% 6.3V 2.2UF 0201-1 20% X5R-CERM ROOM=SOC ROOM=SOC 20% 01005 6.3V X5R-CERM 0.1UF ROOM=SOC 0.1UF 6.3V 20% X5R-CERM 01005 20% 0.1UF 6.3V X5R-CERM 01005 ROOM=SOCROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF 01005 1/32W ROOM=SOC MF 0.00 0% ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF 6.3V 20% 2.2UF ROOM=SOC X5R-CERM 0201-1 ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF 10UF 6.3V 20% 0402-9 CERM-X5R ROOM=SOC 19 10 8 53 52 48 47 41 40 37 36 32 21 20 18 16 53 52 48 47 41 40 37 36 32 21 20 18 16 19 52 48 47 46 39 29 25 18 17 13 12 11 9 8 7 5 SYM 16 OF 16 VSSVSS SYM 15 OF 16 VSSVSS SYM 14 OF 16 VSS VSS SYM 13 OF 16 VSS VSS SYM 12 OF 16 VDD18_EFUSE1 VDD18_EFUSE2 VDD1 VDDIO18_GRP2 VDDIO18_GRP1 VDDIO18_GRP10 VDD18_TSADC1 VDD18_TSADC0 VDD18_TSADC2 VDD18_LPOSC VDD12_GPU_UVD VDD12_CPU_UVD VDD18_TSADC5 VDD18_TSADC4 VDD18_FMON VDD18_TSADC3 VDD12_PLL_SOC VDD12_SOC_UVD VDD12_PLL_CPU VDDIO18_GRP4 VDDIO18_GRP3 =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 18. 315mA MAX PROBE POINTS 1007mA MAX 1230mA MAX (1us peak power) #24543147:10uF for 32GB #26326159:10uF for C1719 2 1 C1713 D6 B2 P6 P4 P2 OE10 OE0 OC10 OC0 L7 L5 L3 G7 B6 B4 E5 R5 OF10 OF0 OB10 OB0 A5 R7 R3 J9 J1 F2 A7 A3 OG10 OG0 OD10 OD0 OA10 OA0 D8 F8 M2 K2 P8 N7 N5 N3 M8 K8 H8 H6 G9 K6 K4 M6 J7 J5 M4 G5 C5 F4 G1 B8 C7 F6 E7 E3 H2 J3 G3 H4 D4 D2 C3 U1701 2 1 C1704 2 1 C1748 2 1 C1736 2 1 C1739 2 1 C1741 2 1 C1754 2 1 C1753 2 1 C1752 2 1 C1735 2 1 C1734 2 1 C1732 2 1 C1708 2 1 C1711 2 1 C1717 2 1 C1747 2 1 C1745 2 1 C1743 2 1 C1723 2 1 C1712 2 1 C1730 2 1 C1703 2 1 C1706 2 1 C1709 2 1 C1714 2 1 C1720 2 1 C1728 2 1 C1737 2 1 C1738 2 1 C1740 2 1 C1742 2 1 C1744 2 1 C1746 2 1 C1731 2 1 C1749 2 1 C1750 2 1 C1751 2 1 C1729 2 1 C1733 1 PP1701 1 PP1702 21 R1707 21 R1702 2 1 C1724 2 1 C1727 2 1 C1722 2 1 C1726 2 1 C1725 2 1 R1701 2 1 C1721 2 1 C1719 2 1 C1716 2 1 C1705 2 1 C1702 2 1 C1701 2 1 C1710 21 R1703 2 1 C1718 2 1 C1715 2 1 C1707 2 1 R1704 PP1V8 NAND_AGND PP0V9_NAND PP1V8 90_PCIE_AP_TO_NAND_REFCLK_P 90_PCIE_AP_TO_NAND_REFCLK_N NAND_AGND SWD_AP_NAND_SWCLK_R PP1V8_NAND_AVDD SWD_AP_BI_NAND_SWDIO_R PCIE_AP_TO_NAND_RESET_L AP_TO_NAND_FW_STRAP PMU_TO_NAND_LOW_BATT_BOOT_L NAND_ZQ AP_TO_NAND_RESET_L SWD_AP_BI_NAND_SWDIO SWD_AP_TO_MANY_SWCLK SYSTEM_ALIVE 90_PCIE_AP_TO_NAND_TXD_N 90_PCIE_AP_TO_NAND_TXD_P PCIE_NAND_RESREF PCIE_NAND_BI_AP_CLKREQ_L 90_PCIE_AP_TO_NAND_REFCLK_N 90_PCIE_AP_TO_NAND_REFCLK_P AP_TO_NAND_SYS_CLK NAND_VREF 90_PCIE_NAND_TO_AP_RXD_P 90_PCIE_NAND_TO_AP_RXD_N PP3V0_NAND 0402-1 15UF OMIT ROOM=NAND X5R 6.3V 20% VLGA THGBX6T1T82LFXF ROOM=NAND CRITICAL BOMOPTION=OMIT_TABLE X5R 0402-1 ROOM=NAND 15UF 6.3V 20% 6.3V OMIT 15UF 20% ROOM=NAND 0402-1 X5R 100PF 01005 NP0-C0G 16V 5% ROOM=NAND 1.0UF ROOM=NAND X5R 0201-1 6.3V 20% 0201-1 6.3V 1.0UF X5R ROOM=NAND 20% 0201-1 6.3V 20% ROOM=NAND 1.0UF X5R 20% 6.3V X5R 0201-1 ROOM=NAND 1.0UF 20% 6.3V X5R 1.0UF ROOM=NAND 0201-1 C0G-CERM ROOM=NAND 01005 220PF 10V 5% ROOM=NAND 01005 100PF 16V 5% NP0-C0G ROOM=NAND 01005 NP0-C0G 16V 39PF 5% 5% 01005 220PF C0G-CERM 10V ROOM=NAND 16V 5% 01005 22PF CERM ROOM=NAND 16V 5% 01005 NP0-C0G 68PF ROOM=NAND 1.0UF X5R 0201-1 ROOM=NAND 6.3V 20% 1.0UF X5R ROOM=NAND 6.3V 20% 0201-1 1.0UF X5R 20% ROOM=NAND 0201-1 6.3V 16V 5% 01005 NP0-C0G 39PF ROOM=NAND 16V 5% 100PF 01005 NP0-C0G ROOM=NAND X5R 15UF ROOM=NAND 0402-1 6.3V 20% 5% 01005 10V 220PF ROOM=NAND C0G-CERM 16V 5% 01005 22PF CERM ROOM=NAND 16V 5% 100PF 01005 NP0-C0G ROOM=NAND 5% 01005 10V 220PF C0G-CERM ROOM=NAND 16V 5% 100PF 01005 NP0-C0G ROOM=NAND 16V 5% 01005 NP0-C0G ROOM=NAND 68PF 0201-1 1.0UF ROOM=NAND 6.3V 20% X5R 1.0UF X5R 0201-1 ROOM=NAND 6.3V 20% 1.0UF X5R ROOM=NAND 6.3V 20% 0201-1 1.0UF X5R 6.3V 20% ROOM=NAND 0201-1 1.0UF X5R ROOM=NAND 20% 6.3V 0201-1 0201-1 ROOM=NAND 20% 1.0UF 6.3V X5R 01005 NP0-C0G 16V 5% ROOM=NAND 68PF 20% 6.3V X5R 0201-1 ROOM=NAND 1.0UF 1.0UF 20% 6.3V X5R 0201-1 ROOM=NAND 0201-1 X5R 20% 6.3V 1.0UF ROOM=NAND X5R ROOM=NAND 0402-1 15UF 6.3V 20% OMIT 15UF 20% 6.3V X5R ROOM=NAND 0402-1 SM P2MM-NSM ROOM=NAND SM P2MM-NSM ROOM=NAND 01005 MF ROOM=NAND 1/32W 0% 0.00 01005 MF1/32W ROOM=NAND 0% 0.00 01005 ROOM=NAND 10% 6.3V 0.01UF X5R 0402-1 ROOM=NAND 15UF 20% 6.3V X5RX5R 15UF 0402-1 ROOM=NAND 6.3V 20% ROOM=NAND 0201-1 X5R-CERM 6.3V 20% 2.2UF 01005 ROOM=NAND X5R 10% 0.01UF 6.3V 01005 1/32W MF 0.5% 34.8 ROOM=NAND OMIT 20% 6.3V X5R 15UF 0402-1 ROOM=NAND 0402-9 10UF 6.3V CERM-X5R 20% ROOM=NANDROOM=NAND X5R 15UF 20% OMIT 0402-1 6.3V 6.3V 0402-1 X5R ROOM=NAND 15UF 20% 0402-1 X5R 15UF 6.3V 20% ROOM=NAND 0402-1 15UF X5R ROOM=NAND 6.3V 20% 01005 0.1UF ROOM=NAND 6.3V 20% X5R-CERM 01005 1/32W MF ROOM=NAND 1% 24.9 ROOM=NAND 01005 22PF CERM 16V 5% ROOM=NAND 01005 220PF C0G-CERM 10V 5% X5R 15UF 0402-1 ROOM=NAND 6.3V 20% 01005 1/32W MF 3.01K ROOM=NAND 1% 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 17 19 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 17 8 17 8 17 8 12 20 7 13 533613 212015 8 8 8 17 8 17 8 11 8 8 VER-1 VDD VDD PCI_AVDD_H PCIE_TX1_M PCIE_TX1_P PCIE_CLKREQ* TRST* RESET* PCIE_RX1_M PCIE_TX0_P PCIE_TX0_M VSS VSS PCIE_RX0_P PCIE_RX0_M PCI_RESREF PCIE_RX1_P ZQ VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSSA EXT_D0 EXT_D1 EXT_D2 EXT_D3 EXT_D4 EXT_D5 EXT_D6 EXT_D7 EXT_NCE EXT_NRE EXT_NWE EXT_RNB EXT_CLE EXT_ALE VDD VDD VDD VDD VDD AVDD1 VCC VCC VCC VCC VCC VDDIO VCC VDDIO VDDIO VDDIO VDDIO VDDIO VREF PCI_VDD2 PCI_VDD1 PCIE_REFCLK_M PCIE_REFCLK_P CLK_IN PCI_AVDD_CLK2 PCI_AVDD_CLK1 NC NC NC NC PP PP NC NC NC NC NC NC NC NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 19. BUCK9 BUCK2BUCK0 4.7AMAX13.4AMAX BUCK8 13.4AMAX BUCK3BUCK4 4.7AMAX 0.67V/0.80V 0.67V - 0.92V 1.7AMAX (pendingvendorqual) BUCK5 3.2AMAX 1.5AMAX BUCK6 1.5AMAX 0.75AMAX 1.5AMAX 0.80V - 1.06V 0.80V - 0.92V BUCK7 BUCK1 1.03V for overdrive only 0.625V - 1.06V Voltages per Cayman Power Spec, Sec. 2.2, rev 0.9.2, #24557869 D10/D101:#24681501,TY ONLY, D11/D11: Both Vendor 2 1 L1803 2 1 L1801 2 1 L1804 21 L1802 2 1 L1805 2 1 L1818 21 L1811 2 1 C1840 2 1 XW1807 2 1 C1802 2 1 C1874 2 1 C1875 2 1 C1876 2 1 C1877 2 1 C1864 2 1 C1801 H13 H14 R13 M8 F11 H6 N7 L19 L18 F19 F18 V6 U6 K19 K18 D1 C1 B1 M3 M2 M1 T3 T2 H3 H2 H1 D13 C13 B13 A13 D17 C17 B17 A17 D9 C9 B9 A9 D5 C5 B5 A5 V5 U5 V2 U2 M19 M18 P16 G19 G18 H15 V7 U7 R8 J19 J18 H16 A2 D2 C2 B2 F5 V4 U4 L3 L2 L1 N3 N2 N1 K5 V3 U3 U1 T1 R1 R3 R2 R7 J3 J2 J1 G3 G2 G1 J5 D12 C12 B12 A12 D14 C14 B14 A14 D16 C16 B16 A16 A18 D18 C18 B18 F12 D10 C10 B10 A10 D8 C8 B8 A8 D6 C6 B6 A6 A4 D4 C4 B4 F10 U1801 21 XW1805 21 L1817 2 1 C1830 2 1 C1836 2 1 C1861 21 L1816 21 XW1804 21 L1814 2 1 L1815 2 1 C1816 2 1 C1823 2 1 C1822 2 1 C1829 2 1 C1835 2 1 C1860 2 1 C1841 2 1 C1871 21 L1813 2 1 L1812 21 L1810 2 1 C1814 2 1 C1821 2 1 C1828 2 1 C1834 2 1 C1866 2 1 C1873 2 1 C1813 2 1 C1820 2 1 C1827 2 1 C1833 2 1 C1839 2 1 C1865 2 1 XW18062 1 C1870 2 1 C1862 2 1 C1863 2 1 C1869 2 1 C1868 2 1 C1867 2 1 C1872 2 1 C1811 21 L1809 21 L1807 2 1 L1808 21 L1806 2 1 C1856 2 1 C1849 2 1 C1859 2 1 C1855 2 1 C1852 2 1 C1848 2 1 C1858 2 1 C1854 2 1 C1851 2 1 C1847 2 1 C1810 2 1 C1809 2 1 C1808 2 1 C1807 2 1 C1806 2 1 C1805 2 1 C1804 2 1 C1803 2 1 C1845 2 1 C1843 2 1 C1838 2 1 C1832 2 1 C1826 2 1 C1819 2 1 C1844 2 1 C1842 2 1 C1837 2 1 C1831 2 1 C1825 2 1 C1857 2 1 XW1801 2 1 XW1803 2 1 XW1802 2 1 C1853 2 1 C1850 2 1 C1846 2 1 C1818 BUCK5_LX0PP0V9_SOC_FIXED BUCK5_FB PP2V8_UT_AF_VAR PP_GPU_SRAM_VAR PP_CPU_SRAM_VAR PP1V1 PP1V8_MAGGIE_IMU PP1V8_TOUCH BUCK2_PP_SOC_FB BUCK1_PP_GPU_FB BUCK0_PP_CPU_FB PP1V8 BUCK9_LX0 BUCK7_LX0 BUCK6_LX0 BUCK9_FB BUCK6_FB BUCK4_FB BUCK4_LX1 BUCK4_LX0 BUCK3_LX0 BUCK3_FB BUCK2_LX1 BUCK2_LX0 BUCK1_LX3 BUCK1_LX2 BUCK1_LX1 BUCK1_LX0 BUCK0_LX3 BUCK0_LX1 BUCK0_LX0 PP_SOC_VAR PP1V8_SDRAM PP1V1_SDRAM PP_GPU_VAR BUCK0_LX2 PP_CPU_VAR VDD_MAIN_SNS BUCK8_LX0 BUCK8_FB PP_VDD_MAIN PP1V25_BUCK BUCK7_FB ROOM=PMU 1UH-20%-2.1A-0.12OHM CRITICAL PIQA20121T-SM CRITICAL ROOM=PMU PIQA20121T-SM 1UH-20%-2.1A-0.12OHM 0603 1.0UH-20%-1.5A-0.161OHM CRITICAL MCFE2016T-SM 1.0UH-20%-2.25A-0.086OHM CRITICAL ROOM=PMU PIQA20121T-SM 0.47UH-20%-3.8A-0.048OHM NO_XNET_CONNECTION=1 CRITICAL ROOM=PMU CRITICALPINA20121T-SM 0.22UH-20%-6.7A-0.023OHM NO_XNET_CONNECTION=1 ROOM=PMU 0402-1ROOM=PMU 15UF X5R 6.3V 20% OMIT ROOM=SOC SHORT-20L-0.05MM-SM NO_XNET_CONNECTION=1 ROOM=PMU 0402-1 X5R 6.3V 20% 15UF ROOM=PMU 0402-1 X5R 6.3V 20% 15UF 20% 6.3V 2.2UF ROOM=PMU 0201-1 X5R-CERM 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 ROOM=PMU 0402-1 15UF X5R 6.3V 20% 0402-1ROOM=PMU 15UF X5R 6.3V 20% D2333A1 WLCSP ROOM=PMU OMIT SHORT-20L-0.05MM-SM NO_XNET_CONNECTION=1 ROOM=SOC PIQA20161T-SM 1.0UH-20%-3.6A-0.060OHM CRITICAL ROOM=PMU NO_XNET_CONNECTION=1 ROOM=PMU 0402-1 X5R 6.3V 20% 15UF ROOM=PMU 0402-1 X5R 6.3V 20% 15UF 5% 10V C0G-CERM ROOM=PMU 01005 220PF PIQA20161T-SM 1.0UH-20%-3.6A-0.060OHM CRITICAL ROOM=PMU NO_XNET_CONNECTION=1 OMIT SHORT-20L-0.05MM-SM ROOM=SOC NO_XNET_CONNECTION=1 PIQA20161T-SM 1.0UH-20%-3.6A-0.060OHM ROOM=PMU CRITICAL PIQA20121T-SM 0.47UH-20%-3.8A-0.048OHM CRITICALNO_XNET_CONNECTION=1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 ROOM=PMU ROOM=PMU 0402-1 15UF X5R 6.3V 20% ROOM=PMU 0402-1 15UF X5R 6.3V 20% ROOM=PMU 0402-1 15UF X5R 6.3V 20% ROOM=PMU 01005 220PF C0G-CERM 10V 5% ROOM=PMU 0402-1 15UF X5R 6.3V 20% ROOM=PMU 01005 220PF C0G-CERM 10V 5% PINA20121T-SM 0.22UH-20%-6.7A-0.023OHM ROOM=PMU CRITICALNO_XNET_CONNECTION=1 0.22UH-20%-6.7A-0.023OHM PINA20121T-SM CRITICAL ROOM=PMUNO_XNET_CONNECTION=1 PIQA20161T-SM 1.0UH-20%-3.6A-0.060OHM CRITICAL ROOM=PMU NO_XNET_CONNECTION=1 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 20% 6.3V X5R 15UF ROOM=PMU 0402-1 5% 10V C0G-CERM 220PF ROOM=PMU 01005 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% OMIT SHORT-20L-0.05MM-SM ROOM=SOC NO_XNET_CONNECTION=1 5% 10V C0G-CERM 220PF ROOM=PMU 01005 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 5% 10V C0G-CERM 220PF ROOM=PMU 01005 5% 10V C0G-CERM 220PF ROOM=PMU 01005 5% 10V C0G-CERM 220PF ROOM=PMU 01005 01005 ROOM=PMU 220PF C0G-CERM 10V 5% 220PF C0G-CERM 10V 5% 01005 ROOM=PMU NO_XNET_CONNECTION=1 PINA20121T-SM CRITICAL 0.22UH-20%-6.7A-0.023OHM ROOM=PMU PINA20121T-SM 0.22UH-20%-6.7A-0.023OHM ROOM=PMU CRITICALNO_XNET_CONNECTION=1 CRITICAL ROOM=PMU 1.0UH-3.6A-0.06OHM NO_XNET_CONNECTION=1 MEKK2016T-SM NO_XNET_CONNECTION=1 PINA20121T-SM 0.22UH-20%-6.7A-0.023OHM CRITICAL ROOM=PMU 1.0UH-20%-3.6A-0.060OHM PIQA20161T-SM ROOM=PMU CRITICALNO_XNET_CONNECTION=1 2.2UF20% 6.3V X5R-CERM ROOM=PMU 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 20% X5R-CERM 6.3V 2.2UF 0201-1 ROOM=PMU 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 2.2UF ROOM=PMU 0201-1 X5R-CERM 6.3V 20% 6.3V X5R-CERM 2.2UF 20% 0201-1 ROOM=PMU X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 20% 15UF 6.3V 0402-1 ROOM=PMU X5R 6.3V 20% 15UF ROOM=PMU 0402-1 6.3V 15UF 20% 0402-1ROOM=PMU X5R 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 0402-1ROOM=PMU 6.3V 20% 15UF X5R 0402-1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 20% X5R 15UF ROOM=PMU 6.3V 0402-1 20% X5R 15UF ROOM=PMU 6.3V 0402-1 20% 6.3V X5R 15UF ROOM=PMU 0402-1 20% 6.3V X5R 15UF ROOM=PMU 0402-1 20% 6.3V X5R 15UF ROOM=PMU 20% 6.3V CERM-X5R 10UF ROOM=PMU 0402-9 OMIT ROOM=SOC SHORT-20L-0.05MM-SM NO_XNET_CONNECTION=1 OMIT SHORT-20L-0.05MM-SM ROOM=SOC NO_XNET_CONNECTION=1 NO_XNET_CONNECTION=1ROOM=SOC SHORT-20L-0.05MM-SM OMIT 20% 6.3V CERM-X5R 10UF ROOM=PMU 0402-9 ROOM=PMU 20% 6.3V CERM-X5R 10UF 0402-9 20% 6.3V CERM-X5R 10UF 0402-9 ROOM=PMU 0402-1 20% 6.3V X5R 15UF ROOM=PMU 15 10 9 8 7 25 14 14 157 3624 47463938 14 14 14 52484746 39292517161312119875 14 53524847 4140373632212016 1915 14 14 19 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 10 9 4 19 SYM 2 OF 4 BAT/USBBUCKINPUT SWITCHOUTPUTS VDD_BUCK6 VBUCK4_SW BUCK3_SW1 BUCK3_SW2 BUCK3_SW3 BUCK4_SW1 BUCK3_FB VBUCK3_SW BUCK3_LX0 BUCK4_LX0 BUCK4_LX1 BUCK4_FB BUCK2_FB BUCK2_LX0 BUCK1_FB BUCK1_LX3 BUCK2_LX1 BUCK0_LX3 BUCK1_LX1 BUCK0_FB BUCK1_LX2 BUCK1_LX0 BUCK0_LX1 BUCK0_LX0 BUCK0_LX2 VDD_BUCK1_01 VDD_MAIN VDD_MAIN_SW VDD_BUCK0_23 VDD_BUCK2 VDD_BUCK1_23 VDD_BUCK4 VDD_BUCK3 VDD_BUCK5 VDD_BUCK7 VDD_BUCK8 VDD_BUCK9 BUCK5_LX0 BUCK5_FB BUCK6_LX0 BUCK6_FB BUCK7_LX0 BUCK7_FB BUCK8_LX0 BUCK8_FB BUCK9_LX0 BUCK9_FB VDD_MAIN_E VDD_MAIN_N VDD_BUCK0_01 VDD_MAIN_W VDD_MAIN_W VDD_MAIN_SNS 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 20. #24989262 #24989262:OTP-AO LDO17 default off,50mA Iout_max VPUMP: 10nF min. @4.6V VBUF_1V2 LDO17 LDO3 LDO6 LDO9 +/-4.5% LDO10 LDO11 LDO8 1.2-2.475V 1.2-2.475V LDO1 (Ca) LDO2 (Ca) 1.2-2.475V 2.4-3.675V 2.4-3.675V 0.7-1.2V 2.5-3.6V(tbc) 1.2-2.475V LDO7 (Cb) 1.2-2.475V 2.4-3.675V +/-30mV 250mA LDO14 LDO13 LDO12 LDO7 LDO15 0.7-1.4V 1.2-2.475V 250mA LDO19 LDO16 LDO18 LDO4 LDO5 LDO1 LDO_RTC 250mA 1150mA0.7-1.2V LDO11 (Cb) LDO# +/-75mV LDO6 (Cb) LDO9 (Cb) LDO5 (F) LDO# LDO3 (Ca) LDO4 (D) ADJ.RANGE, LOW 1.2-2.475V ADJ.RANGE, HI 2.4-3.675V 2.4-3.675V 2.4-3.675V +/-2.5% +/-30mV +/-25mV 250mA 1000mA MAX.CURRENT +/-2.5% 50mA +/-1.4% 60mA+/-2.5% 50mA ACCURACY 50mA +/-2.5% (500/100mA in bypass) LDO15 (Ca) LDO14 (Gb) LDO13 (Cb) LDO12 (E) +/-30mV +/-2.5% 2.4-3.675V 2.4-3.675V 400mA 250mA 250mA 10mA 50mA 250mA 400mA 10mA 50mA 400mA 10mA MAX.CURRENT 2.4-3.675V 2.4-3.675V ADJ.RANGE, HI +/-3.0% +/-30mV +/-30mV ACCURACY +/-5% +/-2.5% +/-3.0% +/-2.0% +/-3.0% +/-5.0% 2.4-3.675V ADJ.RANGE, LOW 1.2-2.475V 1.2-2.475V 1.8V 0.7-1.4V 1.2-2.475V 1.2-2.475V 1.2V 0.7-1.4V 2.5V LDO17 (Ca) BUF_1V2 LDO19 (Gb) LDO16 (Cb) LDO18 (Gb) ADELYN LDO SPECS U15 = PMU XTAL GND 1.2-2.475V 2.4-3.675V LDO8 (Cb) LDO10 (Ga) LDO2 NewforADELYN 2 1 R1901 2 1 C1923 2 1 C1930 2 1 C1904 2 1 C1905 2 1 C1915 2 1 C1912 2 1 C1919 2 1 C1909 2 1 C1902 2 1 XW1902 V8 V19 V12 V1 U8 T13 U15 T8 T7 T6 T4 T15 T5 R4 R17 P15 P4 P3 P2 P1 N4 N19 N18 N17 M4 M17 L8 L4 L17 K8 K4 K3 K2 K17 K1 J8 J4 J17 H4 H19 H18 H17 G4 G17 F4 F3 F2 F17 F1 E9 E8 E7 E6 E5 E4 E3 E2 E19 E18 E17 E16 E15 E14 E13 E12 E11 E10 E1 D7 D3 D19 D15 D11 C7 C3 C19 C15 C11 B7 B3 B19 B15 B11 A7 P14 A3 P13 A19 H8 A15 A11 A1 U1801 R5 G15 U18 U17 T11 T18 U12 U16 U14 P7 U13 T9 P17 R18 P18 T17 T14 U10 U9 T16 T10 U11 T12 U19 V18 V17 T19 V16 V13 R9 R19 P19 R14 V10 V9 R16 R10 V11 R12 R15 P8J6 U1801 2 1 C1935 2 1 C1933 2 1 C1932 2 1 XW1901 2 1 C1922 2 1 C1913 2 1 C1908 2 1 C1925 2 1 C1926 2 1 C1927 2 1 C1921 2 1 C1918 2 1 C1916 2 1 C1901 2 1 C1907 2 1 C1911 2 1 C1910 2 1 C1914 PP2V9_NH_AVDD PP0V9_NAND PP0V8_AOP PP3V3_USB PP1V8_HAWKING PP1V2_REF PMU_VPUMP PP_VDD_MAIN PMU_VSS_RTC PMU_PRE_UVLO_DET VDD_MAIN_SNS PP_VDD_MAIN PP1V1_SDRAM PP1V25_BUCK PP_VDD_MAIN PP_VDD_BOOST PP3V0_TRISTAR_ANT_PROX PP1V2_NH_NV_DVDD PP1V2_UT_DVDD PP_LDO17 PP1V8_ALWAYS PP3V0_MESA PP1V2_SOC PP1V8_MESA PP_ACC_VAR PP3V0_NAND PP3V0_ALS_APS_CONVOY PP1V8_VA 0.00 0201 NOSTUFFMF 1% 1/20W 20% 2.2UF 6.3V X5R-CERM 0201-1 ROOM=PMU 0201-1 ROOM=PMU X5R-CERM 20% 2.2UF 6.3V 2.2UF 6.3V 20% X5R-CERM 0201-1 ROOM=PMU 5% 16V 33PF 01005 ROOM=PMU NP0-C0G-CERM 6.3V X5R ROOM=PMU 15UF20% 0402-1 X5R ROOM=PMU 20% 6.3V 0402-1 15UF 20% 0201-1 X5R-CERM 2.2UF ROOM=PMU 6.3V 220PF C0G-CERM 10V 5% 01005 ROOM=PMU 47NF X5R-CERM ROOM=PMU 6.3V 01005 20% ROOM=PMU SHORT-20L-0.05MM-SM OMIT WLCSP D2333A1 WLCSP D2333A1 ROOM=PMU 20% 6.3V X5R 0201-1 1.0UF 20% 6.3V X5R 0201-1 1.0UF ROOM=PMU 0.22UF 20% 6.3V X5R ROOM=PMU 01005-1 NO_XNET_CONNECTION ROOM=PMU OMIT SHORT-20L-0.05MM-SM 2.2UF ROOM=PMU 0201-1 X5R-CERM 6.3V 20% 20% 6.3V ROOM=PMU X5R-CERM 0201-1 2.2UF 20% X5R-CERM ROOM=PMU 0201-1 6.3V 2.2UF X5R 0201-1 20% 6.3V ROOM=PMU 1.0UF ROOM=PMU 0201-1 20% 6.3V X5R-CERM 2.2UF 0201-1 2.2UF 20% 6.3V X5R-CERM ROOM=PMU 2.2UF X5R-CERM ROOM=PMU 20% 6.3V 0201-1 20% 6.3V X5R-CERM 2.2UF 0201-1 ROOM=PMU 6.3V ROOM=PMU 20% 0201-1 X5R-CERM 2.2UF X5R 20% 6.3V 0402-1 ROOM=PMU 15UF 20% 6.3V CERM-X5R 10UF 0402-9 ROOM=PMUROOM=PMU 20% 6.3V 0402-9 10UF CERM-X5RCERM-X5R 0402-9 6.3V 10UF 20% ROOM=PMU 6.3V CERM-X5R 20% 0402-9 ROOM=PMU 10UF 29 17 15 7 44 16 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 20 20 18 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 18 15 18 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 53 38 37 32 25 23 53414029 29 25 2120 38 16108 4838 464027 5217 2925 35343332 NC NC NC SYM 4 OF 4 VSS VSS SYM 1 OF 4 LDO LDOINPUT VDD_LDO4 VPP_OTP VLDO2 VLDO8 VDD_LDO19 VDD_LDO19 TP_DET VDD_LDO10 VDD_LDO11_13 VDD_LDO14 VDD_LDO7_8 VDD_LDO16 VDD_LDO18 VDD_LDO6_BYP VDD_LDO9 VDD_LDO5 VDD_LDO1 VDD_LDO2_15 VPUMP VBUF_1V2 VLDO19 VLDO18 VLDO14 VLDO13 VLDO17 VLDO16 VLDO15 VLDO12 VLDO9_FB VLDO10 VLDO11 VLDO9 VBYPASS VLDO7 VLDO6 VLDO4 VLDO3 VDD_LDO3_17 VLDO5_1 VLDO5_0 VLDO1 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 21. GPIO21 = I2C SCL is for Chestnut dark current mitigation RS = requires sequencer Sequencer controllable #24511807: Stuff for Carrier TBD Button for two-finger reset: 20711463 and 21196187 RS RS RS BUTTON PULL-UP RESISTORS NOTE:VDROOP_DET filtering is now inside Adelyn RADIO PA NTC AP NTC FOREHEAD NTC NOTE:100PF CAPS ARE THE SAMPLING CAPS FOR PMU ADC Reserved for MENU key on dev board REAR CAMERA NTC Active high with int 200k PD HIGH=FORCE PWM MODE D101/D111 ONLY: TCXO_RF Supplies 32K #24825674: Add R2020 to meet timing spec #26169957: R2020 to 100ohm (D10x only) I2C1_AP_SCL47 I2C0_AP_SCL 37 47 I2C1_AP_SDA47 21 R2020 2 1 C2013 2 1 C2001 1 PP2002 1 PP2001 1 PP2003 21 R2009 2 1 R2012 2 1 R2007 2 1 R2008 2 1 R2015 21 R2000 V15 V14 J7 F7 G7 F6 G6 N9 M7 L6 L5 P6 M6 R6 G16 H5 M9 R11 L11 P12 M13 N6 N13 P11 P10 P9 M5 N8 N10 M10 N5 P5 G5 K6 L7 L9 K10 K9 J10 J9 H10 H9 G8 F8 G9 F9 G10 G11 H12 G12 G13 F13 F14 G14 F15 F16 L13 L10 K11 J11 H11 N11 M11 N12 M12 H7 N14 N15 N16 M14 M15 M16 L16 L15 L14 K12 K13 J13 K14 K15 K16 J16 J15 J14 K7 L12 J12 U1801 21 Y2001 2 1 R2005 2 1 R2006 2 1 C2006 2 1 R2011 21 XW2001 2 1 C2002 2 1 C2004 2 1 C2003 2 1 C2011 2 1 R2010 2 1 R2004 2 1 R2003 2 1 R2002 2 1C2007 2 1 C2008 2 1 C2009 2 1C2010 2 1 R2001 21 XW2005 21 XW2004 21 XW2002 21 XW2003 FOREHEAD_NTC PMU_ADC_IN SPI_PMU_TO_PMGR_MISO PMU_TO_AOP_CLK32K PMU_VSS_RTC NC_GNSS_TO_PMU_HOST_WAKE PMU_TO_WLAN_REG_ON PMU_TO_BB_USB_VBUS_DETECT PMU_TO_NFC_EN PMU_TO_AP_FORCE_DFUPMU_TO_AP_FORCE_DFU_R PMUGPIO_TO_WLAN_CLK32K AP_TO_PMU_SOCHOT_L RADIO_PA_NTC REAR_CAMERA_NTC PMU_IREF CHESTNUT_TO_PMU_ADCMUX PMU_PRE_UVLO_DET BUTTON_POWER_KEY_L BUTTON_RINGER_A PP1V2_MAGGIE PMU_AMUX_AY BBPMU_TO_PMU_AMUX2 PMUGPIO_TO_WLAN_CLK32K AP_TO_PMU_TEST_CLKOUT TRISTAR_TO_PMU_USB_BRICK_ID AP_NTC PMU_TO_CODEC_DIGLDO_PULLDN PMU_TO_BT_REG_ON NC_PMU_TO_GNSS_EN PMU_TO_NAND_LOW_BATT_BOOT_L NFC_TO_PMU_HOST_WAKE PMU_TO_BBPMU_RESET_R_L BBPMU_TO_PMU_AMUX1 FOREHEAD_NTC_RETURN PMU_XTAL2 PMU_TO_BOOST_EN BT_TO_PMU_HOST_WAKE PMU_AMUX_BY PMU_TO_ACC_BUCK_SW_EN PMU_VREF PMU_TO_AP_PRE_UVLO_L PMU_TO_AP_THROTTLE_GPU_L PMU_TO_AP_THROTTLE_CPU_L AP_VDD_GPU_SENSE AP_VDD_CPU_SENSE TRISTAR_TO_PMU_USB_BRICK_ID PMU_ADC_IN BUTTON_VOL_DOWN_L PMU_TO_AP_BUF_RINGER_A PMU_TO_AP_BUF_POWER_KEY_L PMU_TO_AP_BUF_VOL_DOWN_L TIGRIS_TO_PMU_INT_L BB_TO_PMU_PCIE_HOST_WAKE_L WLAN_TO_PMU_HOST_WAKE PMU_TO_HOMER_RESET_L PMU_TO_LCM_PANICBPMU_VDD_RTC LCM_TO_CHESTNUT_PWR_EN SPI_PMGR_TO_PMU_MOSI SPI_PMGR_TO_PMU_SCLK PP1V8_SDRAM PP1V8_SDRAM AP_NTC_RETURN PMU_TO_BBPMU_RESET_L BUTTON_POWER_KEY_L RCAM_NTC_RETURN PP1V8_ALWAYS PP1V8_SDRAM BUTTON_RINGER_A BUTTON_VOL_DOWN_L PP1V8_ALWAYS PA_NTC_RETURN LCM_TO_MANY_BSYNC AP_TO_PMU_WDOG_RESET TRISTAR_TO_PMU_HOST_RESET AOP_TO_PMU_ACTIVE_REQUEST PMU_TO_SYSTEM_COLD_RESET_L BUTTON_VOL_UP_L AP_TO_PMU_AMUX_OUT ACC_BUCK_TO_PMU_AMUX BBPMU_TO_PMU_AMUX3 PMU_XTAL1 PMU_TCAL AOP_TO_PMU_SLEEP1_REQUEST PMU_TO_AOP_SLEEP1_READY PMU_TO_AOP_TRISTAR_ACTIVE_READY SYSTEM_ALIVE PMU_TO_AOP_IRQ_L I2C_PMU_SDA_R SHORT-20L-0.05MM-SM OMIT ROOM=SOC 100 01005 MF 1/32W 5% ROOM=PMU ROOM=PMU X5R 10% 01005 PLACE_NEAR=U1801:2mm 10V 1000PF X5R ROOM=PMU 01005 1000PF 10V 10% ROOM=SOC SHORT-20L-0.05MM-SM OMIT SM ROOM=SOC P2MM-NSM SM ROOM=SOC P2MM-NSM SM ROOM=PMU P2MM-NSM 0% 1/32W 01005 MF 0.00 NO_XNET_CONNECTION 10K MF 1/32W 5% ROOM=PMU 01005 MF 01005 5% ROOM=PMU 1/32W 220K NOSTUFF 100K ROOM=PMU MF 1/32W 01005 5% NOSTUFF 220K ROOM=PMU MF 1/32W 01005 5% NOSTUFF 1.00K MF 01005 5% 1/32W ROOM=PMU D2333A1WLCSP 32.768KHZ-20PPM-12.5PF CRITICAL ROOM=PMU 1.60X1.00-SM ROOM=PMU 100K MF 1/32W 01005 5% 100K MF 1/32W 01005 5% ROOM=PMU OMIT ROOM=SOC SHORT-20L-0.05MM-SM 0201 6.3V 20% ROOM=PMU X5R 0.22UF ROOM=PMU 1% 200K 201 1/20W MF OMIT ROOM=PMU SHORT-20L-0.05MM-SM 0.22UF 6.3V 0201 X5R ROOM=PMU 20% 22PF 16V 5% 01005 CERM ROOM=PMU 22PF 16V 5% CERM 01005 ROOM=PMU ROOM=PMU NP0-C0G 01005 100PF 5% 16V NP0-C0G 5% ROOM=PMU 01005 16V 100PF 3.92K 0201 0.1% ROOM=PMU 1/20W MF ROOM=PMU 10KOHM-1% 01005 ROOM=PMU 01005 10KOHM-1% ROOM=PMU 10KOHM-1% 01005 5% 01005 ROOM=PMU NP0-C0G 100PF 16V ROOM=PMU NP0-C0G 01005 100PF 5% 16V 5% ROOM=PMU 01005 NP0-C0G 16V 100PF 10KOHM-1% ROOM=PMU 01005 ROOM=SOC SHORT-20L-0.05MM-SM OMIT 20 11 13 19 53 53 53 124 5320 11 37 19 4420 4420 36 4 53 53 20 7 40 20 32 53 17 53 53 23 53 4 27 11 11 12 14 14 4020 20 4420 12 12 12 21 53 53 36 39 39 37 11 11 53 52 48 47 41 40 37 36 32 21 20 18 16 535248 47414037363221201816 53 44 20 212019 535248 47414037363221201816 44 20 44 20 212019 53 39 23 13 7 40 13 13 7 44 12 7 27 53 13 15 13 40 37 13 7 21 17 15 13 NC NC NC PP PP PP NC NC NC NC NC NC NC SYM 3 OF 4 REFS RESETS COMPARATORADC PMGR BUTTONS AMUX GPIO NTCXTAL GPIO3 SHDN RESET* RESET_IN3 RESET_IN2 SLEEP1_REQ CRASH* OUT_32K SLEEP_32K ACTIVE_RDY SYS_ALIVE FORCE_SYNC ACTIVE_REQ SLEEP1_RDY IRQ* SDA SCLK SCL MISO MOSI AMUX_A1 AMUX_A0 AMUX_A3 AMUX_A2 AMUX_A4 AMUX_A5 AMUX_B1 AMUX_B0 AMUX_B2 AMUX_B4 AMUX_B5 AMUX_B6 AMUX_B7 AMUX_B3 AMUX_BY TDEV3 TDEV2 TDEV1 XTAL1 TCAL TDEV5 TDEV4 XTAL2 VDD_RTC RESET_IN1 GPIO21 GPIO17 GPIO18 GPIO19 GPIO20 GPIO16 GPIO15 GPIO14 GPIO12 GPIO13 GPIO11 GPIO10 GPIO6 GPIO8 GPIO7 GPIO9 GPIO4 GPIO5 GPIO2 GPIO1 BUTTON2 BUTTON3 BUTTON4 BUTTONO1 BUTTONO2 BUTTONO3 BUTTON1 AMUX_A6 AMUX_A7 AMUX_AY ADC_IN IBAT VBAT BRICK_ID VDROOP0_DET VDROOP1_DET PRE_UVLO_DET VDROOP0* VDROOP1* PRE_UVLO* IREF VREF 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 22. See Charger C2113 on Pg46 #25112685,Remove Snub TO TRINITY F4: 100 kOhm pullup to VLDO (regulated output voltage) TIGRIS CHARGER #24558610: Change to 100ohm I2C1_AP_SDA47 I2C1_AP_SCL47 21 R2103 2 1 3 Q2102 2 1 C2103 2 1 R2105 2 1C2102 C2 D2 B2 A2 F4 F1 E5 C5 D5 B5 A5 F3 E3 G3 E4 F5 C3 D3 B3 A3 G4 G2 G1 F2 C4 D4 B4 A4 G5 E1 C1 D1 B1 A1 E2 U2101 2 1 C2114 2 1 R2102 21 C2105 B3 B2 B1 A3 A2 A1 C3 C2 C1 Q2101 21 R2104 2 1 C2104 2 1 C2118 2 1 C2117 2 1 C2115 2 1 C2112 2 1 C2111 2 1 C2109 2 1 C2108 2 1 C2110 2 1C2106 2 1 R2101 2 1 C2101 PP5V0_USB PP1V8_ALWAYS PP1V8_SDRAM PP_BATT_VCC TIGRIS_TO_BATTERY_SWI TIGRIS_TO_BATTERY_SWI_1V8 SWI_AP_BI_TIGRIS TIGRIS_BOOT TIGRIS_LDO TIGRIS_VBUS_DETECT TIGRIS_TO_PMU_INT_R_L VBATT_SENSE SYSTEM_ALIVE TRISTAR_TO_TIGRIS_VBUS_OFF TIGRIS_TO_PMU_INT_L TIGRIS_ACTIVE_DIODE USB_VBUS_DETECT TIGRIS_BUCK_LX TIGRIS_PMID PP_VDD_MAIN ROOM=CHARGER 4.2UF 0402-1 10% 16V X5R-CERM 01005 10% 16V CER-X7R 330PF ROOM=CHARGER 01005 10% 16V CER-X7R 330PF ROOM=CHARGER 330PF 16V 10% ROOM=CHARGER 01005 CER-X7R 5% 1/32W 01005 ROOM=CHARGER 100K MF 0402-1 10% 16V X5R-CERM 4.2UF ROOM=CHARGER 100 ROOM=CHARGER 5% 01005 1/32W MF DFN RV3C002UN ROOM=CHARGER 10% 330PF CER-X7R 16V 01005 40.2K MF 1/32W 01005 1% ROOM=CHARGER C0G-CERM 01005 5% 10V 220PFSN2400AB0 ROOM=CHARGER CRITICAL WCSP 10UF ROOM=CHARGER 20% 6.3V CERM-X5R 0402-9 100K 01005 ROOM=CHARGER MF 1/32W 5% NOSTUFF X5R ROOM=CHARGER NO_XNET_CONNECTION 10% 16V 0.047UF 0201 BGA CSD68827W ROOM=CHARGER CRITICAL ROOM=CHARGER 1% MF 1/32W 30.1K 01005 C0G-CERM 01005 5% 10V 220PF ROOM=CHARGER 0201-1 20% 6.3V X5R-CERM ROOM=CHARGER 2.2UF 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=CHARGER 2.2UF 6.3V 0201-1 X5R-CERM ROOM=CHARGER 20% ROOM=CHARGER 16V 10% 330PF CER-X7R 01005 ROOM=CHARGER 4.2UF 10% 16V X5R-CERM 0402-1 40 4 20 19 53 52 48 47 41 40 37 36 32 20 18 16 224 22 12 22 20 17 15 40 20 7 28 53524641403937353433 31282726252319181094 S D SYM_VER_1 G PMID VBUS PGND PGND PGND PGND HDQ_HOST HDQ_GAUGE ACT_DIODE BAT_SNS BAT BAT BAT BAT BUCK_SW BUCK_SW BUCK_SW BUCK_SW BOOT LDO TEST VBUS_DET INT VBUS_OVP_OFF SCL SDA SYS_ALIVE VBUS VBUS VBUS VBUS VDD_MAIN VDD_MAIN VDD_MAIN VDD_MAIN G S D 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE