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I pad 1 full schematic diagram

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Phonefix
Phonefix

iPad 1 schematic diagram for security repair.

Devices & Hardware
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TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. 8 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT 3 B 7 ECNREV BRANCH DRAWING NUMBER REVISION SIZE D PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. DRAWING TITLE THE POSESSOR AGREES TO THE FOLLOWING: Apple Inc. SHEET R DATE D A C THE INFORMATION CONTAINED HEREIN IS THE 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. PAGE NOTICE OF PROPRIETARY PROPERTY: A C 3456 D B 8 7 6 5 4 2 1 12 APPD CK DESCRIPTION OF REVISION TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_HEAD TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM DRAWING TABLE_TABLEOFCONTENTS_HEAD TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM 2/4/2010 PVT K48-DRI VICE MLB 1 OF 119 2010-02-04PRODUCTION RELEASED 1 OF 53 B.0.0 051-8245 B 0000854735 LAST_MODIFIED=Thu Feb 4 00:41:44 2010 AP TVOUT AP RGB/CLCD,CAMERA 12/04/2009 CONFIGURATION OPTIONS ALEX AUDIO: AUDIENCE AUDIO: HP CONN PHYSICAL/SPACING RULES Cross Reference Page Cross Reference Page Cross Reference Page 16 AP NAND & GPIO, NOR AP PWR,AP BB&WIFI FUNC/ICT TEST/BRACKETS 45 TABLE OF CONTENTS11 VICE MLB SYNC MASTER DATECONTENTSCSAPDF 40 AUDIO32 PDF CSA DATESYNC MASTERCONTENTS TITLE=U230 ABBREV=DRAWING 12/04/200942 AUDIO33 AUDIO: DETECT/MIC BIAS 12/04/200943 AUDIO34 09/16/2009MIAMI35 ALS CONNECTOR 12/21/200948 JAMES36 I/O EXPANDER 12/21/200949 JAMES37 DISPLAY PORT SWITCH 12/21/200950 JAMES38 44-PIN LANDSCAPE DOCK CONN 12/21/200951 JAMES39 60-PIN PORTRAIT DOCK CONN 09/16/200954 MIAMI40 BUTTONS CONNECTOR 09/16/200955 MIAMI41 3G CONNECTOR 10/14/200957 MARKSIN42 PROX SENSOR 09/16/200967 MIAMI43 FLASH 09/16/2009100 MIAMI44 CONSTRAINTS 09/16/2009101 MIAMI45 MORE CONSTRAINTS 09/16/2009106 MIAMI46 11347 11448 Cross Reference Page 11549 Cross Reference Page 11650 11751 11852 Cross Reference Page 11953 Cross Reference Page SYSTEM BLOCK DIAGRAM22 05/02/2009 POWER BLOCK DIAGRAM33 12/04/2009MARK 44 08/06/2009MIAMI 55 09/16/2009MIAMI AP MAIN66 12/21/2009JAMES 77 12/21/2009JAMES 88 12/21/2009JAMES 99 12/21/2009JAMES 1010 12/21/2009JAMES 3G AND DEBUG MUXES1111 12/21/2009JAMES AP MISC & ALIASES1212 12/21/2009JAMES MLC1413 09/16/2009MIAMI MLC ALIASES1514 09/16/2009MIAMI Power Conn / Alias1715 12/04/2009MARK DCIN POWER PATH18 12/04/2009MARK CHARGER1917 12/04/2009MARK PMU2018 12/04/2009MARK PMU2119 12/04/2009MARK 3.3V SUPPLY2420 12/04/2009MARK LED BACKLIGHT CONTROLLER2621 12/04/2009MARK DEBUG RESET ACCESS2922 09/16/2009MIAMI GRAPE 1 OF 23023 12/21/2009JAMES GRAPE 2 OF 23124 12/21/2009JAMES LVDS CONNECTOR3225 09/16/2009MIAMI MOTION,GYRO,COMPASS/THERM3426 09/16/2009MIAMI USB MUX/BRK DET3527 09/16/2009MIAMI L61 AUDIO INTERFACE3628 12/04/2009AUDIO AUDIO: SPEAKER AMP3729 12/04/2009AUDIO AUDIO:HEADPHONE OUT3830 12/04/2009AUDIO AUDIO: LINE OUT DOCK ESD CIRCUIT3931 12/04/2009AUDIO
U3009 U3010 Q1954 L5060 LED2900 J4501 U3100 U3000 L3000 D3000 C3001 C3000 U3101 U3003 J5700 J4300 J0510 J0500 U4901 L3906 L4304 L4305 L4306 J5001 J5100 PP1950 PP1900 PP1412 PP1411 TP6700 C5083 L0562 D1810 D1820 J0504 J0503 J0502 J0501 J3700 Q4200 U1400 J5500 U5700 U2601 U0652 U3600 U6710 U6700 U4900 U3007 U3005 U3810 U3800 U4210 U3501 U5500 U1401 U1403 U1402 U3504 U3502 Q1820 Q1810 Q2000 U1820 U1810 L5016 Y0602 Q3500 Q1821 Q1811 Q1490 D5001 C4237 C4236 C4218 C4217 C2112 C2111 C2108 C4300 C4212 C4233 C4514 C4513 C4512 C4511 C4510 C6713 C6703 C4507 C3232 C5500 C5400 C5401 C5402 C5403 C5704 C5701 C3110 C3109 C3108 C3106 C3105 C3103 C3102 C3050 C3041 C3031 C3030 C3021 C3020 C3006 C3814 C4950 C5070 C4211 C4213 C4902 C4903 C4904 C4905 C4506 C4907 C3612 C4906 C6700 C6701 C6710 C6711 C0780 C3610 C3608 C3606 C3603 C3601 C3507 C3506 C3505 C1030 C1014 C5000 C0950 C0951 C2104 C2614 C5140 C3820 C4232 C0813 C0814 C0815 C0816 C0817 C0818 C0819 C0832 C3604 C3852 C3853 C4216 C4234 C4235 C5050 C5051 C5052 C5053 C5054 C5055 C5152C5153 C5154 C5155 C5156 C0870 C0871 C0872 C0873 C3823 C3822 C1810 C5082 C5081 C1820 C5702 C4310 C4214 C2107 C3008 C1922 C1923 C5703 C3850 C3851 C0767 C0801 C0802 C0803 C0804 C0805 C0826 C0850 C0851 C0860 C0861 C0825 C0720 C0721 C0821 C0822 C0823 C0824 C4215 C4230 C4231 C3503 C3600 C3504 C2101 C3206 C2615 C0607 C0613 C3810 C3812C3813 C3811 C3702 C3701 C3712 C3711 C5020 C5120 C5090 C5130 C3107 C2616 C2621 C3233 C3009C3220 C1417 C1413 C3626 C3627 C3628 C4505 C5700 C3112 C3104C3101 C6702 C6712 C3053 C3007 C3005 C5080 C3602 C0769 C0771 C0806 C0807 C0808 C0809 C0810 C0811 C0812 C0827 C0828 C0829 C0830 C0852 C0853 C0854 C0862 C0922 C2103 C1411 C1400 C3622 C3623 C3111 C2613 C0772 C3605 C3607 C3620 C3621 C3191 C3624 C3625 C3630 C3821 C3609 C3611 C4210 C3629 L5403 L5402L5401 L5400 L4514 L4513 L4512 L4511 L4510 L4507 L5500 L4230 L4231 L4301 L4302 L4303 L5009 L5013 L5150L5151 L3820 L3601 FL0902 FL1900 FL5007 FL5008 FL5011 L3905 L3200 L3900 L3901 L5014 L3201 R4953 R3820 R3033 R3031 R3030 R3025R3021 R3020 R4212 R5032 R5002 R5090 R5095 R0950 R5135 R4952 R3173 R3171 R3120 R3099 R5500 R1201 R1499 R1498 R1203 R0677 R1941 R2003 R3605 R3852 R3853 R4000 R4001 R4002 R4003 R5030 R5031 R0952 R0953 R4902 R4903 R4904 R5054 R5131 R5132 R5140 R5141 R5055 R0652 R2110 R0663 R2633 R2634 R3607 R3101 R3032 R3050 R3604 R3703 R3713 R3160 R3155 R3107 R1053 R3600 R4231 R4312 R4320 R1405 R1404 R3602 R4210 R0640 R3603 R3606 R2901 R5000 R4234 R4233 R4214 R4213 R1966 R5190 R0655 R3823 R3822 R3012 R3190 R3066 R4911 R5096 R4931 R1410 R6702 R6701 R6700 R4932 R1403 R1402 R0633 R1408 R4923 R4922R4921 R4920 R5701 R4905 R0877 R0876 R0875 R0874 R0873 R0872 R0871 R0870 R0867 R0866 R0865 R0864 R0863 R0862 R0861 R0860 R0857 R0856 R0855 R0854 R0853 R0852 R0851 R0850 R0721 R0639 R0825 R0827 R0828 R0831 R0832 R0833 R0834 R0836 R1810 R1820 R2031 R3501 R3502 R3520 R3521 R3540 R3541 R3542 R3543 R4900 R5080 R0631 R4901 R2111 R0635 R0636 R0645 R0646 R0647 R2112 R1497 R0662 R2107 R3900 R2902 R4323 R4311 R4322 R4321 R3854 R3855 R5700 R1811 R1821 R3512 R3514 R3515 R3516 R3522 R1406 R3850 R3851 R0651 R0700 R0701 R0705 R4211 R5501 R1005 R1046 R1047 R3601 R0670 R4230 R4232 R1822 R1012 R1050 R1051 R1052 R1407 R2100 R2108 R0622 R0920 R3009 R1800 R2109 XW1800 XW1810 XW1820 XW5000 DZ5070 DZ4230 DZ4231 DZ4301 DZ4302 DZ4303 DZ4304 DZ4305 DZ4306 DZ3900 DZ3901 DZ3905 DZ3906 DZ5400 DZ5401DZ5402 DZ5403 DZ5050 DZ5090 TP1900 J5400 J3201 J3010J3011 L0560 L0561 D0562 D0561 D5000 L5152 L3202L3212L3222L3232 U5000 no_refdes+7 no_refdes+8 no_refdes+9 D0560 U5070 U5050 DZ1950 DZ0600 DZ5095 DZ4901 XW3000 XW4301 XW3602 XW3800 XW3801 XW3601 XW3600 XW1000 XW4300 R2101 R2104 R1823 R5130 C1912 C1911 U1010 U0901 U5100 no_refdes+4 no_refdes+5 no_refdes+6 820-2740-05 TOP 絲印圖
Q1904 Q1900 Q3201 Q1902 Q1903 Q1952 Q1953 Q2601 Q2451 D5100 C2110 C2109 C2461 C2460 C2055 C3241 C3240 C2603 C2411 C5157 C3231 C3230 C1416 C0760 C1925 C2010 C3431 C3430 C4810 C3713 C3703 C4801 C4900 C4901 C4800 C0910 C0909 C0905 C0901 C0900 C0820 C0779 C3203 C1071 C2041 C2038 C1954 C1938 C1904 C1105 C1104 C1101 C1100 C1026 C1015 C0913 C0912 C0911 C3410 C3411 C3402 C3421 C3420 C2102 C5100 C1020 C 1913 C0737 C0738 C0739 C0740 C0741 C0742 C0743 C0744 C0774 C0775 C0776 C0777 C0904 C0906 C5150 C5151 C1956 C1906 C1951 C1901 C0907 C0903 C0630 C0627 C0608 C3401 C0641 C0642 C0644 C0646 C0648 C2054 C0718 C0719 C0724 C0725 C0726C0728 C0729 C0730 C0731C0733 C0735C0727 C0749 C0750 C0751 C0765 C0766 C0800 C0732 C0734 C0736 C0715 C0714 C0713C0712 C0711 C0710 C2030 C0700 C0701 C0702 C0703 C0704 C0745 C0746 C0747 C0748 C0755 C0757 C0784 C0785 C0786 C0787 C0789 C0790 C0791 C0792 C0793 C0798 C0908 C1957 C1907 C2410 C2453 C0618 C1924 C1955 C1905 C3200 C2610 C2011 C2105 C2106 C2047 C0831 C0723 C2620 C2622 C2623 C1415 C1414 C2019 C2020 C2026 C2022 C2023 C2025 C2027 C2609 C1902 C1952 C2611 C3422 C0606 C0705 C0706 C0707 C0708 C0709 C0770 C1028 C2003 C2004 C2005 C2006 C2007 C2008 C2009 C2015 C2016 C2024 C2000 C2028 C2029 C0640 C0643 C0645 C0647 C0921 C0923 C0924 C0925 C0926 C0927 C2050 C2051 C1412 C1410 C1403 C1402 C1401 C2021 C2017 C2018 C0758 C0752 C0753 C0754 C0756 C0773 C2001 C2002 C2035 C2040 C2043 C2036 C2037 C3202 C0722 C1903 C1908 C1909 C1953 C2400 L3400 FL1000 FL1402 FL1401 FL1400 FL0604 FL0900 FL0605 FL0607 FL0901 FL0903 FL0904 FL0905 FL0906 FL0907 FL0606 R4951 R3200 R3201 R5102 R5103 R4950 R2410 R0760 R3420 R1131 R1130 R1202 R1200 R0786 R0650 R0661 R0691 R1103 R1105 R1901 R1915 R1920 R1951 R1965 R4801 R4802 R3422 R3423 R2000 R5133 R5134 R5150 R5151 R2601 R2609 R2616 R2623 R2632 R2020 R0680 R0681 R0664 R0602 R3400 R3401 R3700 R1008 R2900 R5100 R1916 R1101 R2400 R2603 R2604 R2605 R2606 R2608 R2617 R2044 R4910 R3204 R5110 R1964 R4820 R0630 R0632 R0665 R1100 R1104 R1106 R1905 R1912R1914 R1955 R1962 R3205 R4800 R4803 R4805 R4806 R4807 R4808 R4809 R3421 R0720 R1154 R1155 R5157 R2625 R2613 R2614 R2618 R2620 R2450 R2406 R2408 R2622 R0637 R0638 R0750 R0826 R2636 R0617 R1902 R1930 R3210 R3211 R2626 R2615 R2624 R2635 R2600 R2402 R2451 R2403 R2043 R0702 R0703 R0704 R2113 R0671 R1906 R1956 R1003 R1004 R1043 R2405 R0624 R0625 R0627 R0628 R0629 R2610 XW2000 XW2001 XW2002 XW3701 XW3700 XW3711 XW3710 DZ1900 DZ2100 DZ4900 XW0740 XW2600 XW2601 XW1920 XW1900 R2102 R2103 C 1910 C2056C2403 U1009 U4801 no_refdes+1 no_refdes+2 no_refdes+3 L2600 L2400 Q2603 U1900 U1950 U3700 U3710 J0520 Q1901 Q1951 Q2600 U3420 J1900 C3715C3705 C3704C3714 DZ1800 C2045 D2000 U2000 U4800 U0808 U1101 U1100 U1105 U1104 Q3200 Q2450 C3752 C3751 C3750 C3753 C2401 C1404 C0902 C2606 C3204 C2451 C2405C2402 C2608 C2600 C2408 C2612 C2409 C3400 C2607 C2601 C2044 C2046 C2452 C2039 F1900 L1900 L1950 L2001 L2002 R1940 R2621 R1401 R4822R4821 R0688 R1910 R1960 R1913 R1963 R1903 R1953 R3203 R2453 R1911 R1961 R0642 R1904 R1954 R2627R2628 R2602 R2452 R2404 R2401 R2409 R0689 R2019 R2021 R2042 R1921 R1907 R1900 R1950 R2630 R2631 R2629 R2611 R2607 U3430 U3410 U3400 Y2100 C1900 C1950 C2602 U2600 C2605 D2600 Q2602 U2400 Q2400 Q2005 L2003 U2001 820-2740-05 BOTTOM 絲印圖
II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PAGE 30-31 GRAPE/GROUNDHOG VICE BLOCK DIAGRAM PG7 I2S0 DISPLAYPORT PAGE 10 VIDEO AMP AMANDA PMU PAGE 20 PORTRAIT 4099 PAGE 19 PG9 P39 PG7 PAGE 49 DP MUX COMPOSITE MICROPHONE P39 STERO SPEAKERS MIKEY L. P42 AMP P37 AMP P37 IO EXPANDER PAGE 20 PAGE 34 COMPASS PG10 I2C2 MOTION SENSOR PAGE 34 MIPI->LVDS PAGE 14-15 MLCMIPI COMP/SVIDEO COMPOSITE PAGE 34 GYRO SENSOR ALS SENSOR PAGE 45 CAMERA SENSOR FLEX H3P PAGE 50 L. DOCK PG 36 PAGE 19 I2S AUDIO SPI1 LVDS LCD PANEL PAGE 51 I2C0 PG 8 USB2.0 P. DOCK PAGE 50 L. DOCK P. DOCK PAGE 51 I2S2 PG 7 MDDR FMI0-1 SPI0 FLASH 8MBIT SERIAL BOOT VIDEO AMP PG 67 NAND FLASH ON STATE 256MB LAND. 4099 P32 POWER PLANE Voltage Rails 8/16/32/64 PG8 COMP/SVIDEO UART4 UART1 SPI2 PAGE 55 X15 MODULE HIGHWAY BOARD I2S1 PAGE 51 HIGHWAY BOARD X7 AIRPORT +BT UART3 SDIO USB2.0 PG6 CIRRUS L61 PG 35 USB DOCK MUX USB2.0 PG 11 SERIAL BUFF/MUX UART0HEADSET L UART JTAG/UART PAGE 10 PAGE 57 PROX SENS. SYSTEM BLOCK DIAGRAM SYNC_MASTER=ALEX SYNC_DATE=05/02/2009 2 OF 119 B.0.0 051-8245 2 OF 53
II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 DC INPUT PATH LTC3442 BUCK/BOOST 3V3 POWER EN EN POWER BLOCK DIAGRAM EN EN B9 ADAPTER (5V) PAGE 19 LTC4099 PAGE 19 BUCK / CHARGER 3.0-4.2V BATTERY PACK VCC_MAIN/3.0-4.7V PAGE 24 LED DRIVER APP001 BOOST PAGE 26 LED/0.12A GRAPE POWER BOOST 18V/1MA LDOS USB (5V) USB(5V) 3V3/1.2A BUCK / CHARGER LTC4099 TPS61045 PAGE 30 1.2V POWER RP200Z121D LDO PAGE 20 1.2V/0.3A BUCKS1V8/1.5A MAX CORE/2.0A MAX ASHLEY PAGE 20-21 3V3_LAND_ACC/0.15A MAX 1V2_H3/0.30A MAX 3V0_IO/0.10A MAX 3V1_AUDIO/0.25A MAX 3V0_VIDEO/0.10A MAX 3V0_OPTICAL/0.05A MAX 3V3_PORT_ACC/0.15A MAX 3V0_LCD/0.01A MAX 3V0_GRAPE/0.15A MAX 3V0_HP_BIAS/0.20A MAX 1V8_ALWAYS/0.002A MAX 1V1_H3_PHY/0.10A MAX 1V7_VA_VCP/0.10A MAX SYNC_DATE=12/04/2009SYNC_MASTER=MARK POWER BLOCK DIAGRAM 3 OF 119 B.0.0 051-8245 3 OF 53
TABLE_5_ITEM BOM OPTIONSBOM GROUP TABLE_BOMGROUP_HEAD TABLE_BOMGROUP_ITEM TABLE_5_ITEM REFERENCE DESIGNATOR(S) BOM OPTION TABLE_5_HEAD QTY DESCRIPTIONPART# REFERENCE DESIGNATOR(S) BOM OPTION TABLE_5_HEAD QTY DESCRIPTIONPART# TABLE_5_ITEM REFERENCE DESIGNATOR(S) BOM OPTION TABLE_5_HEAD QTY DESCRIPTIONPART# TABLE_BOMGROUP_ITEM TABLE_5_ITEM TABLE_5_ITEM II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM Page Notes BOM OPTIONS PRODUCTION JTAG_5_WIRE JTAG_2_WIRE DPMUX SCH AND BOARD P/N ADD DEVELOPMENT AND OTHER BOMS ONCE YOU GET BOM NUMBERS 16GB_FLASH_TOSH 16GB_FLASH 8GB_FLASH 8GB_FLASH_SAM BKLT_PLL CAMERA DEVELOPMENT AUD10 32GB_FLASH_SAM MIKEY LINE_OUT_2 LINE_OUT_1 PORTRAIT_DOCK (NONE) BOM options provided by this page: COMMON INTERNAL_MIC LANDSCAPE_DOCK LEFT_HS SPEAKER USE SCHUTIL BOMCONFIG TO GENERATE CONFIG FILE. PUT CONFIG FILE AT SAME LEVEL AS .CPM FILE USE "READ BOM-CONFIG" BUTTON ON DMS TO READ IN BOMS BOM OPTIONS ALTERNATE (NONE) ALL AVAIL BOM OPTIONS PROGRAMMABLE PARTS Signal aliases required by this page: 32GB_FLASH USE 825-6447 NEED MORE LINE ITEMS FOR OTHER CONFIGURATIONS Power aliases required by this page: VICE BARCODE LABEL/EEE CODES CRITICAL EEE_32G_MEEE FOR 639-0599 (32G)M1825-7456 EEE_D62 CRITICAL1 EEE_16G_MEEE FOR 639-0602 (16G)M825-7456 EEE_D67 CRITICALEEE FOR 639-0601 (32G) EEE_32G1825-7456 EEE_D66 CRITICAL EEE_64GEEE FOR 639-0598 (64G)1825-7456 EEE_D61 CRITICAL EEE_16GEEE FOR 639-0455 (16G)1825-7456 EEE_BWY SYNC_DATE=08/06/2009SYNC_MASTER=MIAMI CONFIGURATION OPTIONS 1 DEV,VICE,MLB,K48M DEV1 K48M_DEV085-1133 1 DEV,VICE,MLB,K48 DEV1 K48_DEV085-1028 BASIC COMMON,ALTERNATE 1 PCB1PCBA,VICE,MLB,K48820-2740 SCHEM,VICE,MLB,K48051-8245 SCH11 AUDIO LEFT_HS,SPEAKER,INTERNAL_MIC CRITICAL EEE_64G_MEEE FOR 639-0600 (64G)M825-7456 1 EEE_D63 4 OF 119 B.0.0 051-8245 4 OF 53
II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 CRITICAL MLB-MNT-TAB-K48SM CRITICAL TOP-SM SHLD-K48-FENCE-MLB-TOP CRITICAL BOT-SM SHLD-K48-FENCE-MLB-BOT TH SL-1.2X0.40-1.95X1.15 NOSTUFF NOSTUFF TH SL-1.2X0.40-1.95X1.15 TH SL-1.2X0.40-1.95X1.15 NOSTUFF TH SL-1.2X0.40-1.95X1.15 NOSTUFF SYNC_MASTER=MIAMI SYNC_DATE=09/16/2009 FUNC/ICT TEST/BRACKETS J0501 1 J0502 1 J0503 1 J0504 1 J0500 1 2 3 4 J0510 1 J0520 1 5 OF 119 B.0.0 051-8245 5 OF 53
HSIC_VDD121 HSIC_VDD122 PLL0_AVDD11 USB_BRICKID USB_VBUS USB_DM USB_DP USB_ANALOGTEST USB_REXT HSIC_DVDD FUSE1_FSRC CFSB DDR1_CKEIN HSIC_DVSS HSIC_VSS121 HSIC_VSS122 PLL0_AVSS11 PLL1_AVSS11 PLL2_AVSS11 PLL3_AVSS11 USB_DVSS USB_VSSAC USB_VSSA0 USB_ID EHCI_PORT_PWR2 EHCI_PORT_PWR1 EHCI_PORT_PWR0 USB11_D- HSIC2_STB HSIC1_DATA RESETN TESTMODE JTAG_TRSTN JTAG_SEL JTAG_TMS JTAG_TCK JTAG_TRTCK JTAG_TDO JTAG_TDI TST_CLKOUT TST_STPCLK WDOG XI0 XO0 USB_VDD330 USB_DVDD PLL2_AVDD11 PLL3_AVDD11 PLL1_AVDD11 USB11_D+ HSIC2_DATA HSIC1_STB SYMBOL 1 OF 9 GPIO6 GPIO2 SMII_SRDY SMII_RRDY SMII_SYNC SMII_TXD GPIO3 GPIO1 GPIO17 GPIO16 SENSOR_RST SENSOR_CLK GPIO_3V1 GPIO38 GPIO_3V0 GPIO36 GPIO37 GPIO35 GPIO34 GPIO33 GPIO31 GPIO32 GPIO30 GPIO28 GPIO29 GPIO26 GPIO27 GPIO25 GPIO24 GPIO23 GPIO21 GPIO22 GPIO20 GPIO19 GPIO18 GPIO15 GPIO14 GPIO13 GPIO11 GPIO12 GPIO10 GPIO8 GPIO9 GPIO7 GPIO5 GPIO4 GPIO0 SMII_CLK SMII_RXD SMII_PWR SMII_WAKE SMII_CLKSEL1 SMII_CLKSEL0 TMR32_PWM2 TMR32_PWM1 TMR32_PWM0 SPDIF SYMBOL 6 OF 9 PART NUMBER ALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS: TABLE_ALT_HEAD TABLE_ALT_ITEM II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 (NOSTUFF FOR SCAN DUMP CONFIG) 3.0V (INT PD) (INT PD) (INT PD) (INT PD) (INT PD) (INT PD) (INT PD) 3.0V (INT PD) PER MICHAEL FRANK (EMAIL 2/25/09) EHCI_PORT_PWR[0-2] NOT USED (INT PD) (INT PU) (INT PU) (INT PU) 1.2V 0 - PARALLEL JTAGSEL PER RADAR #6755237 1 - DAISY-CHAIN (FOR USE WITH 5-WIRE JTAG) (INT PD) 22 MF 5% 1/20W 201 0201-1 80-OHM-0.2A-0.4-OHM 10% 10V 201 X5R 0.01UF 0.01UF 10% 10V X5R 201 1% 201 MF 10K 1/20W 18PF NP0-C0G 201 25V 5% 5% 18PF 201 NP0-C0G 25V 1/20W 1% MF 201 1M CRITICAL SM-2 24.000MHZ-16PF-60PPM MF 201 1% 100K 1/20W 16V X7R 1000PF 10% 201 MF 220K 1/20W 201 1% 220K 1/20W 201 1% MF 201 MF 1% 1/20W 42.2K 0 FBGA H3P 256MB-DDR-FC CRITICAL 5% 0 201 1/20W MF MF 1/20W 201 1% 100K 44.2 1% 1/20W MF 201 0.01UF X5R 10% 201 10V 10% 1UF 402 CERM 6.3V 100K JTAG_TAP H3P 256MB-DDR-FC FBGA CRITICAL 201 MF 1% 100K 1/20W MF 1/20W 201 100K 1% 100K 1% 201 1/20W MF 1% 201 MF 100K 1/20W X5R 10% 201 10V 0.01UF 0.01UF X5R 10V 10% 201 0 0 JTAG_TAP_NOT MF 1/20W 5% 0 201 NOSTUFF 0 201 0 201 1/20W 1% MF 201 84.5K 6.3V CERM 402 1UF 10% 10V 201 10% X5R 0.01UF 6.3V CERM 402 1UF 10% 80-OHM-0.2A-0.4-OHM 0201-1 X5R 10% 201 10V 0.01UF 10% 1UF 402 CERM 6.3V 0201-1 80-OHM-0.2A-0.4-OHM 0.01UF X5R 201 10V 10% CERM 10% 1UF 402 6.3V 0201-1 80-OHM-0.2A-0.4-OHM 100K 100K 100K MF 1/20W 201 100K 1% 1% 100K 201 1/20W MF 1% 100K 201 1/20W MF MF 1/20W 201 100K 1% MF 1/20W 201 100K 1% 0 0 3.92K NOSTUFF 201 1% 1/20W MF 100K GDZ-0201 GDZT2R5.1B AP MAIN SYNC_DATE=12/21/2009SYNC_MASTER=JAMES U0652 HYNIX DDR339S0100 339S0084 PP1V1_PLL3_F 0.6MM 0.2MM PP1V1_PLL1_F 0.6MM 0.2MM 0.6MM 0.2MM PP1V1_PLL0_F =PP1V1_HSIC =PP1V2_HSIC GRAPE_RESET_N AP_GPIO29_BOARD_ID_3 FORCE_DFU AP_GPIO25_BOARD_ID_1 COMPASS_RST_L AUD_MIKEY_ENA GPS_STANDBY_L AP_GRAPE_HOST_INT_N PP1V1_PLL2_F 0.6MM 0.2MM GYRO_INT_L USB_VBUS VBUS_P USB_BRICKIDAP_USB_BRICKID L61_6MHZ_REFCLKAP_6MHZ_REFCLK 0.2MM 0.6MM PPVDD330_USB_AP =PP1V1_PLL =PP1V1_USB KEEPACT TP_AUDIENCE_RESET_L RESET_L61_N PMU_IRQ_L IPC_SRDY RESET_DET_N BB_RST RADIO_ON AP_DDR1_CKEIN_1V2 RESET_L AP_DDR1_CKEIN AP_CFSB MLC_RESET_L =PP3V3_H3_USB 24M_O XTAL_24M_I XTAL_24M_O NC_HSIC1_STB NC_HSIC2_DATA NC_USB11_DP AP_TST_STPCLK TP_TST_CLKOUT AP_TDI NC_AP_TDO NC_AP_RTCK AP_TCK AP_TMS AP_TESTMODE NC_HSIC1_DATA NC_HSIC2_STB NC_USB11_DM TP_USB_ID USB_REXT TP_USB_ANALOGTEST USB_DP USB_DM =PP3V3_H3_USB =PP3V0_IO_USB PORT_USB_CHINA_DET AUD_VOL_UP_L AUD_VOL_DOWN_L ONOFF_L IO_XPNDR_INT_L TP_CAM_SHUTDOWN_L TP_CAM_CLK TP_CAM_EN ACCEL_INT2_L PORT_DOCK_VIDEO_AMP_EN ACCEL_INT1_L ALS_INT_L COMPASS_INT_L LO_LS_REF_SEL AP_GPIO32_4_DIAG GPS_SYNC DFU_STATUS CODEC_IRQ_N GRAPE_FW_DNLD_EN_L LAND_USB_CHINA_DET BT_WAKE AUD_SPKRAMP_MUTE_N RINGER_A HOME_L BACKLIGHT_EN PROX_INT_L IO_XPNDR_RST_L GPS_RESET_L HOME_L =PP1V8_SDRAM_H3 =PP1V8_ALWAYS AP_TCK AP_TMS AP_TDI =PP1V8_H3 AP_GPIO28_BOARD_ID_2 PORT_DK_DDIS_CHG LAND_DK_DDIS_CHG DP_SW_SEL DP_SW_SHUTDOWN_L USB_MUX_OE_L USB_MUX_SEL AP_JTAG_SEL RESET_1V8_N AP_WDOG PMU_RESET_IN AP_GPIO39_BRD_REV0 AP_GPIO40_BRD_REV1 AP_GPIO41_BRD_REV2 AP_PT_DK_ADPTR AP_LD_DK_ADPTR FORCE_DFU DFU_STATUS COMPASS_RST_L KEEPACT RADIO_ON AP_TRSTN =PP1V8_H3 =PP1V8_SDRAM_H3 ONOFF_L =PP1V8_SDRAM_H3 RINGER_A JTAG_TRSTN_CTRL R06401 2 FL0604 1 2 C06271 2 C06301 2 R06171 2 C0607 1 2 C06131 2 R0655 1 2 Y0602 2 4 1 3 R0632 1 2 C06181 2 R0670 1 2 R0671 1 2 R06881 2 R0691 1 2 U0652 V26 N7 Y10 Y9 AA9 F19 P25 R25 M27 M26 L27 L26 N17 N18 N16 N19 C18 B15 A19 C19 D18 B18 D19 E14 E15 D13 E13 F15 F14 N23 N24 B19 F23 K20 J20 R27 R26 N20 R23 P27 P26R20 R21 R22 N21 N25 P22 R24 N22 F22 B12 A12 R0650 1 2 R0651 1 2 R06421 2 C06081 2 C06061 2 R0662 1 2 U0652 F6 B6 C5 C9 C6 D6 F5 E5 F9 F3 F4 C10 B7 F10 E10 A4 B4 E4 E2 D10 E9 L2 G1 D9 G2 E3 B3 A3 B2 H2 L1 H1 E1 D5 A6 A7 B9 E6 A9 W24 W25 W20 V21 K23 K18 K19 H19 K21 J18 K22 G19 G18 J19 R18 AB25 AB27 AB26 R0665 1 2 R06301 2 R06311 2 R06331 2 C06421 2C06411 2 R06641 2 R0602 1 2 R0652 1 2 R0681 1 2 R0680 1 2 R06891 2 C06401 2 C06441 2 C06431 2 FL0605 1 2 C06461 2 C06451 2 FL0606 1 2 C06481 2 C06471 2 FL0607 1 2 R0647 1 2 R0646 1 2 R0645 1 2 R06351 2 R06361 2 R06371 2 R06381 2 R06391 2 R06771 2 R07861 2 R0624 1 2 R07211 2 DZ0600 1 2 6 OF 119 B.0.0 051-8245 6 OF 53 15 15 23 12 622 12 62635 33 41 23 26 16 19 27 2815 15 619 28 19 41 41 12 641 1939 13 615 61244 12 63944 63944 27 44 27 44 6 15 15 27 40 40 61940 1936 26 10 26 35 2635 30 41 6 28 23 27 39 29 61940 61939 21 42 36 41 61939 6815 1519 6 39 44 6 39 44 6 12 44 679121537 12 17 17 37 37 27 27 12 12 19 12 12 12 12 12 6 22 6 6 26 35 6 19 6 41 12 679121537 6815 61940 6815 61940 12
SDIO0_DATA0 SDIO0_DATA1 SDIO0_DATA2 I2S0_BCLK I2S0_DIN I2S0_DOUT I2S0_LRCK I2S0_MCK SDIO0_CLK SDIO0_CMD SDIO0_DATA3 SPI0_SCLK SPI0_MOSI SPI0_MISO SPI0_SSIN SPI1_SCLK SPI1_MOSI SPI1_SSIN SPI1_MISO SPI2_SCLK SPI2_MOSI SPI2_MISO SPI2_SSIN I2S1_DIN I2S1_DOUT I2S1_BCLK I2S1_LRCK I2S1_MCK I2S2_DIN I2S2_DOUT I2S2_BCLK I2S2_LRCK I2S2_MCK I2C0_SDA I2C0_SCL I2C1_SDA I2C1_SCL I2C2_SDA I2C2_SCL SYMBOL 5 OF 9 UART6_CTSN UART6_RTSN UART6_RXD UART6_TXD UART5_RTXD UART4_CTSN UART4_RXD UART4_TXD UART3_CTSN UART2_RTSN UART1_RTSN UART1_RXD UART1_TXD UART0_TXD UART0_RXD UART1_CTSN UART3_RTSN UART4_RTSN UART3_RXD UART3_TXD UART2_CTSN UART2_RXD UART2_TXD SYMBOL 7 OF 9 DDR0VDDQ DDR1VDDQ VDDIO30 VDDIOD5 VDDIOD4 VDDIOD3 VDDIOD2 VDDIOD1 VDDIOD0 VDDIO18 VDDIOD VSS VDD SYMBOL 8 OF 9 SI VCC GND SCK CS* HOLD* NC WP* SO II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 (3.0V - FMI0_CEN[4-5],ENET) I/O (GPIO_3VX,UART0,CFSB,USB11) BASE PKG 1.8V SERIAL FLASH (PU IN H3) (3.3V - FMI1) (3.3V - FMI0) (INT PU) RETENTION MDDR CKE PLACE THE 27PF IN PAIRS AROUND THE IC I/O BOTTOM PKG (1.2V) MDDR I/O (3.0V - I2C2) (3.0V - SMII) (3.0V - UART4) PLACE THE 27PF IN PAIRS AROUND THE IC 40 PINS 1.2V - 1GHZ 1.1V - 800MHZ CORE 3.0V 3.0V PLACE NEAR U0652 20% 201 4V CERM-X5R-1 0.47UF 201 4V CERM-X5R-1 20% 0.47UF 201 4V CERM-X5R-1 20% 0.47UF 201 4V CERM-X5R-1 20% 0.47UF 201 4V CERM-X5R-1 20% 0.47UF 6.3V 20% 603 X5R 10UF 20% 6.3V X5R 603 10UF 27PF NP0-C0G 25V 201 5% 25V 5% 27PF NP0-C0G 201 25V 5% 27PF NP0-C0G 201 5% 25V 201 NP0-C0G 27PF X5R 0.1UF 6.3V 201 10% 0.1UF 201 10% 6.3V X5R 20% X5R 6.3V 201 0.22UF 20% 6.3V 201 X5R 0.22UF 6.3V 20% X5R 201 0.22UF X5R 20% 6.3V 201 0.22UF 201 20% 6.3V X5R 0.22UF 6.3V 201 20% X5R 0.22UF 6.3V 603 X5R 20% 10UF 201 4V CERM-X5R-1 0.47UF 20% 201 4V CERM-X5R-1 0.47UF 20% 201 4V CERM-X5R-1 0.47UF 20% 201 20% 4V CERM-X5R-1 0.47UF 6.3V 20% X5R 201 0.22UF 6.3V 20% X5R 201 0.22UF 6.3V 20% X5R 201 0.22UF X5R 201 20% 6.3V 0.22UF 201 20% X5R 6.3V 0.22UF 20% 6.3V X5R 201 0.22UF 20% X5R 6.3V 201 0.22UF 6.3V X5R 20% 201 0.22UF X5R 20% 6.3V 201 0.22UF 20% X5R 6.3V 201 0.22UF 201 4V CERM-X5R-1 0.47UF 20% 201 4V CERM-X5R-1 0.47UF 20% 201 4V CERM-X5R-1 0.47UF 20% 201 4V CERM-X5R-1 0.47UF 20% 201 4V CERM-X5R-1 0.47UF 20% 201 4V CERM-X5R-1 0.47UF 20% 201 4V CERM-X5R-1 0.47UF 20% 201 4V CERM-X5R-1 0.47UF 20% 201 4V CERM-X5R-1 0.47UF 20% 201 4V CERM-X5R-1 0.47UF 20% 201 4V CERM-X5R-1 0.47UF 20% 201 4V CERM-X5R-1 0.47UF 20% SM NOSTUFF CERM 6.3V 10% 1UF 402 1UF CERM 402 6.3V 10% 402 6.3V 10% CERM 1UF CERM 402 1UF 10% 6.3V 402 6.3V 10% 1UF CERM 1UF CERM 402 10% 6.3V 1UF CERM 402 6.3V 10% 1UF CERM 402 10% 6.3V 603 6.3V 20% X5R 10UF 10UF 603 6.3V X5R 20% 20% X5R 6.3V 603 10UF 20% X5R 6.3V 201 0.22UF 0.22UF 201 6.3V X5R 20% 0.22UF 201 20% 6.3V X5R 5% 25V NP0-C0G 201 27PF 201 NP0-C0G 25V 5% 27PF 201 NP0-C0G 5% 25V 27PF 201 NP0-C0G 5% 25V 27PF NP0-C0G 201 25V 5% 27PF 5% 201 NP0-C0G 25V 27PF NP0-C0G 5% 25V 201 27PF 201 5% 25V NP0-C0G 27PF CRITICAL H3P FBGA 256MB-DDR-FC 1% 1K 1/20W MF 201 1% 1K 1/20W MF 201 1/20W 1K 201 1% MF 1/20W 1% 1K MF 201 1% 1K 1/20W MF 201 1% 1/20W 1K MF 201 CRITICAL FBGA H3P 256MB-DDR-FC CRITICAL 256MB-DDR-FC H3P FBGA 201 6.3V X5R 20% 0.22UF 201 6.3V X5R 20% 0.22UF X5R 6.3V 201 20% 0.22UF X5R 6.3V 201 20% 0.22UF 33 201 MF 1/20W 1% 10% 201 0.1UF 6.3V X5R CRITICAL SERIAL-SPI-8MB-1.8V WLCSP11 AT25DF081UUN 20% 0.22UF 201 X5R 6.3V 20% 0.22UF 201 X5R 6.3V 100K 201 MF 1/20W 1% 201 20% 6.3V X5R 0.22UF0.22UF 201 6.3V X5R 20% 10UF 603 6.3V X5R 20% 4.7UF 20% 6.3V 402 X5R 402 6.3V 20% 4.7UF X5R-CERM201 6.3V X5R 20% 0.22UF0.22UF 20% X5R 6.3V 201 MF 1/20W 100K 1% 201 MF 1/20W 201 0 5% 5% 82PF 0201 CERM 25V AP PWR,AP BB&WIFI SYNC_MASTER=JAMES SYNC_DATE=12/21/2009 =PP1V8_H3 I2C2_SCL_3V0 =PP3V0_IO_H3 I2C2_SCL_3V0 WLAN_SDIO_CLK H3_SDIO_CLK H3_SDIO_CLK FLASH_DOUT IPC_SCLK =PP1V8_H3 I2C0_SCL_1V8 I2C1_SDA_1V8 I2C1_SCL_1V8 I2C2_SDA_3V0 WLAN_SDIO_CMD WLAN_SDIO_DATA<3> WLAN_SDIO_DATA<2> WLAN_SDIO_DATA<1> FLASH_CLK FLASH_DIN I2C1_SCL_1V8 I2C2_SDA_3V0 I2C0_SCL_1V8 I2S1_MCK AP_UART6_CTS_L AP_UART6_RTS_L AP_UART6_RXD AP_UART6_TXD AP_UART2_TXD AP_UART3_CTS_L FLASH_CS_N AP_UART4_RXD BB_USART0_RXD_CTRL AP_UART2_RXD AP_UART1_CTS_L AP_UART1_TXD AP_UART0_RXD SFLASH_DOUT AP_UART3_TXD =PP1V8_NOR_FLASH I2S1_DOUT I2S0_DOUT I2S0_DIN =PP1V2_SDRAM_MDDR =PP1V2_VDDIOD_H3 TP_I2S0_MCK BB_I2S2_WA0 MAKE_BASE=TRUE BB_I2S2_CLK MAKE_BASE=TRUE BB_I2S2_RX MAKE_BASE=TRUE BB_I2S2_TX MAKE_BASE=TRUE =PP3V0_IO_H3 PPVCORE_FB =PPVCORE_H3 IPC_MISO IPC_MOSI AP_GRAPE_CS_N AP_GRAPE_MISO AP_GRAPE_MOSI AP_GRAPE_SCLK WLAN_SDIO_DATA<0> =PP3V0_IO_H3 IPC_MRDY BATTERY_SWI AP_UART4_TXD AP_UART1_RTS_L AP_UART1_RXD AP_UART0_TXD AP_UART3_RTS_L AP_UART3_RXD UMTS_RXD_CTRL FLASH_CS_N FLASH_DOUT FLASH_DIN FLASH_CLK MLC_WC_L PROX_GPIO I2S1_LRCLK I2S0_LRCLK I2S0_BCLK I2C0_SDA_1V8 TP_I2S2_MCK I2S2_LRCK I2S2_DOUT I2S2_DIN I2C1_SDA_1V8 I2S1_DIN I2S2_BCLK I2C0_SDA_1V8 I2S1_BCLK =PP3V3_NAND C0704 1 2 C0703 1 2 C07021 2 C0701 1 2 C07001 2 C07531 2 C07541 2 C07371 2 C07381 2 C07391 2 C07401 2 C07801 2 C07791 2 C07311 2 C0732 1 2 C07331 2 C07341 2 C0735 1 2 C07361 2 C07521 2 C07451 2 C07461 2 C07471 2 C07481 2 C07491 2 C07501 2 C07511 2 C0728 1 2 C0727 1 2 C0726 1 2 C0725 1 2 C0724 1 2 C0729 1 2 C07301 2 C0787 1 2 C0786 1 2 C07851 2 C07841 2 C07571 2 C07551 2 C0798 1 2 C0789 1 2 C0790 1 2 C0791 1 2 C0792 1 2 C07931 2 XW0740 1 2 C07051 2 C07061 2 C07071 2 C07081 2 C07091 2 C07691 2 C07701 2 C07711 2 C07561 2 C07721 2 C07731 2 C07651 2 C07661 2 C07671 2 C07441 2 C07431 2 C07421 2 C07411 2 C07741 2 C07771 2 C07761 2 C07751 2 U0652 AB5 AB6 AB3 AB4 AC15 AD15 V23 W21 W22 V18 V20 V25 V24 W19 V15 AB22 Y26 R17 R16 AB23 W23 J21 K25 J24 J25 J26 J27 V6 W7 V4 W3 U2 W8 V3 V2 V7 AA1 AA2 W6 R07001 2 R07011 2 R07021 2 R07031 2 R07051 2 R07041 2 U0652 V27 Y27 Y1 V1 Y2 U1 V9 V10 W5 V5 AD5 R1 P3 R3 AD1 W4 AD6 AD2 V8 AC4 AC3 AC6 AC5 U0652 F13 N6 J10 J12 J13 J14 J15 J16 J17 J9 K10 K12 K9 L10 L12 L13 L14 L15 L16 L17 L9 M10 M12 M9 N10 N12 N13 N14 N15 P10 P12 R10 R12 R14 T10 U12 T12 T13 T14 T15 T16 T17 A10 A16 F1 N1 V22 W10 AB10 AC10 AD10 AE10 T21 U27 AB15 W18 AD22 V19 F18 H18 G13 H10 H9 J6 J7 J8 K8 N8 R8 A1 A18 AF10 AB13 AE9 AF1 AF11 AF23 AF16 AF17 AF2 AG1 C15 AG12 AB14 AF24 AF27 AF4 AF7 AG2 B10 B11 B16 A2 B17 AG23 AG26 AG27 B1 B20 B21 B5 B24 B26 A23 B27 C2 B8 C11 C17 D26 D11 D17 D2 E11 AD26 F26 E17 F11 F17 F2 G10 G11 G15 H17 H26 AE22 G17 G9 H11 H13 H15 J1 J11 J2 J3 J4 AD9 K13 J5 K11 A26 A27 AA17 AA10 AA11 AA15 AA26 AE17 AB2 AB11 AB17 AC11 AB9 AC13 AC17 AC2 AC9 AD11 AE2 AD17 C07151 2 C07141 2 C07131 2 C07121 2 R0826 1 2 C08201 2 U0808 B3 E3 C2 A4 F1 F4 D2 E2 C3 B2 D3 C07181 2 C07191 2 R07201 2 C07211 2 C07201 2 C07221 2 C07231 2 C07581 2 C07111 2 C07101 2 R07501 2 R0760 1 2 C07601 2 7 OF 119 B.0.0 051-8245 7 OF 53 6 7 9 12 15 37 71213172635 711131537 7 12 13 17 26 35 3945 7 7 7 41 679121537 717192628333644 744 744 7121317263544 3945 3945 3945 3945 7 712 7 44 7 12 13 17 26 35 44 7 17 19 26 28 33 36 44 12 12 12 12 12 11 12 7 12 11 11 11 11 12 12 15 12 44 12 12 8 15 15 41 41 41 41 7 11 13 15 37 18 15 41 41 23 23 23 23 3945 7 11 13 15 37 41 17 19 12 11 11 12 12 12 11 7 7 712 7 14 42 12 44 12 12 7 17 19 26 28 33 36 44 7 44 12 44 717192628333644 12 44 8 15 43
VSS VDD_MEM VDDQ SYMBOL 9 OF 9 FMI0_CEN3 FMI0_CEN2 FMI0_IO7 FMI0_IO2 FMI0_IO0 FMI0_IO1 FMI0_IO4 FMI0_IO5 FMI0_IO6 FMI0_CEN1 FMI0_CEN0 FMI0_IO3 FMI0_CEN5 FMI0_CEN4 FMI0_CLE FMI0_ALE FMI0_WEN FMI0_REN FMI1_CEN0 FMI1_CEN1 FMI1_CEN2 FMI1_CEN3 FMI1_CEN4 FMI1_CEN5 FMI1_CEN6 FMI1_CEN7 FMI1_CLE FMI1_REN FMI1_ALE FMI1_WEN FMI1_IO0 FMI1_IO1 FMI1_IO2 FMI1_IO3 FMI1_IO4 FMI1_IO5 FMI1_IO6 FMI1_IO7 ENET_MDC ENET_MDIO SYMBOL 4 OF 9 II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 (3.0V FOR ALL I/O’S) PLACE THE 27PF IN PAIRS AROUND THE IC PLACE THE 27PF IN PAIRS AROUND THE IC (1.8V) TOP PKG MDDR CORE TOP PKG MDDR I/O (1.2V) 100K MF 201 1/20W 1% MF 100K 1% 1/20W 201 1/20W 201 MF 1% 100K 201 1% MF 1/20W 100K 201 1/20W MF 1% 100K 201 100K 1% MF 1/20W 100K MF 1/20W 1% 201 201 100K MF 1/20W 1% CRITICAL FBGA 256MB-DDR-FC H3P 5% 25V NP0-C0G 201 27PF 201 NP0-C0G 25V 5% 27PF27PF 201 5% NP0-C0G 25V 201 NP0-C0G 25V 5% 27PF 5% 25V NP0-C0G 201 27PF27PF 201 NP0-C0G 5% 25V 27PF 201 25V NP0-C0G 5% 27PF 201 5% 25V NP0-C0G 1UF 6.3V 10% 402 CERM 0.22UF 6.3V 20% X5R 201 0.22UF 6.3V 20% X5R 201 0.22UF X5R 20% 6.3V 201 0.22UF 20% X5R 6.3V 201 0.22UF 20% X5R 6.3V 201 0.22UF 201 X5R 20% 6.3V CERM 402 10% 6.3V 1UF CERM 402 10% 6.3V 1UF CERM 402 10% 6.3V 1UF CERM 402 10% 6.3V 1UF 1UF 6.3V 10% 402 CERM 1UF 6.3V 10% 402 CERM CRITICAL 256MB-DDR-FC H3P FBGA 6.3V 402 X5R 4.7UF 20% CERM 402 10% 6.3V 1UF1UF 6.3V 10% 402 CERM 1UF 6.3V 10% 402 CERM 1UF 6.3V 10% 402 CERM 201 X5R 20% 6.3V 0.22UF0.22UF 6.3V 20% X5R 201201 20% 4V CERM-X5R-1 0.47UF 201 4V CERM-X5R-1 0.47UF 20% 201 4V CERM-X5R-1 0.47UF 20% 201 4V CERM-X5R-1 0.47UF 20% CERM 402 10% 6.3V 1UF CERM 402 10% 6.3V 1UF CERM 402 10% 6.3V 1UF 201 X5R 20% 6.3V 0.22UF0.22UF 6.3V 20% X5R 201 CERM 402 10% 6.3V 1UF 201 X5R 20% 6.3V 0.22UF0.22UF 6.3V 20% X5R 201 27PF 201 NP0-C0G 25V 5% 27PF 5% 25V NP0-C0G 201 25V NP0-C0G 5% 201 27PF27PF 5% 25V NP0-C0G 201 100K 1/20W MF 1% 201 1% 1/20W 201 MF 100K 100K 1% MF 1/20W 201 MF 1% 1/20W 100K 201 1/20W 201 MF 1% 100K 1/20W MF 1% 100K 201 100K 1% MF 1/20W 201 100K MF 1/20W 1% 201 201 1% MF 1/20W 100K 1% 1/20W 201 MF 100K 201 1/20W MF 1% 100K 1% 1/20W MF 100K 201 1/20W 201 MF 1% 100K 201 100K 1% MF 1/20W 100K 1% MF 1/20W 201201 1% 1/20W MF 100K 201 1% MF 1/20W 100K 1% 1/20W 201 MF 100K 201 1/20W MF 1% 100K 1% 1/20W MF 100K 201 1/20W 201 MF 1% 100K 201 100K 1% MF 1/20W 100K 1% MF 1/20W 201201 1% 1/20W MF 100K SYNC_MASTER=JAMES SYNC_DATE=12/21/2009 AP NAND & GPIO, NOR F0CLE F1CLE F0ALE F1ALE F0WE_N F1RE_N F1WE_N F0RE_N =PP1V8_SDRAM_H3 =PP1V2_SDRAM_MDDR F0CE0_N F0CE1_N F0CE3_N F0CE2_N F1CE0_N F1CE1_N F1CE2_N =PP3V3_NAND F0AD<7> F0AD<2> F0AD<0> F0AD<1> F0AD<4> F0AD<5> F0AD<6> F0AD<3> LAND_DK_HI_I PORT_DK_HI_I F0CLE F0ALE F0WE_N F0RE_N LAND_BRICK_ID_P LAND_BRICK_ID_N PORT_BRICK_ID_P PORT_BRICK_ID_N F1CLE F1RE_N F1ALE F1WE_N F1AD<0> F1AD<1> F1AD<2> F1AD<3> F1AD<4> F1AD<5> F1AD<6> F1AD<7> MLC_PWR_EN LAND_DOCK_VIDEO_AMP_EN F1AD<7> F1AD<6> F1AD<5> F1AD<4> F1AD<3> F1AD<2> F1AD<1> F1AD<0> F0AD<7> F0AD<6> F0AD<5> F0AD<4> F0AD<3> F0AD<2> F0AD<1> F0AD<0> F1CE3_N =PP3V3_NAND R0825 1 2 R0836 1 2 R0828 1 2 R0827 1 2 R0834 1 2 R0833 1 2 R0832 1 2 R0831 1 2 U0652 A11 A21 P1 T27 W27 AG10 F27 AB1 AE1 AG11 AG16 AG24 D1 D27 H27 M1 A17 A24 W1 N27 T1 A20 A8 AA27 A5 AC1 AD27 AG4 AG7 C1 K1 K27 K6 K7 L11 M11 M13 M14 M15 M16 M17 M2 N11 N2 N26 N3 N4 N5 N9 P11 P13 P14 P15 P16 P17 P2 P23 P24 P4 P5 P6 P9 R11 R13 R15 R2 R4 R5 R6 R7 R9 T11 T2 T26 U11 U13 U14 U15 U16 U17 U19 U22 U26 W17 W2 W26 W9 K14 K15 K16 K17 K2 K26 K3 K4 K5 C08321 2 C08191 2 C08181 2 C08171 2 C08161 2 C08151 2 C08141 2 C08131 2 C08061 2 C08041 2 C08031 2 C08021 2 C08011 2 C08001 2 C08051 2 C08071 2 C08081 2 C08091 2 C08101 2 C08111 2 C08121 2 U0652 K24 J22 AG19 AC18 AG17 AD18 AB19 J23 F25 AF18 AC19 AF15 AE18 AG15 AD19 AE19 AB18 AE15 AF19 AF22 AE23 AE27 AF20 AG20 AG18 AG25 AF25 AB24 AD23 AE26 AF26 AC22 AC23 AC27 AC25 AC26 AC24 AG22 AF21 AG21 C08311 2 C08301 2 C08291 2 C08281 2 C08271 2 C08261 2 C08251 2 C08241 2 C08231 2 C08221 2 C08211 2 C08541 2 C08531 2 C08521 2 C08511 2 C08501 2 C08621 2 C08611 2 C08601 2 C08731 2 C08721 2 C08711 2 C08701 2 R0857 1 2 R0856 1 2 R0855 1 2 R0854 1 2 R0853 1 2 R0852 1 2 R0851 1 2 R0850 1 2 R0867 1 2 R0866 1 2 R0865 1 2 R0864 1 2 R0863 1 2 R0862 1 2 R0861 1 2 R0860 1 2 R0877 1 2 R0876 1 2 R0875 1 2 R0874 1 2 R0873 1 2 R0872 1 2 R0871 1 2 R0870 1 2 8 OF 119 B.0.0 051-8245 8 OF 53 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 615 715 4344 4344 4344 4344 4344 4344 4344 781543 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 17 17 84344 84344 84344 84344 27 27 27 27 84344 84344 84344 84344 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 20 10 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 4344 781543
DP_PAD_TX0- DP_PAD_TX1- SMIA_RX_DATA+ SMIA_RX_DATA- SMIA_RX_CLK+ MIPID_VDD11_PLL DP_PAD_AVDD0 DP_PAD_AVDD1 DP_PAD_AVDDP0 DP_PAD_AVDDX DP_PAD_DVDD SMIA_VDD18 SMIA_VDD11 DP_PAD_DC_TP SMIA_VSS18 DP_PAD_DVSS DP_PAD_AVSSX DP_PAD_AVSSP0 DP_PAD_AVSS1 MIPID_DPDATA2 MIPID_DNDATA2 MIPID_DNDATA0 MIPID_DPDATA1 MIPID_DNDATA1 MIPID_DNDATA3 MIPID_DPCLK MIPID_DNCLK MIPIC_DPDATA0 MIPI_VDD11 MIPID_VDD18 DP_HPD SWI_DATA MIPID_VREG_0P4V DP_PAD_AVDD_AUX DP_PAD_AUXN DP_PAD_AUXP MIPIC_DNCLK MIPIC_DPCLK MIPI_VSS DP_PAD_AVSS_AUX MIPID_DPDATA3 MIPIC_DNDATA0 MIPIC_DPDATA1 MIPIC_DNDATA1 DP_PAD_AVSS0 MIPID_DPDATA0 MIPI_VSYNC SMIA_RX_CLK- DP_PAD_TX1+ DP_PAD_TX0+ DP_PAD_R_BIAS SYMBOL 2 OF 9 DIR A B VCCBVCCA GND II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 NOTE: 0.6V ANALOG REF (ANALOG DC TEST PORT) P/N 311S0487 SAME PART AS APN:353S2652 BUT CE PREFERRED PART NUMBER CRITICAL H3P 256MB-DDR-FC FBGA 201 6.3V X5R 0.1UF 10% 10% 0.1UF X5R 6.3V 201 10% X5R 2.2NF 10V 201 201 0.01UF 10% X5R 10V 5% 27PF 25V 201 NP0-C0G 80-OHM-0.2A-0.4-OHM 0201-1 201 6.3V 10% 0.1UF X5R 27PF NP0-C0G 201 5% 25V 0.01UF 10% X5R 10V 201 201 4V CERM-X5R-1 0.47UF 20% 201 6.3V X5R 0.1UF 10% 6.3V X5R 0.1UF 10% 201 6.3V X5R 0.1UF 10% 201 6.3V X5R 0.1UF 10% 201 201 10% 0.1UF X5R 6.3V 10% 0.1UF X5R 6.3V 201 10% 0.1UF X5R 6.3V 201 5% 10K 201 1/20W MF 0 MF 1/20W 5% 201 05% 1/20W MF 201 1% 4.99K 1/20W MF 201 0201-1 80-OHM-0.2A-0.4-OHM 0201-1 80-OHM-0.2A-0.4-OHM 0201-1 80-OHM-0.2A-0.4-OHM 0201-1 80-OHM-0.2A-0.4-OHM 0201-1 80-OHM-0.2A-0.4-OHM 80-OHM-0.2A-0.4-OHM 0201-1 80-OHM-0.2A-0.4-OHM 0201-1 6.3V CERM 402 1UF 10% 10% 1UF 402 CERM 6.3V 10% 1UF 402 CERM 6.3V 10% 1UF 402 CERM 6.3V 10% 1UF 402 CERM 6.3V 10% 1UF 402 CERM 6.3V CERM 10% 1UF 402 6.3V BGA1 CRITICAL SN74AVCH1T45 SYNC_MASTER=JAMES SYNC_DATE=12/21/2009 AP RGB/CLCD,CAMERA AP_SWI_R MLC_SWI =PP3V3_MLC=PP1V8_H3 H3_DP_AUX_P H3_DP_HPD H3_DP_AUX_N 0.4MM 0.2MM PP1V1_MIPI_PHY =PP1V8_MIPI H3_MIPID_0P4V TP_H3_MIPIC_CLK_N TP_H3_MIPIC_CLK_P TP_H3_MIPIC_DATA_N<1> TP_H3_MIPIC_DATA_P<1> TP_H3_MIPIC_DATA_N<0> TP_H3_MIPIC_DATA_P<0> H3_MIPID_CLK_N H3_MIPID_CLK_P H3_MIPID_DATA_N<3> H3_MIPID_DATA_P<3> H3_MIPID_DATA_N<2> H3_MIPID_DATA_P<2> H3_MIPID_DATA_N<1> H3_MIPID_DATA_P<1> H3_MIPID_DATA_N<0> H3_MIPID_DATA_P<0> =PP1V1_MIPI_PLL H3_DP_TX_P<0> H3_DP_TX_N<0> H3_DP_TX_P<1> H3_DP_TX_N<1> TP_CAM_SMIA_DATA_N TP_CAM_SMIA_DATA_P TP_CAM_SMIA_CLK_P TP_CAM_SMIA_CLK_N =PP1V1_MIPI TP_DP_ANALOG_TEST H3_DP_R_BIAS SWI_BLCTRLAP_SWI =PP1V1_SMIA =PP1V8_SMIA =PP1V1_DPORT =PP1V8_H3 =PP1V8_H3 =PP1V8_H3 =PP1V8_H3 0.2MM 0.4MM H3_DP_AVDD 0.2MM 0.4MM H3_DP_AVDDP0 0.2MM 0.4MM H3_DP_AVDDX 0.2MM 0.4MM H3_DP_DVDD H3_SMIA_VDD18 0.2MM 0.4MM 0.2MM 0.4MM H3_DP_AVDD_AUX 0.2MM 0.4MM H3_SMIA_VDD11 DIFF_MIC_SEL U0652 R19 E26 E27 E22 F24 C23 E23 C22 D22 E24 B23 D23 B22 A22 G27 G26 E25 C26 C27 B25 A25 Y18 Y15 W15 AA13 AG13 AE14 AF9 AF12 AE13 AG9 AF13 AG5 AF3 AE5 AF6 AG8 AF5 AG3 AE6 AG6 AF8 Y13 V13 W13 AG14 AF14 AD13 AD14 AA18 AC14 Y19 AA19 C09001 2 C09011 2 C09021 2 C09031 2 C09041 2 FL0900 1 2 C09051 2 C09061 2 C09071 2 C09081 2 C09091 2 C09101 2 C09111 2 C09121 2 C09131 2 C09511 2 C09501 2 R09501 2 R0952 1 2 R0953 1 2 R09201 2 FL0907 1 2 FL0906 1 2 FL0905 1 2 FL0904 1 2 FL0903 1 2 FL0902 1 2 FL0901 1 2 C09271 2 C09261 2 C09251 2 C09241 2 C09231 2 C09221 2 C09211 2 U0901 C1 C2 B2 B1 A1 A2 9 OF 119 B.0.0 051-8245 9 OF 53 13 13 14 15 25679121537 37 45 37 37 45 15 1445 1445 1445 1445 1445 1445 1445 1445 1445 1445 15 37 45 37 45 37 45 37 45 15 19 15 15 15 6 7 9 12 15 37 6 7 9 12 15 37 6 7 9 12 15 37 6 7 9 12 15 37 34
DAC_AVDD30D DAC_VREF DAC_OUT2 DAC_IREF DAC_COMP DAC_AVSS30D DAC_AVSS30A2 DAC_AVSS30A1 DAC_OUT1 DAC_OUT3 DAC_AVDD30A SYMBOL 3 OF 9CH.2OUT EN CH.3IN CH.2IN VS+ CH.1INCH.1OUT CH.3OUT GND CH.2OUT EN CH.3IN CH.2IN VS+ CH.1INCH.1OUT CH.3OUT GND TABLE_ALT_ITEM PART NUMBER ALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS: TABLE_ALT_HEAD II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 CIN YIN CVBSIN (YIN) (CIN) (CVBSIN) NOTE: PLACE R1005,R1046-47 NEAR U0652 201 MF 75 1/20W 1% JTAG_DAP 1% 1/20W MF 201 200 200 1% MF 1/20W 201 6.3V 0.1UF 201 X5R 10% PORTRAIT_DOCK 1/20W 201 MF 1% 6.34K 6.3V X5R 10% 201 0.1UF 75 1/20W MF 1% 201 JTAG_DAP 1/20W MF 201 1% 75 JTAG_DAP MF 1/20W 200 1% 201 201 10% X5R 6.3V 0.1UF 6.3V 0.1UF 201 X5R 10% LANDSCAPE_DOCK LANDSCAPE_DOCK 1/20W MF 201 1% 75 75 LANDSCAPE_DOCK 1% 1/20W 201 MF 1/20W 100K MF 201 5% LANDSCAPE_DOCK LANDSCAPE_DOCK 201 1% MF 1/20W 75 CRITICAL FBGA 256MB-DDR-FC H3P 6.3V X5R 10% 201 0.1UF 240-OHM-0.2A-0.8-OHM 0201 6.3V CERM 1UF 10% 402 0.1UF 10% X5R 6.3V 201 THS7319 PORTRAIT_DOCK 5% 201 MF 100K NOSTUFF SM CRITICAL LANDSCAPE_DOCK THS7319 BGA SYNC_DATE=12/21/2009 AP TVOUT SYNC_MASTER=JAMES 353S2493 U1009,U1010 353S2684 INTERSIL VIDEO_AGND 0.3MM 0.175MM VIDEO_AGND LAND_COUT LAND_DOCK_VIDEO_AMP_EN DAC_OUT1 DAC_OUT2 DAC_OUT3 =PP3V0_VIDEO_BUFFER DAC_OUT2 PORT_DOCK_VIDEO_AMP_EN DAC_OUT3 DAC_OUT1 VIDEO_AGND =PP3V0_VIDEO_H3 PP3V0_DAC_AVDD_A 0.4MM 0.2MM DAC_VREF DOCK1_CVBS_PB DOCK2_Y_PR MAKE_BASE=TRUE PORT_DOCK_Y_PR DOCK2_CVBS_PB MAKE_BASE=TRUE PORT_DOCK_COMP_PB DOCK2_C_Y PORT_DOCK_C_Y MAKE_BASE=TRUE DAC_IREF DAC_COMP PORT_COUT PORT_CVBS_OUT PORT_YOUT LAND_YOUT MAKE_BASE=TRUE LAND_DOCK_Y_PR DOCK1_Y_PR DOCK1_C_Y =PP3V0_VIDEO_BUFFER LAND_CVBS_OUT MAKE_BASE=TRUE LAND_DOCK_C_Y LAND_DOCK_COMP_PB MAKE_BASE=TRUE BGA CRITICAL 1/20W R1004 1 2 R1046 1 2 R1047 1 2 C10261 2 R10121 2 C10151 2 R1003 1 2 R1043 1 2 R1005 1 2 C10141 2 C10301 2 R1050 1 2 R1051 1 2 R10531 2 R1052 1 2 U0652 C13 D14 B14 C14 D15 E18 A13 A15 A14 B13 E19 C10201 2 FL1000 1 2 C10281 2 C10711 2 U1009 A1A3 B1B3 C1C3 B2 A2C2 R10081 2 XW1000 1 2 U1010 A1A3 B1B3 C1C3 B2 A2C2 10 OF 119 B.0.0 051-8245 10 OF 53 10 10 45 8 10 45 10 45 10 45 1015 1045 6 1045 1045 10 15 3845 123945 123945 123945 45 45 45 45 3845 3845 1015 45
GND Y1 Y2 2OE* A2 1OE* A1 VCC VCC GND A1 Y1 Y2 1OE A2 2OE S GND OUTPUT MUX SELECTOR I1 I0 Y VCC S GND OUTPUT MUX SELECTOR I1 I0 Y VCC II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 201 X5R 6.3V 10% 0.1UF 100K MF 201 1/20W 1% X5R 201 6.3V 0.1UF 10% K48M CRITICAL 74LVC2G125 SOT833 K48M CRITICAL 74LVC2G126GT/S500 SOT833 K48M_DEVELOPMENT 6.3V 201 X5R 10% 0.1UF K48M_PRODUCTION 1/20W 0 5% 201 MF K48M_DEVELOPMENT 74LVC1G157 SOT891 K48M_DEVELOPMENT 10% 201 6.3V X5R 0.1UF K48M_DEVELOPMENT 100K 1/20W 1% MF 201 K48M_PRODUCTION 1/20W MF 201 5% 0 K48M_DEVELOPMENT 201 MF 1% 1/20W 100K K48M_DEVELOPMENT SOT891 74LVC1G157 K48M_DEVELOPMENT MF 100K 1% 1/20W 201 K48M_DEVELOPMENT MF 100K 1% 1/20W 201 K48 201 MF 1/20W 0 5% K48 201 MF 1/20W 0 5% 1M 1% 1/20W MF 201 3G AND DEBUG MUXES SYNC_DATE=12/21/2009SYNC_MASTER=JAMES LAND_DOCK_ACC_TO_POD DOCK_UART_CTRL LAND_DOCK_POD_TO_ACC AP_UART4_TXD_MUX LAND_DOCK_P17 BB_USART0_RXD_CTRL AP_UART1_TXD AP_UART1_CTS_L BB_USART0_RTS_L AP_UART1_RTS_L BB_USART0_CTS_L AP_UART1_RXD BB_USART0_TXD AP_UART4_RXD_MUX LAND_DOCK_ACC_TO_POD AP_UART4_RXD_MUX AP_UART4_TXD_MUX LAND_DOCK_POD_TO_ACC =PP1V8_SDRAM_MISC AP_UART2_RXD BB_USART0_TXD UMTS_TXD =PP3V0_HP_DET_BIAS =PP3V0_IO_H3 BB_USART0_RXD =PP1V8_SDRAM_MISC UMTS_RXD =PP1V8_SDRAM_MISC UMTS_RXD_CTRL AP_UART2_TXD LAND_DOCK_P14 C11001 2 R11001 2 C11011 2 U1100 2 5 4 1 7 8 6 3 U1101 2 5 4 1 7 8 6 3 C11041 2 R1103 1 2 U1104 2 3 1 6 5 4 C11051 2 R11041 2 R1105 1 2 R11541 2 U1105 2 3 1 6 5 4 R11061 2 R11551 2 R1130 1 2 R1131 1 2 R11011 2 11 OF 119 B.0.0 051-8245 11 OF 53 11 38 19 11 38 1112 38 7 7 7 12 7 12 7 11 12 11 12 1138 11 12 1112 11 38 11 15 36 7 1112 12 15 27 33 34 36 39 7 13 15 37 12 11 15 36 12 11 15 36 7 7 38
II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 SPI0 (DVT AND BEYOND)0000 DVT011 EVT 2010 SPI0 WITH TEST MODE0010 EVT 1001 PROTO 3000 000 PROTO3 011 K48 DEV 010 K48AP BOARD_REV[2:0] BOARD_ID[2:0] FOR REFERENCE CURRENT SETTING -> 1110 FMI0/1 4/4 CS W/TEST 1111 RESERVED 1101 FMI0/1 4/4 CS 1100 FMI0/1 2/2 CS 1010 FMI1 4CS W/TEST 0110 FMI0 4CS W/TEST 0010 SPI0 W/TEST BOOT_CONFIG[3:0] 1001 FMI1 4 CS 1000 FMI1 2 CS 0111 RESERVED 0101 FMI0 4CS 0100 FMI0 2CS 0001 SPI1 0000 SPI0 0011 SPI1 W/TEST BOARD ID <6> = BOARD_ID[2] BOARD ID <4> = BOARD_ID[0] BRD_REV[2-0] BOARD REVISION BOARD ID <0> = BOOT_CONFIG[0] BOARD ID <1> = BOOT_CONFIG[1] BOARD ID <2> = BOOT_CONFIG[2] BOARD ID <3> = BOOT_CONFIG[3] BOOT CONFIG ID BOOT_CONFIG[3-0] CODEC_IRQ_N (GPIO18) ALIASES FROM PAGE 50 ALIASES FROM PAGE 11ALIASES FROM PAGE 7 FLASH_DOUT FLASH_CLK BOARD ID <5> = BOARD_ID[1] BOARD ID 010 011 BOARD_ID[2-0] K48 AP K48 DEV ALIASES FROM PAGE 51 ALIASES FOR PAGE 57 NOTE: JTAG SCAN DUMP 3.92K 1/20W MF 201 1% 3.92K 1% 201 MF 1/20W NOSTUFF JTAG_DAP 0 NOSTUFF 0 201 MF 1/20W 0 5% JTAG_TAP 201 MF 1/20W 5% JTAG_TAP 0 0 H3_A0_DAP 0 5% 1/20W MF 201 JTAG_TAP 201 MF 1/20W 1% 3.92K NOSTUFF 201 MF 1/20W 1% 3.92K NOSTUFF 201 MF 1/20W 1% 3.92K AP MISC & ALIASES SYNC_DATE=12/21/2009SYNC_MASTER=JAMES DOCK2_CVBS_PBAP_TRSTN NC_AP_TDO AP_TDO TRUE DOCK2_Y_PRAP_TDI DOCK2_C_Y RESET_1V8_N AP_LD_DK_ADPTR LAND_DK_ADPTR AP_PT_DK_ADPTR PORT_DK_ADPTR I2C2_SDA_3V0 I2C2_SCL_3V0 PROX_ACSHIELDPROX_ACSHIELD_CONN PROX_SCL_3V0 PROX_SDA_3V0 AP_UART3_RXD MAKE_BASE=TRUE FLASH_DIN =PP1V8_H3 AUD_I2S_LRC_L61MAKE_BASE=TRUE I2S0_LRCLK AUD_I2S_BITCLK_L61MAKE_BASE=TRUE I2S0_BCLK AUD_I2S_SDIN_L61 MAKE_BASE=TRUE I2S0_DOUT AUD_I2S_SDOUT_L61MAKE_BASE=TRUE I2S0_DIN BB_I2S1_WA0 MAKE_BASE=TRUE I2S1_LRCLK I2S1_DIN BB_I2S1_CLK MAKE_BASE=TRUE I2S1_BCLK BB_I2S1_TX MAKE_BASE=TRUE I2S1_DOUT L61_I2S_MCLKMAKE_BASE=TRUE I2S1_MCK PORT_DOCK_ACC_TO_PODMAKE_BASE=TRUE AP_UART0_RXD BB_USART0_TXD_CONNMAKE_BASE=TRUE BB_USART0_TXD BB_USART0_RXD_CONN MAKE_BASE=TRUE BB_USART0_RXD BB_USART0_RTS_L_CONNMAKE_BASE=TRUE BB_USART0_RTS_L BB_USART0_CTS_L_CONNMAKE_BASE=TRUE BB_USART0_CTS_L UMTS_RXD_CONN MAKE_BASE=TRUE UMTS_RXD UMTS_TXD_CONNMAKE_BASE=TRUE UMTS_TXD AP_UART4_TXD_MUXAP_UART4_TXD MAKE_BASE=TRUE AP_UART4_RXD_MUXAP_UART4_RXD MAKE_BASE=TRUE LAND_USB_PWR USB_PWR_A MAKE_BASE=TRUE MAKE_BASE=TRUE AP_UART3_TXD MAKE_BASE=TRUE AP_UART3_CTS_L MAKE_BASE=TRUE AP_UART3_RTS_L CONN_AP_UART3_RXD CONN_AP_UART3_TXD CONN_AP_UART3_CTS_L CONN_AP_UART3_RTS_L =PP1V8_H3 AP_GPIO25_BOARD_ID_1 NC_BOARD_ID_3 MAKE_BASE=TRUE NC_BOARD_ID_2 MAKE_BASE=TRUE AP_JTAG_SEL JTAG_TRSTN_CTRL AP_TRSTN AP_GPIO29_BOARD_ID_3 AP_GPIO41_BRD_REV2 MAKE_BASE=TRUE BB_I2S1_RX BB_FLASH_ACTIVEMAKE_BASE=TRUE AP_GPIO39_BRD_REV0 AP_GPIO40_BRD_REV1 AP_GPIO41_BRD_REV2 GPS_UART_RX MAKE_BASE=TRUE AP_UART6_TXD GPS_UART_TX MAKE_BASE=TRUE AP_UART6_RXD AP_UART6_CTS_L AP_UART6_RTS_L GPS_UARTS_CTS_LMAKE_BASE=TRUE MAKE_BASE=TRUE GPS_UARTS_RTS_L AP_GPIO28_BOARD_ID_2 AP_UART0_TXD MAKE_BASE=TRUE PORT_DOCK_POD_TO_ACC BB_RST_RADIO MAKE_BASE=TRUE BB_RST R06251 2 R06221 2 R0663 1 2 R0661 1 2 R1200 1 2 R1202 1 2 R1203 1 2 R1201 1 2 R06271 2 R06281 2 R06291 2 12 OF 119 B.0.0 051-8245 12 OF 53 10 39 45612 6 44 10 39 45644 10 39 45 6 6 16 6 16 7 13 17 26 35 44 7 13 17 26 35 4242 42 42 7 7 679121537 287 287 287 287 32 41744 744 32 41744 32 41744 287 397 4111 4111 4111 4111 4111 4111 117 117 38 16 7 7 7 39 39 39 39 679121537 6 6 6 6 12 6 612 32 41 41 6 6 612 417 417 7 7 41 41 6 7 39 416
MONITOR5 VDD33A_OSC VSYNC PPC MONITOR6 MONITOR4 TCLKN TEST MONITOR1 S_DNDATA2 S_DPDATA2 S_DNDATA1 S_DPDATA1 S_DPDATA0 S_DNDATA0 VDD33A_18LDO VDD33A_12LDO_1 VDD33A_12LDO_0 VDD33A_12LDO_2 VDD33P_LVDS VDD33A_LVDS VDD33D_LVDS TCLKP TCN TCP TBN TBP TAN TAP PWM VSS33A_18LDO VSS33A_12LDO_0 VSS33A_12LDO_1 VSS33A_LVDS MONITOR3 MONITOR2 MONITOR0 M_DPDATA0 S_DPCLK S_DNCLK M_DNDATA0 TDP TDN ROUT_LVDS SWI RESET* VSS33D_LVDS VSS12D_PLL VSS33P_LVDS MLC_SCL MLC_SDA EDID_SCL EDID_SDA M_DPCLK M_VREG_0P4V M_DNCLK CAP_12LDO_5 CAP_12LDO_3 CAP_12LDO_1 CAP_12LDO_0 CAP_18LDO BIST S_DNDATA3 S_DPDATA3 WC* E2 E0 SDASCL E1 VSS VCC EEPROM THM_P D G S PP PP PP PP PP PP PP II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) TABLE_5_ITEM TABLE_5_ITEM MLC EEPROM:RAW APN 335S0661 MLC SELECTED I2C MLC CAN READ H3P CAN WRITE WC_L USB MUX TABLE 1 0 STUFF R1499/R1498 TO BYPASS I2C SWITCHES PLACE ON TOP OF PADS FOR U1402/U1403 I2C MUXING CIRCUITRY WHEN WC_L IS LOW, CAN WRITE TO EEPROM WHEN WC_L IS HIGH, CANNOT WRITE TO EEPROM 8.45K 1% 1/20W MF 201 201 10V 2.2NF X5R 10% FBGA1 S6T2MLC OMIT MLP M24C64 0201-1 80-OHM-0.2A-0.4-OHM 0201-1 80-OHM-0.2A-0.4-OHM 80-OHM-0.2A-0.4-OHM 0201-1 4.7UF 402 20% 6.3V X5R-CERM 4.7UF 20% 6.3V 402 X5R-CERM 4.7UF 6.3V 402 X5R-CERM 20% CERM 10V 20% 0.1UF 402 20% 0.1UF 402 CERM 10V 0.1UF CERM 10V 402 20% 4.7UF 20% 6.3V X5R-CERM 402 201 MF 1/20W 1% 100K 201 100K 1/20W MF 1% 201 1% 1/20W MF 10K 402 20% 4.7UF X5R-CERM 6.3V MLC_DEV BGA SN74LVC2G66YZPR MLC_DEV BGA SN74LVC2G66YZPR MLC_DEV BGA SN74LVC2G66YZPR MLC_DEV BGA SN74LVC2G66YZPR 201 MF 1/20W 5% 4.7K 201 MF 5% 1/20W 4.7K MLC_PROD 1/20W 5% 0 201 MF MLC_PROD 5% 0 201 1/20W MF MLC_DEV SOD-VESM-HF SSM3K15FV MLC_DEV 100K 1% 201 MF 1/20W 201 NOSTUFF 100K 1/20W 1% MF 110K 1% 1/20W MF 201 1% MF 1/20W 100K 201 P4MM SM NOSTUFF NOSTUFF P4MM SM 6.3V 20% 4.7UF 402 X5R-CERM SM P4MM NOSTUFF SM P4MM NOSTUFF NOSTUFF P4MM SM SM P4MM NOSTUFF NOSTUFF P4MM SM 402 0.1UF 20% 10V CERM 25V CERM 0201 82PF 5% 20% 402 4.7UF X5R-CERM 6.3V 1 U1401 CRITICAL 54MHZ_PANEL341S2604 MLC EEPROM 54MHZ LVDS,2MHZ SWI MLC EEPROM 100MHZ LVDS,2MHZ SWI1 U1401 CRITICAL 100MHZ_PANEL341S2606 SYNC_DATE=09/16/2009SYNC_MASTER=MIAMI MLC =PP3V3_MLC MIN_LINE_WIDTH=0.4 MM MAX_NECK_LENGTH=3 MM VOLTAGE=3.3V PP3V3_MLC_18LDO_12LDO MIN_NECK_WIDTH=0.2 MM NET_SPACING_TYPE=PWR MLC_MIPID_DATA_P<2> =PP3V3_MLC_EEPROM MLC_SDA_3V3 NC_MASTER_MIPI_CLK_N =PP3V3_MLC MLC_VREG_0V4 MLC_MUX_SCL_3V3 MLC_MIPID_DATA_P<0> MLC_MIPID_CLK_N MLC_MIPID_CLK_P NC_MASTER_MIPI_DAT_N NC_MASTER_MIPI_DAT_P NC_MASTER_MIPI_CLK_P MLC_MONITOR0_PD ROUT_LVDS NC_MONITOR3 NC_MONITOR2 NC_MONITOR1 MLC_MIPID_DATA_N<0> =PP3V0_IO_H3 MIN_LINE_WIDTH=0.4 MM VOLTAGE=1.2V MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_NECK_WIDTH=0.2 MM MLC_CAP_1V2LDO_0 MLC_CAP_1V2LDO_1_3 MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR VOLTAGE=1.2V MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.4 MM MLC_CAP_1V2_LDO_5 MAX_NECK_LENGTH=3 MM VOLTAGE=1.2V NET_SPACING_TYPE=PWR MLC_SCL_3V3 =PP3V3_MLC MLC_2MUX_SDA_3V3 MLC_2WC_L MLC_WC I2C2_SCL_3V0 MLC_2WC_L MLC_WC I2C2_SDA_3V0 MLC_2MUX_SCL_3V3 =PP3V0_IO_H3 =PP3V0_IO_H3 =PP3V3_MLC =PP3V0_IO_H3 MLC_CAP_1V8LDO VOLTAGE=1.2V MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR LVDS_DDC_DATA LVDS_DDC_CLK MLC_MIPID_DATA_P<3> MLC_MIPID_DATA_N<3> MLC_SDA_3V3 MLC_SCL_3V3 MLC_RESET_L MLC_SWI NC_LVDS_DATA_N<3> NC_LVDS_DATA_P<3> LCD_BKLT_PWM LVDS_DATA_P<0> LVDS_DATA_N<0> LVDS_DATA_P<1> LVDS_DATA_N<1> LVDS_DATA_P<2> LVDS_DATA_N<2> LVDS_CLK_P MLC_MIPID_DATA_P<1> MLC_MIPID_DATA_N<1> MLC_MIPID_DATA_N<2> LVDS_CLK_N NC_MONITOR4 NC_MONITOR6 MLC_PPC_OUT TP_MLC_VSYNC NC_MONITOR5 MLC_MIPID_CLK_P MLC_MIPID_CLK_N MLC_TEST MLC_BIST MLC_SWI MLC_MUX_SDA_3V3 MLC_2WC_L MIN_LINE_WIDTH=0.4 MM VOLTAGE=3.3V PP3V3_MLC_DIG_12LDO MIN_NECK_WIDTH=0.2 MM MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MLC_MIPID_DATA_P<3> MLC_MIPID_DATA_N<3> MLC_MIPID_DATA_N<0> MLC_MIPID_DATA_P<0> MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR VOLTAGE=3.3V MIN_NECK_WIDTH=0.2 MM PP3V3_MLC_LVDS MIN_LINE_WIDTH=0.4 MM MLC_WC C1400 1 2 C1403 1 2 C1401 1 2 C1402 1 2 R14011 2 C14041 2 U1400 B7 E3 H7 A7 A4 C3 A8 B6 C2 B2 C1 B1 B3 A6 A5 H5 G3 G4 G5 F4 E4 D3 G6 D4 B5 C5 F2 D2 E2 G2 H2 F1 D1 E1 G1 H1 H6 G7 G8 F7 F8 C7 C8 E7 E8 D7 D8 B8 F3 H8 B4 A2 C6 H4 E5 D5 A3 H3 C4 A1 D6 F6 E6 F5 U1401 1 2 3 6 5 9 8 4 7 FL1400 1 2 FL1401 1 2 FL1402 1 2 C1410 1 2 C1411 1 2 C1412 1 2 C14131 2 C14141 2 C14151 2 R14021 2 R14031 2 R14061 2 U1403 D2 C2 C1 D1 A2 U1403 A1 B1 B2 D1 A2 U1402 A1 B1 B2 D1 A2 U1402 D2 C2 C1 D1 A2 R14041 2 R14051 2 R1499 1 2 R1498 1 2 Q1490 3 1 2 R14971 2 R14081 2 R14071 2 R14101 2 PP1400 1 PP1408 1 PP1401 1 PP1409 1 PP1410 1 PP1411 1 PP1412 1 C14171 2 C14161 2 14 OF 119 B.0.0 051-8245 13 OF 53 9131415 25 14 14 13 913141525 14 1314 1314 1314 1314 711131537 13 913141525 14 1314 13 712172635 1314 13 71217263544 14 711131537 711131537 913141525 711131537 25 25 1314 1314 13 13 6 913 21 25 45 25 45 25 45 25 45 25 45 25 45 25 45 14 14 14 25 45 25 13 14 13 14 9 13 14 1314 13 14 13 14 13 14 13 14 13
II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 MLC ALIASES SYNC_DATE=09/16/2009 MLC ALIASES SYNC_MASTER=MIAMI H3_MIPID_DATA_P<3> MAKE_BASE=TRUE H3_MIPID_DATA_P<2> MAKE_BASE=TRUE MLC_MIPID_DATA_P<2> =PP3V3_MLC MLC_WC_L MLC_MIPID_CLK_P MLC_MIPID_CLK_N MLC_MIPID_DATA_P<1> MLC_MIPID_DATA_P<0> MLC_MIPID_DATA_N<3> MLC_MIPID_DATA_P<3> MLC_MIPID_DATA_N<0> MLC_MIPID_DATA_N<1> MLC_MIPID_DATA_N<2> MLC_2MUX_SDA_3V3 MLC_2MUX_SCL_3V3 H3_MIPID_DATA_P<1> MAKE_BASE=TRUE H3_MIPID_DATA_N<1> MAKE_BASE=TRUE H3_MIPID_DATA_N<2> MAKE_BASE=TRUE MAKE_BASE=TRUE H3_MIPID_DATA_N<3> H3_MIPID_CLK_P MAKE_BASE=TRUE H3_MIPID_CLK_N MAKE_BASE=TRUE H3_MIPID_DATA_P<0> MAKE_BASE=TRUE H3_MIPID_DATA_N<0> MAKE_BASE=TRUE MAKE_BASE=TRUE MLC_MUX_SDA_3V3 MLC_MUX_SCL_3V3 MAKE_BASE=TRUE MLC_2WC_L MAKE_BASE=TRUE =PP3V3_MLC_EEPROM 15 OF 119 B.0.0 051-8245 14 OF 53 945 945 13 9 13 15 25 7 13 13 13 13 13 13 13 13 13 13 13 945 945 945 945 945 945 945 945 13 13 13 13
II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 POWER CONN / ALIAS (REPLACE WITH 155S0243 IF NEED FILTER) LDO RAILS PROGRAMMABLE ON/OFF BUCK RAILS CHARGER MAIN BATTERY 5% 0 1/4W FF-LF 1206 SYNC_DATE=12/04/2009SYNC_MASTER=MARK Power Conn / Alias MAKE_BASE=TRUE VOLTAGE=3.3V MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm PP3V3_OUT =PP3V3_AUDIO =PP3V3_H3_USB VOLTAGE=1.8V MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm MAKE_BASE=TRUE NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM PP1V8_SDRAM =PP1V8_SDRAM_GPS =PP1V8_SDRAM_1V2 MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.4 MM MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MAKE_BASE=TRUE VOLTAGE=3.3V PP3V3_MLC_OUT =PP3V3_MLC =PP3V3_NAND =PP3V3_LCD VOLTAGE=5.1V NET_SPACING_TYPE=PWR MAKE_BASE=TRUE MAX_NECK_LENGTH=3 MM MIN_NECK_WIDTH=0.2 mm MIN_LINE_WIDTH=0.4 MM PP5V1_OUT =PP5V1_LED MIN_LINE_WIDTH=0.6 MM MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2 MM VOLTAGE=20.4V PPLED_OUT =PPLED_REG =PP1V8_MIPI =PP1V8_SMIA =PP1V8_NOR_FLASH =PP1V8_H3 =PP1V8_AUDIO =PP1V8_CHGR =PP1V8_SMS =PP1V8_CAM MIN_LINE_WIDTH=0.3 MM VOLTAGE=1.8V MIN_NECK_WIDTH=0.2 mm MAKE_BASE=TRUE NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM PP1V8_GRAPE =PP1V8_GRAPE MIN_NECK_WIDTH=0.2 mm MIN_LINE_WIDTH=0.6 mm MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MAKE_BASE=TRUE PP1V8 VOLTAGE=1.8V =PP1V2_HSICPP1V2_H3 VOLTAGE=1.2V MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2 mm MIN_LINE_WIDTH=0.6 MM =PP1V2_VDDIOD_H3 PP1V2_SDRAM VOLTAGE=1.2V MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.6 MM =PP1V2_SDRAM_MDDR VOLTAGE=1.8V MIN_NECK_WIDTH=0.1 MM MIN_LINE_WIDTH=0.2 MM PP1V8_ALWAYS MAKE_BASE=TRUE NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM =PP1V8_ALWAYS =PP1V1_USB =PP1V1_HSIC =PP1V1_MIPI =PP1V1_MIPI_PLL =PP1V1_DPORT =PP1V1_SMIA =PP1V1_PLL MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm MAKE_BASE=TRUE NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM PP1V7_VA_VCP VOLTAGE=1.7V =PP1V7_VA_VCP =PP3V0_HP_DET_BIAS MIN_LINE_WIDTH=0.5 MM VOLTAGE=1.2V MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MAKE_BASE=TRUE PP1V2_AUDIENCE MIN_NECK_WIDTH=0.2 mm =PP1V2_AUDIO MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2 mm PP3V0_LCD VOLTAGE=3.0V MIN_LINE_WIDTH=0.3 MM =PP3V0_LCD =PP3V0_IO_USB =PP3V0_IO_CHGR =PP3V0_IO_3V3 =PP3V0_IO_H3 =PP3V0_IO_SMS PP3V3_PORT_ACC VOLTAGE=3.3V MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MAKE_BASE=TRUE MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm =PP3V3_PORT_ACC MIN_LINE_WIDTH=0.2MM VOLTAGE=3.3V MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MAKE_BASE=TRUE PP3V3_LAND_ACC MIN_NECK_WIDTH=0.1MM =PP3V3_LAND_ACC =PP3V0_OPTICAL =PP3V0_VIDEO_H3 =PP3V0_DPMUX =PP3V0_VIDEO_BUFFER MIN_LINE_WIDTH=0.5 MM MIN_NECK_WIDTH=0.2 mm MAKE_BASE=TRUE NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM PP1V1_H3_PHY VOLTAGE=1.1V MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2 mm PP3V0_VIDEO VOLTAGE=3.0V MIN_LINE_WIDTH=0.6 mm NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM MAKE_BASE=TRUE NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.6 MM VOLTAGE=3.0V PP3V0_IO MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_NECK_WIDTH=0.25 MM MAKE_BASE=TRUE MIN_LINE_WIDTH=0.6 MM VOLTAGE=4.2V BATT_POS_F =BATT_POS_F_3G =PP1V8_SDRAM_MISC =PP1V8_SDRAM_WL =VCC_MAIN_3V3 =PP1V8_SDRAM_H3 MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2 mm MIN_LINE_WIDTH=0.6 mm PP3V0_GRAPE VOLTAGE=3.0V VOLTAGE=3.1V PP3V1_AUDIO MIN_NECK_WIDTH=0.2 mm MAKE_BASE=TRUE NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM MIN_LINE_WIDTH=0.6 mm =PP3V1_AUDIO VOLTAGE=1.2V MIN_LINE_WIDTH=0.6 MM MAKE_BASE=TRUE MIN_NECK_WIDTH=0.25 MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM PPVCORE_H3 =PPVCORE_H3 =VCC_MAIN_LED =VCC_MAIN_AUDIO =VCC_MAIN_WL =PP3V0_GRAPE =PP3V0_GRAPE_Z2 =PP3V0_GRAPE_Z1 =PP3V0_GRAPE_MARIO2 =PP3V0_GRAPE_MARIO1 =PP3V0_GRAPE_MARIO3 =VCC_MAIN_DOCK =VCC_MAIN_ASH VOLTAGE=4.7V PPVCC_MAIN MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MAKE_BASE=TRUE BATT_POS BATT_POS_F MIN_LINE_WIDTH=0.4MM PP3V0_HP_DET_BIAS MAX_NECK_LENGTH=3 MM MIN_NECK_WIDTH=0.2MM MAKE_BASE=TRUE VOLTAGE=3.0V NET_SPACING_TYPE=PWR MAKE_BASE=TRUE PP3V0_OPTICAL VOLTAGE=3.0V MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 mm NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM MIN_NECK_WIDTH=0.20MM NET_SPACING_TYPE=GND MAX_NECK_LENGTH=5 MM GND MAKE_BASE=TRUE VOLTAGE=0V MIN_LINE_WIDTH=0.6 MM R1940 1 2 17 OF 119 B.0.0 051-8245 15 OF 53 20 28 6 18 41 18 20 9 13 14 25 7 8 43 25 18 21 21 25 9 9 7 6 7 9 12 37 28 17 26 42 18 23 1819 618 7 18 7 8 18 6 19 6 6 9 9 9 9 6 18 28 11 27 33 34 36 39 18 18 21 6 17 20 7 11 13 37 26 42 18 39 18 38 35 10 37 10 18 18 18 1517 41 11 36 39 20 6 8 18 18 28 30 18 7 21 22 29 39 23 24 24 24 23 38 39 18 17 17 15 17 18 18
N-CH P-CH D G S N-CH P-CH D G S SENSE GATE CTL STAT VIN GND SENSE GATE CTL STAT VIN GND II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 NOTE: PROTECTED UP TO 26.5V NOTE: PROTECTED UP TO 26.5V MOSFET CHANNEL VGS MAX RDS(ON) IMAX 8 A P-TYPE +/- 16V SI4563DY 25 MOHM @-4.5V SO-8 DUAL P/N FETS VGS MAX +/- 16V CHANNEL RDS(ON) MOSFET IMAX N-TYPE 8 A 15 MOHM @4.5V SI4563DY SO-8 DUAL P/N FETS DCIN POWER PATH PORTRAIT (PULLUP ON PAGE 19) (PULLUP ON PAGE 19) LANDSCAPE 5.6V ZENER SHORT-0201 NOSTUFF CRITICAL SI4563DY LANDSCAPE_DOCK SOI 201 100K 1/20W 1% MF LANDSCAPE_DOCK LANDSCAPE_DOCK 1/20W 1% 201 MF 10K CRITICAL SSM3K15FV LANDSCAPE_DOCK SOD-VESM-HF SI4563DY PORTRAIT_DOCK SOI CRITICAL 201 100K 1% 1/20W MF PORTRAIT_DOCK CRITICAL SSM3K15FV PORTRAIT_DOCK SOD-VESM-HF PORTRAIT_DOCK 1/20W 10K 201 MF 1% SHORT-0201 NOSTUFF 402 MF-LF 1/16W 1% 10K CRITICAL SOT23-6 LTC4412ES6 CRITICAL LTC4412ES6SOT23-6 NOSTUFF 201 470K MF 1% 1/20W NOSTUFF SHORT-0201 603 51.1 1/10W MF-LF 1% CRITICAL SOT23 MMBZ5232B-350MW CRITICAL 1SS418 SOD-723-HF CRITICAL SOD-723-HF 1SS418 10% 0.01UF X5R 10V 201 10V X5R 0.01UF 10% 201 SYNC_DATE=12/04/2009SYNC_MASTER=MARK DCIN POWER PATH TRUE USB_PWRB_VIN MIN_LINE_WIDTH=0.60MM MIN_NECK_WIDTH=0.25MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM VOLTAGE=6V PORT_DK_VBUS LAND_DK_VBUS MIN_LINE_WIDTH=0.60MM MIN_NECK_WIDTH=0.25MM MAX_NECK_LENGTH=3 MM VOLTAGE=6V USB_PWRA_VIN NET_SPACING_TYPE=PWR VOLTAGE=6V MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_NECK_WIDTH=0.25MM MIN_LINE_WIDTH=0.60MM DOCK_VBUS_R MIN_LINE_WIDTH=0.60MM MIN_NECK_WIDTH=0.25MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM VOLTAGE=6V DOCK_VBUS VBUS_P USB_PWR_B NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM VOLTAGE=6V PORT_DK_STAT LAND_DK_STAT LAND_DK_ADPTR PORT_DK_ADPTR MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=ANLG PORT_DK_OVGATE MIN_LINE_WIDTH=0.20MM MIN_NECK_WIDTH=0.1MMUSB_PWRB_GATE MIN_LINE_WIDTH=0.20MM NET_SPACING_TYPE=ANLG MIN_NECK_WIDTH=0.1MM VOLTAGE=6V MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=ANLG MIN_LINE_WIDTH=0.20MM PORT_DK_OVSENS MIN_NECK_WIDTH=0.1MMUSB_PWRA_GATE MIN_LINE_WIDTH=0.20MM NET_SPACING_TYPE=ANLG MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=ANLG MAX_NECK_LENGTH=3 MM VOLTAGE=6V MIN_LINE_WIDTH=0.20MM LAND_DK_OVSENS NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM USB_PWR_A VOLTAGE=6V MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=ANLG MIN_LINE_WIDTH=0.20MM LAND_DK_OVGATE XW1820 1 2 Q1820 7 8 5 6 2 4 1 3 R18201 2 R18211 2 Q1821 3 1 2 Q1810 7 8 5 6 2 4 1 3 R18101 2 Q1811 3 1 2 R18111 2 XW1810 1 2 R18001 2 U1820 3 5 2 6 4 1 U1810 3 5 2 6 4 1 R18221 2 XW1800 1 2 R1823 1 2 DZ1800 13 D1820 1 2 D1810 1 2 C1820 1 2 C1810 1 2 18 OF 119 B.0.0 051-8245 16 OF 53 18 17 17 19 18 6 39 17 17 12 12 17 17 17 12 17
A VC IRQ* OVGATE OVSENS DVCC SCL SDA NTCBIAS GND NTC CLPROG PROG VBUS THRML WALL SW ACPR* IDGATE VOUT BAT BATSENS PAD OUT OUT IN IN G S D OUT IN IN OUT VC IRQ* OVGATE OVSENS DVCC SCL SDA NTCBIAS GND NTC CLPROG PROG VBUS THRML WALL SW ACPR* IDGATE VOUT BAT BATSENS PAD G S D D G S D G S D G S IN D G S IN D G S D G S IN IN BI PP PP DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 CHANGE TO A SMALLER FUSE FOR H3 APN:998-2616 SYSTEM CURRENT 3.0A MAX (ONLY NEEDED WHEN BATTERY ISN’T PRESENT) (CAN REMOVE FOR PRODUCTION) (REPLACE SENSE SHORTS WITH 0 OHM RESISTORS TO REMOVE AMANDA???) (644 OHM FOR 0.16A FOR DEEP DISCHG) (825 OHM FOR 1.5A) (644 OHM FOR 0.16A FOR DEEP DISCHG) (825 OHM FOR 1.5A) (3.09K OHM FOR 1.26A) (3.09K OHM FOR 1.26A) (MAKE SURE WE HAVE A LARGE COPPER NC NC NC NC (CHANGE I2C BUS) BATT_POS (PULLUPS ON PAGE 10) (PULLUPS ON PAGE 10) ID=7.8A RDSON=0.015@VGS=-2.5V (MAKE SURE THERE IS A PULLUP) (PULLUPS ON PAGE 10) (PULLUPS ON PAGE 10) ID=7.8A RDSON=0.015@VGS=-2.5V (NEEDED TO DISCHARGE BEYOND 2A) (NEEDED TO DISCHARGE BEYOND 2A) DCR=60.1 MOHM DCR=60.1 MOHM (1.78K OHM FOR 2.1A) (1.78K OHM FOR 2.1A) (MAKE SURE THERE IS A PULLUP) NOTE: VERIFY PINOUT OF BATTERY CONNECTOR (FIGURE OUT NTC BIAS VALUE) MAIN SUPPLY/BATTERY CHARGER POUR TO DISSIPATE HEAT) PPVCC_MAIN_FUSE NP0-C0G 25V 201 33PF 5% 10% 16V X7R 201 1000PF TP-1P0-TOP FUNC_TEST=TRUE NOSTUFF 5AMP-32V 0603 OMIT 1000PF X7R 16V 10% 201 X5R 10% 0.1UF 6.3V 201 4021/16W MF-LF1% 6.04K 5% 1/20W 201 MF 0 IHLP2525AH-SM 3.3UH-3.25A CRITICAL 0.01UF 10V X5R 10% 201 6.3V 20% 22UF X5R-CERM 603 10% 10UF X5R 25V 805 CRITICAL 1/20W 1% MF 3.01K 201 QFN LTC4099 CRITICAL 16 19 7192628333644 7192628333644 CRITICAL PWRPK-1212-8 SI7107DN NOSTUFF X5R 201 6.3V 10% 0.1UF 1% 0.050 1/6W MF-HF 402 NOSTUFF MF 1% 0.5 1/16W 402 0.1UF 10% X5R 25V 402 201 470K 1/20W MF 1% MF 1/20W 1% 100K 201 19201 X5R 10V 0.01UF 10% 71213263544 712132635 16 5% 1/20W 201 MF 0 805 10% 10UF X5R 25V CRITICAL QFN LTC4099 CRITICAL 402 MF-LF 1/16W 1% 6.04K PWRPK-1212-8 CRITICAL SI7107DN IHLP2525AH-SM 3.3UH-3.25A CRITICAL 201 6.3V 0.1UF 10% X5R 10% 1000PF 201 16V X7R 201 100K 1% 1/20W MF 201 470K 1/20W MF 1% 201 0 5% 1/20W MF CMLDM8002AG SOT563 SOT563 CMLDM8002AG 1% MF 1/20W 201 17.4K 1/20W MF 1% 201 17.4K SSM3K15FV SOD-VESM-HF 8 MF 1% 100K 201 1/20W 1/20W MF 1% 4.42K 201 SSM3K15FV SOD-VESM-HF 6 100K 201 1/20W MF 1% 201 2.94K 1/20W MF 1% 201 825 1/20W MF 1% SOD-VESM-HF SSM3K15FV 402 25V 0.1UF X5R 10% 1/20W MF 1% 4.42K 201 1% MF 1/20W 3.01K 201 201 1/20W MF 1% 100K SOD-VESM-HF SSM3K15FV 1/20W MF 1% 100K 201 6 8 201 1% MF 1/20W 825 201 1% MF 1/20W 2.94K 22UF 20% 6.3V X5R-CERM 603 22UF 20% 6.3V X5R-CERM 603 SM SM 201 MF 0 1/20W 5% 201 MF5% 1/20W 0 10K 1% 1/20W MF 201 NOSTUFF 201 1/20W MF 1% 10K 6.3V 20% 22UF X5R-CERM 603 201 5% 33PF 25V NP0-C0G 0201-1 240-OHM-0.2A-0.8-OHM 201 0 MF 1/20W 5% 719 10% 0.01UF X5R 10V 201 201 10V X5R 0.01UF 10% 201 10% 16V X7R 1000PF 1000PF X7R 16V 10% 201 NOSTUFF CRITICAL FC-SM BATT-K48 B15G CRITICAL 20% 6.3V 150UF TANT-1 NOSTUFF B15G CRITICAL 20% 6.3V 150UF TANT-1 NOSTUFF B15G CRITICAL 20% 6.3V 150UF TANT-1 201 NP0-C0G 25V 27PF 5% SM P4MM NOSTUFF NOSTUFF P4MM SM GDZ-0201 GDZT2R6.8 CRITICAL 25V CERM 0201 82PF 5% 1% MF 1/20W 20K 201 CRITICAL DFN1411-3 ZXTN26020DMF CRITICAL ZXTN26020DMF DFN1411-3 1% MF 1/20W 20K 201 GDZ-0201 GDZT2R6.8 CRITICAL RES,FF,0 OHM,1/10W,0603,5%SMD,LF,0.020110S0550 F1900 CRITICAL1 CHARGER SYNC_DATE=12/04/2009SYNC_MASTER=MARK VOLTAGE=4.7V MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR PPVCC_MAIN_FUSE MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.25 MM BATT_SWI_CONN_R NET_SPACING_TYPE=ANLG BATT_NTC_CONN_R DIDT=TRUE NET_SPACING_TYPE=SWITCHNODE MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.25 MM LAND_DK_SW PORT_DK_SW MIN_NECK_WIDTH=0.25 MM MIN_LINE_WIDTH=0.6 MM NET_SPACING_TYPE=SWITCHNODE DIDT=TRUE PORT_DK_WALL LAND_DK_WALL BATT_POS_F BATTERY_SWI LD_OVSENS_R NET_SPACING_TYPE=ANLG VOLTAGE=6V LAND_DK_OVSENS PORT_DK_STAT PORT_DK_WALL LAND_DK_STAT LAND_DK_WALL NET_SPACING_TYPE=ANLG BATT_NTC_CONN PORT_DK_CLPROGPORT_DK_CLPROG_R PORT_DK_CLPROG_F LAND_DK_CLPROGLAND_DK_CLPROG_R LAND_DK_CLPROG_F PD_OVSENS_R NET_SPACING_TYPE=ANLG VOLTAGE=6V PORT_DK_OVSENS MIN_LINE_WIDTH=0.2 MM PORT_DK_IDGATE NET_SPACING_TYPE=ANLG MIN_NECK_WIDTH=0.1 MM I2C0_SCL_1V8 I2C0_SDA_1V8 =PP1V8_CHGR MIN_LINE_WIDTH=0.2 MM LAND_DK_IDGATE NET_SPACING_TYPE=ANLG MIN_NECK_WIDTH=0.1 MM LAND_DK_OVGATE I2C2_SCL_3V0 I2C2_SDA_3V0 =PP3V0_IO_CHGR LAND_PMU_IRQ_L LAND_DK_IRQ_L PORT_PMU_IRQ_L PORT_DK_IRQ_L PORT_DK_HI_I PORT_DK_DDIS_CHG LAND_DK_DDIS_CHG LAND_DK_PROG LAND_DK_HI_I LAND_DK_PROG_R PORT_DK_PROG_R PORT_DK_PROG BATTSNS NET_SPACING_TYPE=ANLG BATTSNS_S NET_SPACING_TYPE=ANLG NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM MIN_NECK_WIDTH=0.25 MM MIN_LINE_WIDTH=0.6 MM BATT_VCC_CURSNS BATT_POS_RC BATT_NTC_CONN BATT_NTC_CONN CHGR_NTCBIAS CHGR_NTCBIAS MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_NECK_WIDTH=0.25 MM MIN_LINE_WIDTH=0.6 MM BATT_POS VOLTAGE=4.2V PPVCC_MAIN NET_SPACING_TYPE=ANLG ECHGR_BATTSNS PORT_DK_OVGATE LAND_OVP_B PORT_OVP_B PORT_DK_VBUS VOLTAGE=6.1V NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM MIN_NECK_WIDTH=0.25MM MIN_LINE_WIDTH=0.60MM LAND_DK_VBUS MAX_NECK_LENGTH=3 MM MIN_NECK_WIDTH=0.25MM MIN_LINE_WIDTH=0.60MM NET_SPACING_TYPE=PWR VOLTAGE=6.1V BATT_POS_F VOLTAGE=4.2V MAX_NECK_LENGTH=3 MM MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.25 MM NET_SPACING_TYPE=PWR C1922 1 2 C1924 1 2 TP19001 F1900 1 2 C19051 2 C19041 2 R1900 1 2 R1901 1 2 L1900 1 2 C1901 1 2 C19081 2 C1900 1 2 R19031 2 U1900 18 11 6 19 15 9 10 8 2 3 1 20 7 16 17 14 21 13 4 12 5 Q1901 5 4 1 2 3 C19381 2R1921 1 2 R19071 2 C19021 2 R19061 2 R1905 1 2 C1951 1 2 R1951 1 2 C1950 1 2 U1950 18 11 6 19 15 9 10 8 2 3 1 20 7 16 17 14 21 13 4 12 5R1950 1 2 Q1951 5 4 1 2 3 L1950 1 2 C19541 2 C19551 2 R1955 1 2 R19561 2 R1920 1 2 Q1900 6 1 2 Q1900 3 4 5 R19101 2 R19601 2 Q1902 3 1 2 R19121 2 R19111 2 Q1903 3 1 2 R19141 2 R19631 2 R19541 2 Q1953 3 1 2 C19521 2 R19611 2 R19531 2 R19641 2 Q1952 3 1 2 R19621 2 R19041 2 R19131 2 C19531 2 C19031 2 XW1900 1 2 XW1920 1 2 R1965 1 2 R1915 1 2 R1930 1 2 R19021 2 C19091 2 C1923 1 2 FL1900 1 2 R1941 1 2 C1906 1 2 C1956 1 2 C1907 1 2 C1957 1 2 J1900 1 2 3 4 C1910 1 2 C1911 1 2 C1912 1 2 C1913 1 2 PP1900 1 PP1950 1 DZ1900 12 C1925 1 2 R19161 2 Q19041 3 2 Q19541 3 2 R19661 2 DZ1950 12 19 OF 119 B.0.0 051-8245 17 OF 53 17 17 15 17 16 16 17 16 17 17 16 15 15 18 18 18 17 17 17 17 15 15 16 16 15 17
VDD_LDO_10 ADIO ON_BUF VLDO9_DSW VLDO9 WLED2 WLED1 WIFIDIG VSS VLDO_12 VLDO_11 VLDO_10 VLDO_8 VLDO_7 VLDO_6 VLDO_5 VLDO_4 VLDO_3 VLDO_2 VLDO_1 VLCM2 VLCM1 VIB_PWM_EN VIB VDD_VIB VDD_OUT VDD_OUT_S VDD_LDO_12 VDD_LDO_11 VDD_LDO_3_5_8 VDD_LDO_2 VDD_LDO_1_6 VDD_LDO4_7 VDD_LCM_SW VDD_LCM VDD_BUCK_1_2 VBUS_PROT_S VBUS_PROT VBUCK2_FB VBUCK2 VBUCK1_FB VBOOST_LCM LX_LCM LX_CHG LX2 LX1 LCM_ISENSE LCM2_EN CPU_1V8 BOOST_SENSEP IBAT_S IBAT VBUS_OV VBUS VBAT BST_PROT LX_LED VCENTER VCC_MAINUSB/BAT 1V8 VCORE LDOLED_BOOSTLCM/GRAPEVIB (2 OF 2) G D S G S D CE VOUT VDD GND II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL (100MA; 0.6-1.3V; SUPPLIED FROM BUCK2; CAN BE USED IN HIB) NOTE: DELAY 0.1MS LAYOUT NOTE: PLACE NEAR U0652 (1.5A MAX; 0.2A IN HIB) REFERENCED TO VDD_OUT TO PREVENT VOLTAGE DROP, SUCH AS GPIO NOTE: FOR ECHGR, SHORT VBAT AND VDDOUT FOR I/O DIRECTLY (PLACE ONE 1UF CAP AT EACH VDD INPUT) (1.26A MAX) (150MA; 1.7-3.0V; LOW NOISE; CAN BE SUPPLIED FROM BUCK2) (200MA; 2.5-3.55V; CAN BE 300MA BYPASS; CAN BE USED IN HIB) (10MA; 2.0-3.55V; CAN BE USED IN HIB) (250MA; 2.5-3.6V; CAN BE USED IN HIB; CAN BE 300MA BYPASS) (300MA; 1.2-1.5V; ONLY SUPPLIED FROM BUCK2; CAN BE USED IN HIB) (150MA; 2.5-3.6V; CAN BE 1 OHM BYPASS WITH 300MA LIMIT) (150MA; 2.5-3.55V; CAN BE 300MA BYPASS) (100MA; 1.65-1.8V; LOW NOISE; SUPPLIED FROM BUCK2) (50MA; 2.5-3.3V; LOW NOISE) (100MA; 1.8-3.3V; CAN BE CONTROLLED BY BUTTON 2) (2.0A MAX) (2MA; USED FOR 100K PULLUPS) (RON=2.5 OHM) TO 4.7UF) (CHANGED (CHECK THESE INDUCTORS????) (CHECK THESE INDUCTORS????) N88 DCR=406MOHM DCR=105MOHM DCR=76.6MOHM N88 DCR=98MOHM CHECK CURRENT USED AND V DROP????) (CHANGED TO 4.7UF) (CAN I LEAVE BL BOOST UNCONNECTED????) (RON=0.5 OHM) (RON=0.5 OHM) (CAN I LEAVE VIBE UNCONNECTED????) I2C ADDRESS: 1110100X (E8H) (REVERSE VOLTAGE PROTECTION) (DERIVED FROM CHARGER INPUTS) (CHECK WHICH NEED TO BE TIED TO 1.8V???) (CAN I LEAVE VDD_VIB UNCONNECTED TO REDUCE STATIC POWER DRAIN?) (100MA; 1.5-4.6V) ANY ISSUES??) (BATT IS FLOATING NOTE: SUPPLY ASHLEY INTERNAL POWER (PULLDOWN INT) (PULLDOWN INT) TO 4.7UF) (CHANGED TO 2.2UF)(CHANGED TO 2.2UF) (CHANGED TO 2.2UF) (CHANGED TO 2.2UF) (CHANGED TO 2.2UF) (CHANGED(CHANGED TO 2.2UF) TO 2.2UF) (CHANGED (400MA) 10% 0.1UF X5R 6.3V 201 CERM 6.3V 1UF 10% 402 402 CERM 6.3V 1UF 10% 2.2UF X5R 402 6.3V 10% X5R 2.2UF 402 10% 6.3V 2.2UF X5R 10% 6.3V 402 2.2UF X5R 10% 6.3V 402 10% 1UF 6.3V CERM 402 2.2UF X5R 6.3V 10% 402402 20% 4.7UF X5R-CERM 6.3V 220UF-16-MOHM CASE-B18-SM POLY-TANT 20% CRITICAL 2.5V 603 20% 10UF X5R 6.3V 603 20% 10UF X5R 6.3V X5R 603 20% 6.3V 10UF CRITICAL MDT2520CN-SM 2.2UH 603 20% 6.3V X5R 10UF 402 0 5% 1/16W MF-LF NOSTUFF 25V NP0-C0G 18PF 5% 201 CERM 25V 82PF 5% 0201 UFBGA ASHLEY CRITICAL OMIT CMLDM8002AG SOT563 100K MF 1/20W 1% 201 1UF CERM 6.3V 10% 402 402 5% 0 1/16W MF-LF 5% 0 1/20W MF 201 NOSTUFF SHORT-0201 402 0 5% 1/16W MF-LF SHORT-0201 NOSTUFF 20% 4.7UF X5R-CERM 6.3V 402 20% 6.3V X5R-CERM 402 4.7UF 201 6.3V 20% 0.22UF X5R 402 10% 1UF 6.3V CERM 6.3V CERM 10% 1UF 402 10% 1UF X5R 16V 402 10% 1UF 6.3V 402 CERM CRITICAL SOT723 NTK3134NTXXH SOD882 PMEG2005AEL CRITICAL 50V 201 22PF 5% CERM 402 1UF 10% 16V X5R 10V 10UF 20% X5R 805 1% 0.1 201 1/20W MF 402 1UF 6.3V CERM 10% SHORT-0201 NOSTUFF CRITICAL 2.2UH-1.8A-155MOHM VLS252012-SM CERM 402 10% 1UF 6.3V 6.3V CERM 10% 1UF 402 PLACEMENT_NOTE=PLACE NEAR U0652 PLACEMENT_NOTE=PLACE NEAR U0652 6.3V X5R-CERM 4.7UF 20% 402 2.2UF X5R 6.3V 10% 402 201 0.01UF 10V 10% X5R 10K 201 MF 1/20W 1% 25V CERM 100PF 5% NOSTUFF 201 X5R 6.3V 0.1UF 10% 201 MF 1/20W 201 5% 0 5% 0 1/20W MF 201 B15G TANT-1 150UF 6.3V 20% CRITICAL RP106Z121D WLCSP4 CRITICAL PLACEMENT_NOTE=PLACE NEAR U0652 6.3V X5R 603 10UF 20% 10% 1UF CERM 6.3V 402 6.3V 1UF 10% CERM 402 10% 1UF 402 CERM 6.3V 2.2UF X5R 402 10% 6.3V CRITICAL IHLP2525AH-SM 4.7UH-8.0A X5R 603 20% 10UF 6.3V 10UF 6.3V 603 X5R 20% 1UF CERM 402 6.3V 10% CRITICAL1 U2000338S0805 IC,PMU,ASHLEY,D1815A2,OTPXX,UFBGA121,K48 SYNC_MASTER=MARK SYNC_DATE=12/04/2009 PMU P1V8_1V2_SS PP1V2_SDRAM =PP1V8_SDRAM_1V2 DOCK_VBUS USB_PWRB_VIN_R MIN_NECK_WIDTH=0.25 MM VOLTAGE=5V NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.3 MM NET_SPACING_TYPE=PWR VBUS_OVSENS USB_PWRB_VIN_GATE USB_PWRB_VIN PP3V3_PORT_ACC PP3V0_IO TP_VIB_PWM_EN TP_LCM2_EN PPVDD_VIB MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM VOLTAGE=1.3V PP1V8_ALWAYS DOCK_VBUS_S TP_SW_BOOST TP_BOOST_PROT BATTSNS TP_VBUS_OVGATE NET_SPACING_TYPE=SWITCHNODE MIN_NECK_WIDTH=0.25 MM MIN_LINE_WIDTH=0.6 MM DIDT=TRUESW_BUCK1 MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.25 MM NET_SPACING_TYPE=SWITCHNODE DIDT=TRUESW_BUCK2 P1V8_FB NET_SPACING_TYPE=ANLG TP_PPVIBE_OUT MIN_NECK_WIDTH=0.25 MM MIN_LINE_WIDTH=0.6 MM DIDT=TRUE NET_SPACING_TYPE=SWITCHNODE LCM_BOOST_SW MIN_NECK_WIDTH=0.25 MM MIN_LINE_WIDTH=0.6 MM NET_SPACING_TYPE=PWR LCM_BOOST_SRC LCM_BOOST_LX DIDT=TRUE NET_SPACING_TYPE=SWITCHNODE MIN_NECK_WIDTH=0.25 MM MIN_LINE_WIDTH=0.6 MM PP1V8_SDRAM VOLTAGE=4.7V MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_NECK_WIDTH=0.25 MM MIN_LINE_WIDTH=0.6 MM TP_PMU_CHG_OUT PP1V8 PP1V8_GRAPE PP3V0_OPTICAL PP3V0_VIDEO PP3V3_LAND_ACC PP1V7_VA_VCP PP3V1_AUDIO PP5V1_OUT PP3V0_LCD PP1V2_H3 PP3V0_HP_DET_BIAS PP3V0_GRAPE PP1V1_H3_PHY PP1V2_AUDIENCE TP_VSW_CHG MIN_NECK_WIDTH=0.25 MM MIN_LINE_WIDTH=0.6 MM NET_SPACING_TYPE=SWITCHNODE DIDT=TRUE VCENTER MIN_NECK_WIDTH=0.25 MM MIN_LINE_WIDTH=0.6 MM NET_SPACING_TYPE=PWR VOLTAGE=5V MAX_NECK_LENGTH=3 MM LCM_BOOST_ISENSE NET_SPACING_TYPE=ANLG NET_SPACING_TYPE=ANLG MIN_NECK_WIDTH=0.1 MM MIN_LINE_WIDTH=0.2 MM LCM_BOOST_GATE BATT_VCC_CURSNS PP1V8_SDRAM TP_BOOST_SENSEP NC_WLED1 NC_WLED2 NC_VLCM1 NC_VLCM2 BATT_VCC_CURSNS BATTSNS_S NC_ADIO NET_SPACING_TYPE=ANLG PPVCORE_FB PPVCORE_H3 =VCC_MAIN_ASH =VCC_MAIN_ASH C2027 1 2 C2025 1 2 C20021 2 C20031 2 C20411 2 C20011 2 C20401 2 C20041 2 C20051 2 C20061 2 C20381 2 C20351 2 C20071 2 C20081 2 C20091 2 L2001 1 2 C2043 12 C2015 1 2 C2016 1 2 C2019 1 2 C2020 1 2 C2022 1 2 C2023 1 2 C2024 1 2 C2026 1 2 C2021 1 2 C20391 2 C20361 2 C20371 2 L2002 1 2 R2019 1 2 C20111 2 C20101 2 U2000 K7 E3 G3 B1 L9 L10 H7 B6 J4 A6 A4 L7 K4 E1 J1 J9 K2 D9 A1 B5 K6 J3 L5 J5 L6 A5 A7 K5 L4 H10 K11 G10 B8 A10 F11 D11 K8 L8 J2 K3 L3 C5 L1 L2 A2 A3 B9 L11 G11 A8 E11 E10 H11 C11 A11 J11 B11 C6 D5 F5 F6 F7 F8 G4 G5 G6 G7 G8 H5 D6 H6 J6 D7 D8 E5 E6 E7 E8 F4 B2 E2 F2 Q2000 3 4 5 R20311 2 C2000 1 2 R20421 2 R2003 1 2 XW20001 2 R2021 1 2 XW20011 2 C2017 1 2 C2018 1 2 C2030 1 2 C2029 1 2 C2028 1 2 C20441 2 Q2005 3 1 2 D2000 1 2 C20471 2 C20461 2 C20451 2 R20441 2 XW2002 1 2 L2003 1 2 C2050 1 2 C2051 1 2 C2054 1 2 R20431 2 C2055 12 R20001 2 R2020 1 2 C2056 1 2 U2001B1 B2 A1 A2 20 OF 119 B.0.0 051-8245 18 OF 53 15 15 16 2716 15 15 15 17 1518 15 19 15 15 15 15 15 15 15 15 15 15 15 15 15 1718 15 18 1718 17 7 15 1518 15 18
IN OUT OUT IN IN OUT IN OUT IN IN IN IN IN IN OUT OUT IN IN IN IN IN IN IN IN G D S BI INPUTI2CRESETWDOG GPIO TEMPERATURE REFERENCES INPUT DIGITALANALOG (1 OF 2) T3 ACC_DET ACC_ID ADC_IN7 BRICK_ID FW_DET GPIO1 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 IREF IRQ* KEEPACT RESET* RESET_IN SCL SDA SHDN SWI T1 T2 T4 TBAT TCAL VDD_REF XTAL1 GPIO10 GPIO9 GPIO2 GPIO3 ADC_REF VDD_RTC VREF XTAL2 BUTTON3 BUTTON2 BUTTON1 II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 DO WE NEED NTC??? (DISABLE CHARGER) (2.5V ALWAYS ON PULLUP IN BMU) (H3 PULLUP INT) (H3 PULLUP EXT) (DESENSE AND VCC_MAIN PULLUP EXT) (DESENSE AND VCC_MAIN PULLUP EXT) (DESENSE AND VCC_MAIN PULLUP EXT) (ASRTD IN STDBY OR HIB; 3.0V IO PULLUP EXT) (50UA CURRENT SOURCE) (INPUT TO ADC / 0.5) (R FOR TEMP CALIBRATION) (1.8V_SDRAM PULLUP EXT) (I-LIM R ON CONN PAGE; BATT_POS PULLUP EXT) (VCC_MAIN PULLUP EXT) (VCC_MAIN PULLUP INT) (VCC_MAIN PULLUP INT) (3.0V_HP_DET PULLUP EXT) (3.0V_HP_DET PULLUP EXT) (ALWAYS ON RAIL) (I2C REGS, AND REF) (SUPPLY FOR ADC, OTC) (FOR ACC IDENTIFY) (TEMPERATURE SUPERVISION)(1.2V) (TEMPERATURE SUPERVISION) NOTE: WILL WAKE FROM STANDBY ON INSERTION/EXTRACTION) (PULLDOWN INT) (DIFFER FROM N90) (PULLDOWN INT) (REVERSE VOLTAGE PROTECTION) 25V 5% NPO 15PF 201 639 24 44 39 6 36 38 41 17 11 17 640 33 9 7172628333644 7172628333644 CRITICAL 32.768K-20PPM-12.5PF 2012 639 6 0.1UF 10% 6.3V 201 X5R 10V CERM 402 10% 0.22UF 16V 10% X7R 1000PF 201 10% 0.1UF 6.3V X5R 201 201 15PF NPO 25V 5% MF 1/20W 1% 201 200K 6 22 6 MF 0.1% 3.92K 402 1/16W 201 MF 4.02K 1/20W 1% 0201 10KOHM-1%0201 10KOHM-1%0201 10KOHM-1%0201 10KOHM-1% 38 640 39 X5R10% 10V 201 0.01UF 627 39 1% 1/20W MF 100K 201 CMLDM8002AG SOT563 0 5% 1/20W MF 201 MF 1/20W 100K 1% 201 NOSTUFF 100K MF 1/20W 1% NOSTUFF 201 7 17 1% 1/20W MF 210 201 GDZ-0201 GDZT2R5.1B CRITICAL CRITICAL UFBGA ASHLEY 201 CERM 100PF 25V 5%CERM 100PF 25V 5% 201 5% 25V 100PF CERM 201 5% 25V 100PF CERM 201 5% 25V 100PF CERM 201 PMU SYNC_MASTER=MARK SYNC_DATE=12/04/2009 BOARD_TEMP1 BOARD_TEMP3 BOARD_TEMP2 VOLTAGE=5V NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM USB_PWRA_VIN_R MIN_LINE_WIDTH=0.2 MM MIN_NECK_WIDTH=0.1 MMMIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.3 MM VOLTAGE=5V NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM USB_PWRA_VIN_FET USB_PWRA_VIN_GATE USB_PWRA_VIN PMU_RESET_IN PP1V8 SWI_BLCTRL PMU_EXTAL NET_SPACING_TYPE=CRYSTALNET_SPACING_TYPE=CRYSTAL PMU_XTAL USB_BRICKID PMU_IREFNET_SPACING_TYPE=PWR NET_SPACING_TYPE=PWR PMU_VDD_REF PMU_ADC_REF NET_SPACING_TYPE=ANLG NET_SPACING_TYPE=PWR PMU_VREF CLK_32K_X17 CLK_32K_PMU IO_XPNDR_INT_L LAND_DOCK_ACC_DET_L BB_PMU_ON_R_L DOCK_UART_CTRL LAND_PMU_IRQ_L PORT_PMU_IRQ_L AUD_MIK_HS1_INT_L HOME_L ONOFF_L RINGER_A PORT_DOCK_ACC_DET_L PORT_DOCK_ACCID ADC_IN7 PMU_SHDWN RESET_L PMU_IRQ_L I2C0_SDA_1V8 I2C0_SCL_1V8 NET_SPACING_TYPE=PWR PMU_VDD_RTC KEEPACT =PP1V8_ALWAYS BATTERY_SWI BOARD_TEMP4 PMU_NTC NET_SPACING_TYPE=PWR PMU_TCAL C21061 2 Y2100 1 2 C2105 1 2 U2000 K9 F3 F10 G2 C8 H8 J8 K10 J10 C2 D1 C1 D3 D4 H4 K1 H3 E4 D2 F9 C4 H9 C7 B7 B3 C3 C10 J7 B10 D10 B4 A9 E9 C9 H2 F1 G9 G1 H1 C21021 2 C21031 2C21011 2 C21041 2 R21001 2 R21091 2 R21081 2 R2104 1 2 R2103 1 2 R2102 1 2 R2101 1 2 C2107 12 R21111 2 Q2000 6 1 2 R2110 1 2 R2112 1 2 R21071 2 R2113 1 2 DZ2100 12 C2108 1 2 C2109 1 2 C2110 1 2 C2111 1 2 C2112 1 2 21 OF 119 B.0.0 051-8245 19 OF 53 16 1518 3839 615
D G S IN BURST VC FB VIN SHDN*/SS RLIM RT THRM SGND PGND VOUT SW1 SW2 PAD D SG D SG D S G II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 3.3V SUPPLY T(SS)=~1MS F=1KHZ K48 AVG=0.12A PEAK=0.12A 3.3V MLC POWER BUDGET 100MOHM @-1.5V SIA413DJ P-TYPE SIA413DJ 3.32V NOMINAL RDS(ON) MOSFET CHANNEL 3 AIMAX +/- 8VVGS MAX 3.3V POWER BUDGET PEAK=1.5A AVG=1.25A K48 3.29V NOMINAL <R1> <R2> VOUT=1.22*(1+R1/R2) DCR=85 MOHM 10% 4.7UF X5R-CERM 6.3V 603 0.015UF 10% X5R 6.3V 0201 1% 1/20W MF 47K 201 NOSTUFF 1% MF 1/20W 201 10K SOD-VESM-HF SSM3K15FV 8 1% MF 1/20W 100K 201 DFN CRITICAL LTC3442 201 1/20W MF 1% 1M 16V CERM-X5R 0.022UF 10% 402 MF 1/20W 1% 43.2K 201 20% 6.3V 22UF X5R-CERM 603 PIMB051H-SM 4.7UH-4A CRITICAL SSM6N15FEAPE SOT563100K 1/20W MF 1% 201 SOT563 SSM6N15FEAPE 201 1% MF 1/20W 100K 200K 1% MF 1/20W 201 1% MF 340K 201 1/20W 1% MF 1/20W 10K 201 10% 220PF 25V 201 X7R-CERM 10% 470PF X5R-X7R 16V 201 201 10K 1% MF 1/20W 5% 10PF NPO 25V 201 201 249K MF 1/20W 1% 402 0.01UF X7R 10% 25V 20% TANT-1 150UF 6.3V CRITICAL B15G CRITICAL SC70-6L SIA413DJ 1% MF 1/20W 39K 201 16V X7R 1000PF 10% 201 201 16V X7R 1000PF 10% 5% 100PF 201 CERM 25V 25V CERM 201 100PF 5%5% 82PF 0201 CERM 25V 201 MF 1/20W 5% 0 NOSTUFF 3.3V SUPPLY SYNC_MASTER=MARK SYNC_DATE=12/04/2009 BB_3V3_BURST PP3V3_OUT DIDT=TRUE MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.25 MM BB_3V3_PHASE2 NET_SPACING_TYPE=SWITCHNODE BB_3V3_VC NET_SPACING_TYPE=PWR NET_SPACING_TYPE=PWR BB_3V3_FB P3V3MLC_EN BB_3V3_FB_RC BB_3V3_VOUT_RC MLC_PWR_EN P3V3MLCWR_SS PP3V3_MLC_OUT MIN_NECK_WIDTH=0.25 MM BB_3V3_PHASE1 MIN_LINE_WIDTH=0.6 MM NET_SPACING_TYPE=SWITCHNODE DIDT=TRUE BB_3V3_RT BB_3V3_VC_L =VCC_MAIN_3V3 BB_3V3_SS BB_3V3_EN =PP3V0_IO_3V3 =VCC_MAIN_3V3 C24521 2 C2451 1 2 R2452 1 2 R24511 2 Q2451 3 1 2 R24501 2 U2400 7 12 5 10 2 3 1 4 6 13 11 9 8 R24001 2 C2408 1 2 R24011 2 C2400 1 2 L2400 1 2 Q2400 3 5 4 R24061 2 Q2400 6 2 1 R24081 2 R24051 2 R24041 2 R24031 2 C24021 2 C24011 2 R24021 2 C24051 2 R24091 2 C2409 1 2 C24031 2 Q2450 1 3 47 R24531 2 C24101 2 C24531 2 C24601 2 C24611 2 C24111 2 R24101 2 24 OF 119 B.0.0 051-8245 20 OF 53 15 15 1520 15 1520
OUT IN S D G GND VOUT VIN S S D N-CHANNEL G D G P-CHANNEL OUT OUT OUT OUT OUT OUT VREF DIM ENA VSYNC SSTCMP ISEN4 ISEN5 ISEN3 VSEN VIN THRM_PAD LRT LPF ISWSEN ISET ISEN6 ISEN2 ISEN1 GNDA DRV RT GS D D G S IN DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 TO SET BL INTENSITY INDEPENDENT OF H2: FOR 100 PERCENT BL (>=3.3V): R2627=953 FOR 75 PERCENT BL (2.5V): R2627=2.55K FOR 50 PERCENT BL (1.7V): R2627=5.90K (3.3V DRIVER) (FREQ=580KHZ) PLACE U2600 NEAR U1400 LAYOUT NOTE: (R2630 AND R2631 PIN 1 SHOULD BE PLACED NEAR C2604 PIN 2) (OVP @ 2.48V) (IS THIS NEEDED??) (FREE-RUNNING FREQ) (SET TO 20.07MA) (FREQ=8.4KHZ) RDSON=0.015@VGS=-2.5V ID=7.8A LED BOOST/BACKLIGHT CONTROLLER DCR=155.0 MOHM 15 PLACEMENT_NOTE=PLACE NEAR Q2602 PMEG4010BEA SOD-323 CRITICAL 6 201 0 5% 1/20W MF 201 0 1/20W MF 5% NOSTUFF 201 5% 0 1/20W MF CRITICAL SSOT6 FDC5612 PLACEMENT_NOTE=PLACE NEAR C2604 201 6.3V X5R 0.1UF 10% 603 10UF X5R 6.3V 20% 201 1000PF X7R 16V 10% X60003D-41 SOT23-3 CRITICAL 201 10K 1% MF 1/20W 201 10K 1% MF 1/20W 402 1% MF 1/6W 0.4 PLACEMENT_NOTE=PLACE NEAR C2604 AND Q2602 20% 4.7UF X5R 6.3V 402 402 MF-LF 1/16W 1% 115K CRITICAL SOT-963 NTUD3169CZ 5% 100PF CERM 50V 402 402 50V CERM 100PF 5% 402 50V CERM 100PF 5% 1/6W MF 1% 402 0.4 PLACEMENT_NOTE=PLACE NEAR C2604 AND Q2602 50V CERM 100PF 5% 402 5% 82PF 0201 CERM 25V MF-LF 1% 1/16W 402 100 PIMB051H-SM 10UH-3A CRITICAL PLACEMENT_NOTE=PLACE NEAR Q2602 402 X5R 10% 1UF 16V 25 25 25 25 25 25 1% 1.00 1/20W MF 201 NOSTUFF 402 47PF 5% 50V CERM SM PLACEMENT_NOTE=PLACE NEAR U1400 APP001 QFN CRITICAL OMIT CRITICAL 20% 22UF CERM-X5R 6.3V 805 10K NOSTUFF MF 1% 1/20W 201 BKLT_PLL 5% 0 1/20W MF 201 MF 1% 1/6W 0.1 402-HF 0.0047UF NOSTUFF CERM 25V 402 10% 201 MF 1/20W 1% 10K 402 10% 0.1UF X5R 25V CRITICAL PLACEMENT_NOTE=PLACE NEAR J3201 0805 4.7UF X5R-CERM 35V 10% BKLT_PLL 10% 1000PF X7R 16V 201 201 100K 1% 1/20W MF NOSTUFF 10V X5R 2.2NF 10% 201 25V X5R 10% 0.1UF 402 BKLT_PLL PWRPK-1212-8 SI7107DN CRITICAL 0.047UF 16V 10% X7R 402 100K 201 1% 1/20W MF 1/20W MF 5% 10K 201 SOD-VESM-HF SSM3K15FV MF 1/20W 1% 201 100K 2M 201 MF 1/20W 5% NOSTUFF 1/20W MF 1% 10K 201 402 10% 0.01UF X7R 25V 1% 100K 1/20W MF 201 13 1% MF-LF 1M 1/16W 402 100K 201 1/20W MF 1% BKLT_PLL 201 10K 1/20W MF 1% 201 1/20W MF 1% 475 201 1.40K 1/20W MF 1% SM 1% 1/20W MF 3.01K 201 201 MF 1/20W 0 5% 1% 1.00 1/20W MF 201 1% 1.00 1/20W MF 201 1% 1.00 1/20W MF 201 1% 1.00 1/20W MF 201 1% 1.00 1/20W MF 201 1/20W100K 201 1% MF NOSTUFF 201 5% 0 1/20W MF LED BACKLIGHT CONTROLLER SYNC_MASTER=MARK SYNC_DATE=12/04/2009 IC,APP001A,WHT LED BKLGHT CTR,SCRN,QFN20 U2600353S2413 CRITICAL1 LED_IO1_R MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM LED_IO2_R VOLTAGE=0V MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.25 MM GND_LED_PWRGND NET_SPACING_TYPE=ANLG LED_PWM_RC VCC_MAIN_LED_EN MIN_LINE_WIDTH=0.6 MM MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_NECK_WIDTH=0.25 MM MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_NECK_WIDTH=0.25 MM MIN_LINE_WIDTH=0.6 MM VCC_MAIN_FET =PP5V1_LED =VCC_MAIN_LED NET_SPACING_TYPE=PWR LED_SSTCMP GND_LED_PWRGND MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.3 MM LED_IO6_R LED_DIM NET_SPACING_TYPE=ANLG =PP5V1_LED LED_LPF NET_SPACING_TYPE=PWR VCC_MAIN_LED_EN_R MIN_NECK_WIDTH=0.1 MM MIN_LINE_WIDTH=0.2 MM VCC_MAIN_LED_EN_G=PP3V0_LCD MIN_NECK_WIDTH=0.25 mm LED_SW MIN_LINE_WIDTH=0.6 MM NET_SPACING_TYPE=SWITCHNODE DIDT=TRUE LED_BOOST_SINK MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.25 MM DIDT=TRUE NET_SPACING_TYPE=PWR LED_ISWSEN NET_SPACING_TYPE=PWR DIDT=TRUE LED_GATE DIDT=TRUE NET_SPACING_TYPE=ANLG MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.25 MM MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.3 MM LED_IO_1 VCC_MAIN_FET_R MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.25 MM LED_LRT LED_LRT_RC MIN_LINE_WIDTH=0.5 MM VOLTAGE=0V GND_LED_PWRGND_X DIDT=TRUE LED_IO_2 MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM LED_IO_3 MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM LED_IO3_R LED_IO_4 MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM LED_IO4_R LED_IO_5 MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM LED_IO5_R LED_IO_6 MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM GND_LED_PWRGND LED_VSYNC GND_LED_PWRGND =PP3V0_LCD LED_SSTCMP_RC GND_LED_PWRGND BACKLIGHT_EN NET_SPACING_TYPE=PWR LED_VSYNC_R LED_RT LED_ISET GND_LED_PWRGND LED_VSEN NET_SPACING_TYPE=ANLG P4V096_REF NET_SPACING_TYPE=ANLG =PP5V1_LED NET_SPACING_TYPE=ANLG LED_PWR_REF LCD_BKLT_PWM NET_SPACING_TYPE=ANLG LED_PWR_EN_L NET_SPACING_TYPE=ANLG LCD_BKLT_PWM_R GND_LED_PWRGND LED_PWR_IN_5V NET_SPACING_TYPE=ANLG PPLED_OUT C26051 2 XW2601 1 2 D2600 1 2 Q2602 1 2 5 6 3 4 R2631 12 R2630 12 R2629 12 L2600 1 2 C26011 2 R2608 1 2 C26001 2 XW2600 1 2 U2600 20 1 5 13 10 11 12 14 15 16 8 2 19 18 6 7 21 3 4 9 17 C26021 2 R26151 2 R2609 12 R2607 12 C2608 12 R2635 12 C26091 2 C26101 2 R2622 12 C2606 1 2 C26111 2 Q2600 5 4 1 2 3 C2607 1 2 R26141 2 R26161 2 Q2601 3 1 2 R2618 1 2 R2621 12 R2600 12 C26121 2 R2620 12 R26101 2 R26251 2 R26241 2 R26271 2 R26281 2 R26021 2 R2623 12 R2606 1 2 R2605 1 2 R2604 1 2 R2603 1 2 R2617 1 2 R2613 12 R26011 2 R2632 1 2 R2633 1 2 R26341 2 C26141 2 C26131 2 C2615 1 2 U2601 31 2 R26361 2 R26261 2 C2616 1 2 R26111 2 Q2603 6 3 2 5 1 4 C26201 2 C26211 2 C26221 2 C26231 2 C2603 1 2 26 OF 119 B.0.0 051-8245 21 OF 53 21 1521 15 21 1521 1521 MIN_NECK_WIDTH=0.20 MM 21 25 21 1521 21 21 1521 21
II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 DEBUG RESET ACCESS 5% 1/20W MF 201 300 NOSTUFF 300 NOSTUFF 5% 1/20W MF 201 RED-50MCD-20MA 0603 NOSTUFF 201 MF 1/20W 1% 1.5K NOSTUFF SYNC_DATE=09/16/2009SYNC_MASTER=MIAMI DEBUG RESET ACCESS FORCE_DFU PMU_SHDWN PWR_ON_LED =VCC_MAIN_AUDIO R29001 2 R29011 2 LED2900 A K R29021 2 29 OF 119 B.0.0 051-8245 22 OF 53 6 19 1529
CTRL PGND THRML L VIN DO FB SW PAD GND VCCA 1B1 1B2 2A2 1A1 2A1 1A2 2DIR 2OE* 1DIR 1OE* 2B2 2B1 GND VCCB VSTM26 VSTM25 VSTM24 VSTM23 MUX19 MUX17 BON_L0 BON_L1 BON_L2 BON_L3 BON_L4 BON_L5 MUX0 MUX1 MUX2 MUX3 MUX4 MUX5 MUX6 MUX7 MUX8 MUX9 MUX10 MUX11 MUX12 MUX13 MUX16 MUX15 MUX18 MUX20 MUX21 MUX22 MUX23 NC VSTM1 VSTM0 VSTM6 VSTM5 VSTM4 VSTM3 VSTM2 VSTM8 VSTM11 VSTM10 VSTM7 VSTM16 VSTM15 VSTM14 VSTM13 VSTM12 VSTM21 VSTM20 VSTM19 VSTM18 VSTM17 VSTM22 VSTM27 VSTM31 VSTM30 VSTM29 VSTM28 VSTM32 VSTM36 VSTM35 VSTM34 VSTM33 VSTM37 VSTM42 VSTM41 VSTM40 VSTM39 VSTM38 VSTM47 VSTM45 VSTM44 VSTM43 A_AD_R2 A_AD_R1 A_AD_R0 MUX14 VSTM46 GND VSTM9 VDDH VCC_DIG VCCA 1B1 1B2 2A2 1A1 2A1 1A2 2DIR 2OE* 1DIR 1OE* 2B2 2B1 GND VCCB VCC OE A NC Y GND NC OE* II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL MATES WITH RIGHTMOST GRAPE FLEX TAIL NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC P/N 518S0743 MATES WITH LEFTMOST GRAPE FLEX TAIL CONNECTORS TO GRAPE FLEX (A -> B) (A -> B) NC NC APN:311S0485 APN:311S0485 LOAD CURRENT ~ 153UA BOOST CONVERTOR NC 603-1 X5R 10% 25V 1UF VLF 4.7UH-700MA-280MOHM QFN CRITICAL TPS61045 SM 0.1UF 10% 6.3V X5R 201 6.3V X5R 0.1UF 10% 201MF 1/20W 201 10K 5% MF 1/20W 201 10K 5% 0.1UF 6.3V X5R 10% 201 6.3V 201 0.1UF 10% X5R 10K MF 1/20W 201 5%5% 201 1/20W MF 10K MF 1/20W 201 5% 3.3K 5% 10K 201 1/20W MF 6.3V X5R 10% 201 0.1UF 6.3V X5R 10% 201 0.1UF 201 5% 1/20W MF 10K 201 5% 0 1/20W MF 1K NOSTUFF MF 1/20W 201 5% SN74AVCH4T245RSV CRITICAL PQFP1 502250-8451 F-RT-SM CRITICAL CRITICAL 502250-8451 F-RT-SM 0.1UF 10% 25V X5R 402 0.1UF 10% 25V X5R 402 0.1UF 10% 25V X5R 402 201 10% 0.1UF X5R 6.3V CRITICAL BGA GROUNDHOG SN74AVCH4T245RSV CRITICAL PQFP1 OMIT SN74LVC1G126DRYR LLP CRITICAL SN74LVC1G125 LLP CRITICAL 402 MF-LF 1/16W 1M 1% 201 1/20W MF 1% 71.5K 603 10% 6.3V X5R 2.2UF 201 33PF NP0-C0G 5% 25V B0520WSXG SOD-323 402 X5R 16V 10% 0.1UF 1% 0.1 1/20W MF 201 IC,SNGL 3-STATE BUFFER,5-PIN,DRY U3010311S0506 CRITICAL1 GRAPE 1 OF 2 SYNC_DATE=12/21/2009SYNC_MASTER=JAMES Z1_CS_LZ2_H_CS_L Z1_CS_OE GRAPE_MISOAP_GRAPE_MISO =PP3V0_GRAPE BOOST_EN PP18V_GRAPE MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.6MM VOLTAGE=18V AGND 0.2MM 0.2MM BOOST_L =PP3V0_GRAPE 0.2MM BOOST_SW BOOST_FBK PP18V_R_GRAPE VOLTAGE=18V MIN_NECK_WIDTH=0.4MM MIN_LINE_WIDTH=0.6MM Z1_MOSI =PP3V0_GRAPE AP_GRAPE_MISO Z1_CS_OE =PP1V8_GRAPE GRAPE_SCLK GRAPE_MOSI GRAPE_Z2_RESET_L MAKE_BASE=TRUE AP_GRAPE_SCLK AP_GRAPE_CS_N AP_GRAPE_MOSI GRAPE_Z1_RESET_L GRAPE_CS_L =PP3V0_GRAPE =PP3V0_GRAPE GRAPE_HOST_INT_L Z1_B_ADR<1> MAKE_BASE=TRUE AP_GRAPE_HOST_INT_N GRAPE_RESET_N Z2_H_CS_L Z1_CS_OE GRAPE_FW_DNLD_EN_L =PP1V8_GRAPE Z1_SCLK Z1_MISO AP_GRAPE_SCLK AP_GRAPE_CS_N AP_GRAPE_MOSI MT_PANEL_IN<0> MT_PANEL_IN<5> MT_PANEL_IN<11> MT_PANEL_IN<13> MT_PANEL_IN<15> MT_PANEL_IN<1> MT_PANEL_OUT<6> MT_PANEL_OUT<8> MT_PANEL_OUT<10> MT_PANEL_OUT<12> MT_PANEL_IN<6> MT_PANEL_IN<10> MT_PANEL_IN<12> MT_PANEL_IN<26> MT_PANEL_IN<24> MT_PANEL_OUT<0> MT_PANEL_OUT<2> MT_PANEL_OUT<4> MT_PANEL_IN<2> MT_PANEL_IN<4> MT_PANEL_IN<8> MT_PANEL_IN<19> MT_PANEL_IN<17> MT_PANEL_OUT<13> MT_PANEL_OUT<11> MT_PANEL_OUT<7> MT_PANEL_OUT<9> MT_PANEL_IN<29> MT_PANEL_OUT<3> MT_PANEL_IN<3> MT_PANEL_IN<25> MT_PANEL_IN<27> MT_PANEL_IN<27> MT_PANEL_OUT<5> MT_PANEL_OUT<1> MT_PANEL_IN<25> MT_PANEL_IN<23> MT_PANEL_IN<21> MT_PANEL_IN<9> MT_PANEL_IN<7> MT_PANEL_IN<18> MT_PANEL_IN<16> MT_PANEL_IN<14> MT_PANEL_IN<28> MT_PANEL_IN<28> MT_PANEL_IN<26> MT_PANEL_IN<24> MT_PANEL_IN<22> MT_PANEL_IN<20> MT_PANEL_OUT<15> MT_PANEL_OUT<20> MT_PANEL_OUT<26> MT_PANEL_OUT<28> MT_PANEL_OUT<30> MT_PANEL_OUT<16> MT_PANEL_IN<7> MT_PANEL_IN<5> MT_PANEL_IN<3> MT_PANEL_IN<1> MT_PANEL_OUT<21> MT_PANEL_OUT<25> MT_PANEL_OUT<27> MT_PANEL_IN<17> MT_PANEL_IN<15> MT_PANEL_IN<13> MT_PANEL_IN<11> MT_PANEL_IN<9> MT_PANEL_OUT<17> MT_PANEL_OUT<19> MT_PANEL_OUT<23> MT_PANEL_OUT<34> MT_PANEL_OUT<32> MT_PANEL_IN<0> MT_PANEL_IN<2> MT_PANEL_IN<6> MT_PANEL_IN<4> MT_PANEL_IN<20> MT_PANEL_IN<10> MT_PANEL_OUT<18> MT_PANEL_IN<22> MT_PANEL_IN<18> MT_PANEL_IN<8> MT_PANEL_IN<12> MT_PANEL_IN<14> MT_PANEL_IN<16> MT_PANEL_OUT<38> MT_PANEL_OUT<36> MT_PANEL_OUT<24> MT_PANEL_OUT<22> MT_PANEL_OUT<33> MT_PANEL_OUT<31> MT_PANEL_OUT<29> MT_PANEL_OUT<14> MT_PANEL_IN<19> MT_PANEL_IN<21> MT_PANEL_IN<23> MT_PANEL_OUT<39> MT_PANEL_OUT<37> MT_PANEL_OUT<35> =PP3V0_GRAPE_MARIO1 PP18V_GRAPE MT_PANEL_OUT<26> MT_PANEL_OUT<25> MT_PANEL_OUT<24> MT_PANEL_OUT<23> MT_PANEL_OUT<1> MT_PANEL_OUT<6> MT_PANEL_OUT<5> MT_PANEL_OUT<4> MT_PANEL_OUT<3> MT_PANEL_OUT<2> MT_PANEL_OUT<8> MT_PANEL_OUT<11> MT_PANEL_OUT<10> MT_PANEL_OUT<7> MT_PANEL_OUT<16> MT_PANEL_OUT<15> MT_PANEL_OUT<14> MT_PANEL_OUT<13> MT_PANEL_OUT<12> MT_PANEL_OUT<21> MT_PANEL_OUT<20> MT_PANEL_OUT<19> MT_PANEL_OUT<18> MT_PANEL_OUT<17> MT_PANEL_OUT<22> MT_PANEL_OUT<27> MT_PANEL_OUT<31> MT_PANEL_OUT<30> MT_PANEL_OUT<29> MT_PANEL_OUT<28> MT_PANEL_OUT<32> MT_PANEL_OUT<36> MT_PANEL_OUT<35> MT_PANEL_OUT<34> MT_PANEL_OUT<33> MT_PANEL_OUT<37> MT_PANEL_OUT<39> MT_PANEL_OUT<38> MT_PANEL_OUT<9> MT_PANEL_OUT<0>MUX_IN<0> MUX_IN<1> MUX_IN<2> MUX_IN<3> MUX_IN<4> MUX_IN<5> MUX_IN<6> MUX_IN<7> MUX_IN<8> MUX_IN<9> MUX_IN<19> MUX_IN<18> MUX_IN<17> MUX_IN<16> MUX_IN<15> MUX_IN<14> MUX_IN<13> MUX_IN<12> MUX_IN<11> MUX_IN<10> Z1_BON_L<1> Z1_BON_L<2> Z1_BON_L<3> Z1_BON_L<4> Z1_BON_L<5> Z1_BON_L<0> Z1_B_ADR<2> Z1_B_ADR<0> C30001 2 R3009 1 2 R30121 2 C3008 1 2 D3000 1 2 C3009 1 2 L3000 1 2 U3000 53 4 6 1 7 8 9 2 XW3000 1 2 C30011 2 R3066 1 2 C30201 2 C30211 2 R30201 2 R30211 2 C30311 2 C30301 2 R30311 2 R30301 2 R30321 2 R30251 2 C30411 2 C30501 2 R30331 2 R3099 1 2 R30501 2 U3007 6 7 15 14 4 1 8 9 13 12 5 16 10 11 3 2 J3010 1 10 11 12 13 14 15 16 17 18 19 2 20 21 22 23 24 25 26 27 28 29 3 30 31 32 33 34 35 36 37 38 39 4 40 41 42 43 44 45 46 47 48 49 5 50 51 52 53 6 7 8 9 J3011 1 10 11 12 13 14 15 16 17 18 19 2 20 21 22 23 24 25 26 27 28 29 3 30 31 32 33 34 35 36 37 38 39 4 40 41 42 43 44 45 46 47 48 49 5 50 51 52 53 6 7 8 9 C3005 1 2 C3007 1 2 C3053 1 2 C30061 2 U3003 A10 B9 A9 C7 A7 B7 B8 A8 C8 C9 D7 G7 G8 E3 E5 E6 E7 F6 F7 G5 G6 B1 C1 I5 J8 J9 K8 J10 I10 H10 F11 C11 E10 E1 A11 B4 A5 A2 F2 H1 J1 J2 J3 K4 H5 C6 D3 F5 F8 F9 G3 G4 G9 H3 H4 H7 H8 D4 H9 J6 K7 D5 D6 D8 D9 E4 E8 F4 A6 B6 E9 F3 A1 B2 H2 I2 K1 K2 I3 K3 J4 I4 K6 H6 C2 K5 J5 I7 K9 I8 K10 I6 J7 K11 I9 D1 J11 I11 H11 G11 G10 F10 C10 D10 E11 D11 D2 B11 B10 C4 A4 B5 C5 A3 B3 E2 F1 G1 G2 I1 U3005 6 7 15 14 4 1 8 9 13 12 5 16 10 11 3 2 U3010 2 3 1 6 4 U3009 2 3 1 6 4 30 OF 119 B.0.0 051-8245 23 OF 53 5 5 242324 2324 24723 15 23 24 24 23 152324 24 15 23 24 723 2324 1523 24 24 24 723 723 723 24 24 15 23 24 15 23 24 24 24 6 6 23 24 23 24 6 1523 24 24 723 723 723 23 24 2324 2324 2324 2324 2324 23 23 23 23 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I pad 1 full schematic diagram

  • 1. TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. 8 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT 3 B 7 ECNREV BRANCH DRAWING NUMBER REVISION SIZE D PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. DRAWING TITLE THE POSESSOR AGREES TO THE FOLLOWING: Apple Inc. SHEET R DATE D A C THE INFORMATION CONTAINED HEREIN IS THE 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. PAGE NOTICE OF PROPRIETARY PROPERTY: A C 3456 D B 8 7 6 5 4 2 1 12 APPD CK DESCRIPTION OF REVISION TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_HEAD TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM DRAWING TABLE_TABLEOFCONTENTS_HEAD TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM 2/4/2010 PVT K48-DRI VICE MLB 1 OF 119 2010-02-04PRODUCTION RELEASED 1 OF 53 B.0.0 051-8245 B 0000854735 LAST_MODIFIED=Thu Feb 4 00:41:44 2010 AP TVOUT AP RGB/CLCD,CAMERA 12/04/2009 CONFIGURATION OPTIONS ALEX AUDIO: AUDIENCE AUDIO: HP CONN PHYSICAL/SPACING RULES Cross Reference Page Cross Reference Page Cross Reference Page 16 AP NAND & GPIO, NOR AP PWR,AP BB&WIFI FUNC/ICT TEST/BRACKETS 45 TABLE OF CONTENTS11 VICE MLB SYNC MASTER DATECONTENTSCSAPDF 40 AUDIO32 PDF CSA DATESYNC MASTERCONTENTS TITLE=U230 ABBREV=DRAWING 12/04/200942 AUDIO33 AUDIO: DETECT/MIC BIAS 12/04/200943 AUDIO34 09/16/2009MIAMI35 ALS CONNECTOR 12/21/200948 JAMES36 I/O EXPANDER 12/21/200949 JAMES37 DISPLAY PORT SWITCH 12/21/200950 JAMES38 44-PIN LANDSCAPE DOCK CONN 12/21/200951 JAMES39 60-PIN PORTRAIT DOCK CONN 09/16/200954 MIAMI40 BUTTONS CONNECTOR 09/16/200955 MIAMI41 3G CONNECTOR 10/14/200957 MARKSIN42 PROX SENSOR 09/16/200967 MIAMI43 FLASH 09/16/2009100 MIAMI44 CONSTRAINTS 09/16/2009101 MIAMI45 MORE CONSTRAINTS 09/16/2009106 MIAMI46 11347 11448 Cross Reference Page 11549 Cross Reference Page 11650 11751 11852 Cross Reference Page 11953 Cross Reference Page SYSTEM BLOCK DIAGRAM22 05/02/2009 POWER BLOCK DIAGRAM33 12/04/2009MARK 44 08/06/2009MIAMI 55 09/16/2009MIAMI AP MAIN66 12/21/2009JAMES 77 12/21/2009JAMES 88 12/21/2009JAMES 99 12/21/2009JAMES 1010 12/21/2009JAMES 3G AND DEBUG MUXES1111 12/21/2009JAMES AP MISC & ALIASES1212 12/21/2009JAMES MLC1413 09/16/2009MIAMI MLC ALIASES1514 09/16/2009MIAMI Power Conn / Alias1715 12/04/2009MARK DCIN POWER PATH18 12/04/2009MARK CHARGER1917 12/04/2009MARK PMU2018 12/04/2009MARK PMU2119 12/04/2009MARK 3.3V SUPPLY2420 12/04/2009MARK LED BACKLIGHT CONTROLLER2621 12/04/2009MARK DEBUG RESET ACCESS2922 09/16/2009MIAMI GRAPE 1 OF 23023 12/21/2009JAMES GRAPE 2 OF 23124 12/21/2009JAMES LVDS CONNECTOR3225 09/16/2009MIAMI MOTION,GYRO,COMPASS/THERM3426 09/16/2009MIAMI USB MUX/BRK DET3527 09/16/2009MIAMI L61 AUDIO INTERFACE3628 12/04/2009AUDIO AUDIO: SPEAKER AMP3729 12/04/2009AUDIO AUDIO:HEADPHONE OUT3830 12/04/2009AUDIO AUDIO: LINE OUT DOCK ESD CIRCUIT3931 12/04/2009AUDIO
  • 2. U3009 U3010 Q1954 L5060 LED2900 J4501 U3100 U3000 L3000 D3000 C3001 C3000 U3101 U3003 J5700 J4300 J0510 J0500 U4901 L3906 L4304 L4305 L4306 J5001 J5100 PP1950 PP1900 PP1412 PP1411 TP6700 C5083 L0562 D1810 D1820 J0504 J0503 J0502 J0501 J3700 Q4200 U1400 J5500 U5700 U2601 U0652 U3600 U6710 U6700 U4900 U3007 U3005 U3810 U3800 U4210 U3501 U5500 U1401 U1403 U1402 U3504 U3502 Q1820 Q1810 Q2000 U1820 U1810 L5016 Y0602 Q3500 Q1821 Q1811 Q1490 D5001 C4237 C4236 C4218 C4217 C2112 C2111 C2108 C4300 C4212 C4233 C4514 C4513 C4512 C4511 C4510 C6713 C6703 C4507 C3232 C5500 C5400 C5401 C5402 C5403 C5704 C5701 C3110 C3109 C3108 C3106 C3105 C3103 C3102 C3050 C3041 C3031 C3030 C3021 C3020 C3006 C3814 C4950 C5070 C4211 C4213 C4902 C4903 C4904 C4905 C4506 C4907 C3612 C4906 C6700 C6701 C6710 C6711 C0780 C3610 C3608 C3606 C3603 C3601 C3507 C3506 C3505 C1030 C1014 C5000 C0950 C0951 C2104 C2614 C5140 C3820 C4232 C0813 C0814 C0815 C0816 C0817 C0818 C0819 C0832 C3604 C3852 C3853 C4216 C4234 C4235 C5050 C5051 C5052 C5053 C5054 C5055 C5152C5153 C5154 C5155 C5156 C0870 C0871 C0872 C0873 C3823 C3822 C1810 C5082 C5081 C1820 C5702 C4310 C4214 C2107 C3008 C1922 C1923 C5703 C3850 C3851 C0767 C0801 C0802 C0803 C0804 C0805 C0826 C0850 C0851 C0860 C0861 C0825 C0720 C0721 C0821 C0822 C0823 C0824 C4215 C4230 C4231 C3503 C3600 C3504 C2101 C3206 C2615 C0607 C0613 C3810 C3812C3813 C3811 C3702 C3701 C3712 C3711 C5020 C5120 C5090 C5130 C3107 C2616 C2621 C3233 C3009C3220 C1417 C1413 C3626 C3627 C3628 C4505 C5700 C3112 C3104C3101 C6702 C6712 C3053 C3007 C3005 C5080 C3602 C0769 C0771 C0806 C0807 C0808 C0809 C0810 C0811 C0812 C0827 C0828 C0829 C0830 C0852 C0853 C0854 C0862 C0922 C2103 C1411 C1400 C3622 C3623 C3111 C2613 C0772 C3605 C3607 C3620 C3621 C3191 C3624 C3625 C3630 C3821 C3609 C3611 C4210 C3629 L5403 L5402L5401 L5400 L4514 L4513 L4512 L4511 L4510 L4507 L5500 L4230 L4231 L4301 L4302 L4303 L5009 L5013 L5150L5151 L3820 L3601 FL0902 FL1900 FL5007 FL5008 FL5011 L3905 L3200 L3900 L3901 L5014 L3201 R4953 R3820 R3033 R3031 R3030 R3025R3021 R3020 R4212 R5032 R5002 R5090 R5095 R0950 R5135 R4952 R3173 R3171 R3120 R3099 R5500 R1201 R1499 R1498 R1203 R0677 R1941 R2003 R3605 R3852 R3853 R4000 R4001 R4002 R4003 R5030 R5031 R0952 R0953 R4902 R4903 R4904 R5054 R5131 R5132 R5140 R5141 R5055 R0652 R2110 R0663 R2633 R2634 R3607 R3101 R3032 R3050 R3604 R3703 R3713 R3160 R3155 R3107 R1053 R3600 R4231 R4312 R4320 R1405 R1404 R3602 R4210 R0640 R3603 R3606 R2901 R5000 R4234 R4233 R4214 R4213 R1966 R5190 R0655 R3823 R3822 R3012 R3190 R3066 R4911 R5096 R4931 R1410 R6702 R6701 R6700 R4932 R1403 R1402 R0633 R1408 R4923 R4922R4921 R4920 R5701 R4905 R0877 R0876 R0875 R0874 R0873 R0872 R0871 R0870 R0867 R0866 R0865 R0864 R0863 R0862 R0861 R0860 R0857 R0856 R0855 R0854 R0853 R0852 R0851 R0850 R0721 R0639 R0825 R0827 R0828 R0831 R0832 R0833 R0834 R0836 R1810 R1820 R2031 R3501 R3502 R3520 R3521 R3540 R3541 R3542 R3543 R4900 R5080 R0631 R4901 R2111 R0635 R0636 R0645 R0646 R0647 R2112 R1497 R0662 R2107 R3900 R2902 R4323 R4311 R4322 R4321 R3854 R3855 R5700 R1811 R1821 R3512 R3514 R3515 R3516 R3522 R1406 R3850 R3851 R0651 R0700 R0701 R0705 R4211 R5501 R1005 R1046 R1047 R3601 R0670 R4230 R4232 R1822 R1012 R1050 R1051 R1052 R1407 R2100 R2108 R0622 R0920 R3009 R1800 R2109 XW1800 XW1810 XW1820 XW5000 DZ5070 DZ4230 DZ4231 DZ4301 DZ4302 DZ4303 DZ4304 DZ4305 DZ4306 DZ3900 DZ3901 DZ3905 DZ3906 DZ5400 DZ5401DZ5402 DZ5403 DZ5050 DZ5090 TP1900 J5400 J3201 J3010J3011 L0560 L0561 D0562 D0561 D5000 L5152 L3202L3212L3222L3232 U5000 no_refdes+7 no_refdes+8 no_refdes+9 D0560 U5070 U5050 DZ1950 DZ0600 DZ5095 DZ4901 XW3000 XW4301 XW3602 XW3800 XW3801 XW3601 XW3600 XW1000 XW4300 R2101 R2104 R1823 R5130 C1912 C1911 U1010 U0901 U5100 no_refdes+4 no_refdes+5 no_refdes+6 820-2740-05 TOP 絲印圖
  • 3. Q1904 Q1900 Q3201 Q1902 Q1903 Q1952 Q1953 Q2601 Q2451 D5100 C2110 C2109 C2461 C2460 C2055 C3241 C3240 C2603 C2411 C5157 C3231 C3230 C1416 C0760 C1925 C2010 C3431 C3430 C4810 C3713 C3703 C4801 C4900 C4901 C4800 C0910 C0909 C0905 C0901 C0900 C0820 C0779 C3203 C1071 C2041 C2038 C1954 C1938 C1904 C1105 C1104 C1101 C1100 C1026 C1015 C0913 C0912 C0911 C3410 C3411 C3402 C3421 C3420 C2102 C5100 C1020 C 1913 C0737 C0738 C0739 C0740 C0741 C0742 C0743 C0744 C0774 C0775 C0776 C0777 C0904 C0906 C5150 C5151 C1956 C1906 C1951 C1901 C0907 C0903 C0630 C0627 C0608 C3401 C0641 C0642 C0644 C0646 C0648 C2054 C0718 C0719 C0724 C0725 C0726C0728 C0729 C0730 C0731C0733 C0735C0727 C0749 C0750 C0751 C0765 C0766 C0800 C0732 C0734 C0736 C0715 C0714 C0713C0712 C0711 C0710 C2030 C0700 C0701 C0702 C0703 C0704 C0745 C0746 C0747 C0748 C0755 C0757 C0784 C0785 C0786 C0787 C0789 C0790 C0791 C0792 C0793 C0798 C0908 C1957 C1907 C2410 C2453 C0618 C1924 C1955 C1905 C3200 C2610 C2011 C2105 C2106 C2047 C0831 C0723 C2620 C2622 C2623 C1415 C1414 C2019 C2020 C2026 C2022 C2023 C2025 C2027 C2609 C1902 C1952 C2611 C3422 C0606 C0705 C0706 C0707 C0708 C0709 C0770 C1028 C2003 C2004 C2005 C2006 C2007 C2008 C2009 C2015 C2016 C2024 C2000 C2028 C2029 C0640 C0643 C0645 C0647 C0921 C0923 C0924 C0925 C0926 C0927 C2050 C2051 C1412 C1410 C1403 C1402 C1401 C2021 C2017 C2018 C0758 C0752 C0753 C0754 C0756 C0773 C2001 C2002 C2035 C2040 C2043 C2036 C2037 C3202 C0722 C1903 C1908 C1909 C1953 C2400 L3400 FL1000 FL1402 FL1401 FL1400 FL0604 FL0900 FL0605 FL0607 FL0901 FL0903 FL0904 FL0905 FL0906 FL0907 FL0606 R4951 R3200 R3201 R5102 R5103 R4950 R2410 R0760 R3420 R1131 R1130 R1202 R1200 R0786 R0650 R0661 R0691 R1103 R1105 R1901 R1915 R1920 R1951 R1965 R4801 R4802 R3422 R3423 R2000 R5133 R5134 R5150 R5151 R2601 R2609 R2616 R2623 R2632 R2020 R0680 R0681 R0664 R0602 R3400 R3401 R3700 R1008 R2900 R5100 R1916 R1101 R2400 R2603 R2604 R2605 R2606 R2608 R2617 R2044 R4910 R3204 R5110 R1964 R4820 R0630 R0632 R0665 R1100 R1104 R1106 R1905 R1912R1914 R1955 R1962 R3205 R4800 R4803 R4805 R4806 R4807 R4808 R4809 R3421 R0720 R1154 R1155 R5157 R2625 R2613 R2614 R2618 R2620 R2450 R2406 R2408 R2622 R0637 R0638 R0750 R0826 R2636 R0617 R1902 R1930 R3210 R3211 R2626 R2615 R2624 R2635 R2600 R2402 R2451 R2403 R2043 R0702 R0703 R0704 R2113 R0671 R1906 R1956 R1003 R1004 R1043 R2405 R0624 R0625 R0627 R0628 R0629 R2610 XW2000 XW2001 XW2002 XW3701 XW3700 XW3711 XW3710 DZ1900 DZ2100 DZ4900 XW0740 XW2600 XW2601 XW1920 XW1900 R2102 R2103 C 1910 C2056C2403 U1009 U4801 no_refdes+1 no_refdes+2 no_refdes+3 L2600 L2400 Q2603 U1900 U1950 U3700 U3710 J0520 Q1901 Q1951 Q2600 U3420 J1900 C3715C3705 C3704C3714 DZ1800 C2045 D2000 U2000 U4800 U0808 U1101 U1100 U1105 U1104 Q3200 Q2450 C3752 C3751 C3750 C3753 C2401 C1404 C0902 C2606 C3204 C2451 C2405C2402 C2608 C2600 C2408 C2612 C2409 C3400 C2607 C2601 C2044 C2046 C2452 C2039 F1900 L1900 L1950 L2001 L2002 R1940 R2621 R1401 R4822R4821 R0688 R1910 R1960 R1913 R1963 R1903 R1953 R3203 R2453 R1911 R1961 R0642 R1904 R1954 R2627R2628 R2602 R2452 R2404 R2401 R2409 R0689 R2019 R2021 R2042 R1921 R1907 R1900 R1950 R2630 R2631 R2629 R2611 R2607 U3430 U3410 U3400 Y2100 C1900 C1950 C2602 U2600 C2605 D2600 Q2602 U2400 Q2400 Q2005 L2003 U2001 820-2740-05 BOTTOM 絲印圖
  • 4. II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PAGE 30-31 GRAPE/GROUNDHOG VICE BLOCK DIAGRAM PG7 I2S0 DISPLAYPORT PAGE 10 VIDEO AMP AMANDA PMU PAGE 20 PORTRAIT 4099 PAGE 19 PG9 P39 PG7 PAGE 49 DP MUX COMPOSITE MICROPHONE P39 STERO SPEAKERS MIKEY L. P42 AMP P37 AMP P37 IO EXPANDER PAGE 20 PAGE 34 COMPASS PG10 I2C2 MOTION SENSOR PAGE 34 MIPI->LVDS PAGE 14-15 MLCMIPI COMP/SVIDEO COMPOSITE PAGE 34 GYRO SENSOR ALS SENSOR PAGE 45 CAMERA SENSOR FLEX H3P PAGE 50 L. DOCK PG 36 PAGE 19 I2S AUDIO SPI1 LVDS LCD PANEL PAGE 51 I2C0 PG 8 USB2.0 P. DOCK PAGE 50 L. DOCK P. DOCK PAGE 51 I2S2 PG 7 MDDR FMI0-1 SPI0 FLASH 8MBIT SERIAL BOOT VIDEO AMP PG 67 NAND FLASH ON STATE 256MB LAND. 4099 P32 POWER PLANE Voltage Rails 8/16/32/64 PG8 COMP/SVIDEO UART4 UART1 SPI2 PAGE 55 X15 MODULE HIGHWAY BOARD I2S1 PAGE 51 HIGHWAY BOARD X7 AIRPORT +BT UART3 SDIO USB2.0 PG6 CIRRUS L61 PG 35 USB DOCK MUX USB2.0 PG 11 SERIAL BUFF/MUX UART0HEADSET L UART JTAG/UART PAGE 10 PAGE 57 PROX SENS. SYSTEM BLOCK DIAGRAM SYNC_MASTER=ALEX SYNC_DATE=05/02/2009 2 OF 119 B.0.0 051-8245 2 OF 53
  • 5. II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 DC INPUT PATH LTC3442 BUCK/BOOST 3V3 POWER EN EN POWER BLOCK DIAGRAM EN EN B9 ADAPTER (5V) PAGE 19 LTC4099 PAGE 19 BUCK / CHARGER 3.0-4.2V BATTERY PACK VCC_MAIN/3.0-4.7V PAGE 24 LED DRIVER APP001 BOOST PAGE 26 LED/0.12A GRAPE POWER BOOST 18V/1MA LDOS USB (5V) USB(5V) 3V3/1.2A BUCK / CHARGER LTC4099 TPS61045 PAGE 30 1.2V POWER RP200Z121D LDO PAGE 20 1.2V/0.3A BUCKS1V8/1.5A MAX CORE/2.0A MAX ASHLEY PAGE 20-21 3V3_LAND_ACC/0.15A MAX 1V2_H3/0.30A MAX 3V0_IO/0.10A MAX 3V1_AUDIO/0.25A MAX 3V0_VIDEO/0.10A MAX 3V0_OPTICAL/0.05A MAX 3V3_PORT_ACC/0.15A MAX 3V0_LCD/0.01A MAX 3V0_GRAPE/0.15A MAX 3V0_HP_BIAS/0.20A MAX 1V8_ALWAYS/0.002A MAX 1V1_H3_PHY/0.10A MAX 1V7_VA_VCP/0.10A MAX SYNC_DATE=12/04/2009SYNC_MASTER=MARK POWER BLOCK DIAGRAM 3 OF 119 B.0.0 051-8245 3 OF 53
  • 6. TABLE_5_ITEM BOM OPTIONSBOM GROUP TABLE_BOMGROUP_HEAD TABLE_BOMGROUP_ITEM TABLE_5_ITEM REFERENCE DESIGNATOR(S) BOM OPTION TABLE_5_HEAD QTY DESCRIPTIONPART# REFERENCE DESIGNATOR(S) BOM OPTION TABLE_5_HEAD QTY DESCRIPTIONPART# TABLE_5_ITEM REFERENCE DESIGNATOR(S) BOM OPTION TABLE_5_HEAD QTY DESCRIPTIONPART# TABLE_BOMGROUP_ITEM TABLE_5_ITEM TABLE_5_ITEM II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM Page Notes BOM OPTIONS PRODUCTION JTAG_5_WIRE JTAG_2_WIRE DPMUX SCH AND BOARD P/N ADD DEVELOPMENT AND OTHER BOMS ONCE YOU GET BOM NUMBERS 16GB_FLASH_TOSH 16GB_FLASH 8GB_FLASH 8GB_FLASH_SAM BKLT_PLL CAMERA DEVELOPMENT AUD10 32GB_FLASH_SAM MIKEY LINE_OUT_2 LINE_OUT_1 PORTRAIT_DOCK (NONE) BOM options provided by this page: COMMON INTERNAL_MIC LANDSCAPE_DOCK LEFT_HS SPEAKER USE SCHUTIL BOMCONFIG TO GENERATE CONFIG FILE. PUT CONFIG FILE AT SAME LEVEL AS .CPM FILE USE "READ BOM-CONFIG" BUTTON ON DMS TO READ IN BOMS BOM OPTIONS ALTERNATE (NONE) ALL AVAIL BOM OPTIONS PROGRAMMABLE PARTS Signal aliases required by this page: 32GB_FLASH USE 825-6447 NEED MORE LINE ITEMS FOR OTHER CONFIGURATIONS Power aliases required by this page: VICE BARCODE LABEL/EEE CODES CRITICAL EEE_32G_MEEE FOR 639-0599 (32G)M1825-7456 EEE_D62 CRITICAL1 EEE_16G_MEEE FOR 639-0602 (16G)M825-7456 EEE_D67 CRITICALEEE FOR 639-0601 (32G) EEE_32G1825-7456 EEE_D66 CRITICAL EEE_64GEEE FOR 639-0598 (64G)1825-7456 EEE_D61 CRITICAL EEE_16GEEE FOR 639-0455 (16G)1825-7456 EEE_BWY SYNC_DATE=08/06/2009SYNC_MASTER=MIAMI CONFIGURATION OPTIONS 1 DEV,VICE,MLB,K48M DEV1 K48M_DEV085-1133 1 DEV,VICE,MLB,K48 DEV1 K48_DEV085-1028 BASIC COMMON,ALTERNATE 1 PCB1PCBA,VICE,MLB,K48820-2740 SCHEM,VICE,MLB,K48051-8245 SCH11 AUDIO LEFT_HS,SPEAKER,INTERNAL_MIC CRITICAL EEE_64G_MEEE FOR 639-0600 (64G)M825-7456 1 EEE_D63 4 OF 119 B.0.0 051-8245 4 OF 53
  • 7. II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 CRITICAL MLB-MNT-TAB-K48SM CRITICAL TOP-SM SHLD-K48-FENCE-MLB-TOP CRITICAL BOT-SM SHLD-K48-FENCE-MLB-BOT TH SL-1.2X0.40-1.95X1.15 NOSTUFF NOSTUFF TH SL-1.2X0.40-1.95X1.15 TH SL-1.2X0.40-1.95X1.15 NOSTUFF TH SL-1.2X0.40-1.95X1.15 NOSTUFF SYNC_MASTER=MIAMI SYNC_DATE=09/16/2009 FUNC/ICT TEST/BRACKETS J0501 1 J0502 1 J0503 1 J0504 1 J0500 1 2 3 4 J0510 1 J0520 1 5 OF 119 B.0.0 051-8245 5 OF 53
  • 8. HSIC_VDD121 HSIC_VDD122 PLL0_AVDD11 USB_BRICKID USB_VBUS USB_DM USB_DP USB_ANALOGTEST USB_REXT HSIC_DVDD FUSE1_FSRC CFSB DDR1_CKEIN HSIC_DVSS HSIC_VSS121 HSIC_VSS122 PLL0_AVSS11 PLL1_AVSS11 PLL2_AVSS11 PLL3_AVSS11 USB_DVSS USB_VSSAC USB_VSSA0 USB_ID EHCI_PORT_PWR2 EHCI_PORT_PWR1 EHCI_PORT_PWR0 USB11_D- HSIC2_STB HSIC1_DATA RESETN TESTMODE JTAG_TRSTN JTAG_SEL JTAG_TMS JTAG_TCK JTAG_TRTCK JTAG_TDO JTAG_TDI TST_CLKOUT TST_STPCLK WDOG XI0 XO0 USB_VDD330 USB_DVDD PLL2_AVDD11 PLL3_AVDD11 PLL1_AVDD11 USB11_D+ HSIC2_DATA HSIC1_STB SYMBOL 1 OF 9 GPIO6 GPIO2 SMII_SRDY SMII_RRDY SMII_SYNC SMII_TXD GPIO3 GPIO1 GPIO17 GPIO16 SENSOR_RST SENSOR_CLK GPIO_3V1 GPIO38 GPIO_3V0 GPIO36 GPIO37 GPIO35 GPIO34 GPIO33 GPIO31 GPIO32 GPIO30 GPIO28 GPIO29 GPIO26 GPIO27 GPIO25 GPIO24 GPIO23 GPIO21 GPIO22 GPIO20 GPIO19 GPIO18 GPIO15 GPIO14 GPIO13 GPIO11 GPIO12 GPIO10 GPIO8 GPIO9 GPIO7 GPIO5 GPIO4 GPIO0 SMII_CLK SMII_RXD SMII_PWR SMII_WAKE SMII_CLKSEL1 SMII_CLKSEL0 TMR32_PWM2 TMR32_PWM1 TMR32_PWM0 SPDIF SYMBOL 6 OF 9 PART NUMBER ALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS: TABLE_ALT_HEAD TABLE_ALT_ITEM II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 (NOSTUFF FOR SCAN DUMP CONFIG) 3.0V (INT PD) (INT PD) (INT PD) (INT PD) (INT PD) (INT PD) (INT PD) 3.0V (INT PD) PER MICHAEL FRANK (EMAIL 2/25/09) EHCI_PORT_PWR[0-2] NOT USED (INT PD) (INT PU) (INT PU) (INT PU) 1.2V 0 - PARALLEL JTAGSEL PER RADAR #6755237 1 - DAISY-CHAIN (FOR USE WITH 5-WIRE JTAG) (INT PD) 22 MF 5% 1/20W 201 0201-1 80-OHM-0.2A-0.4-OHM 10% 10V 201 X5R 0.01UF 0.01UF 10% 10V X5R 201 1% 201 MF 10K 1/20W 18PF NP0-C0G 201 25V 5% 5% 18PF 201 NP0-C0G 25V 1/20W 1% MF 201 1M CRITICAL SM-2 24.000MHZ-16PF-60PPM MF 201 1% 100K 1/20W 16V X7R 1000PF 10% 201 MF 220K 1/20W 201 1% 220K 1/20W 201 1% MF 201 MF 1% 1/20W 42.2K 0 FBGA H3P 256MB-DDR-FC CRITICAL 5% 0 201 1/20W MF MF 1/20W 201 1% 100K 44.2 1% 1/20W MF 201 0.01UF X5R 10% 201 10V 10% 1UF 402 CERM 6.3V 100K JTAG_TAP H3P 256MB-DDR-FC FBGA CRITICAL 201 MF 1% 100K 1/20W MF 1/20W 201 100K 1% 100K 1% 201 1/20W MF 1% 201 MF 100K 1/20W X5R 10% 201 10V 0.01UF 0.01UF X5R 10V 10% 201 0 0 JTAG_TAP_NOT MF 1/20W 5% 0 201 NOSTUFF 0 201 0 201 1/20W 1% MF 201 84.5K 6.3V CERM 402 1UF 10% 10V 201 10% X5R 0.01UF 6.3V CERM 402 1UF 10% 80-OHM-0.2A-0.4-OHM 0201-1 X5R 10% 201 10V 0.01UF 10% 1UF 402 CERM 6.3V 0201-1 80-OHM-0.2A-0.4-OHM 0.01UF X5R 201 10V 10% CERM 10% 1UF 402 6.3V 0201-1 80-OHM-0.2A-0.4-OHM 100K 100K 100K MF 1/20W 201 100K 1% 1% 100K 201 1/20W MF 1% 100K 201 1/20W MF MF 1/20W 201 100K 1% MF 1/20W 201 100K 1% 0 0 3.92K NOSTUFF 201 1% 1/20W MF 100K GDZ-0201 GDZT2R5.1B AP MAIN SYNC_DATE=12/21/2009SYNC_MASTER=JAMES U0652 HYNIX DDR339S0100 339S0084 PP1V1_PLL3_F 0.6MM 0.2MM PP1V1_PLL1_F 0.6MM 0.2MM 0.6MM 0.2MM PP1V1_PLL0_F =PP1V1_HSIC =PP1V2_HSIC GRAPE_RESET_N AP_GPIO29_BOARD_ID_3 FORCE_DFU AP_GPIO25_BOARD_ID_1 COMPASS_RST_L AUD_MIKEY_ENA GPS_STANDBY_L AP_GRAPE_HOST_INT_N PP1V1_PLL2_F 0.6MM 0.2MM GYRO_INT_L USB_VBUS VBUS_P USB_BRICKIDAP_USB_BRICKID L61_6MHZ_REFCLKAP_6MHZ_REFCLK 0.2MM 0.6MM PPVDD330_USB_AP =PP1V1_PLL =PP1V1_USB KEEPACT TP_AUDIENCE_RESET_L RESET_L61_N PMU_IRQ_L IPC_SRDY RESET_DET_N BB_RST RADIO_ON AP_DDR1_CKEIN_1V2 RESET_L AP_DDR1_CKEIN AP_CFSB MLC_RESET_L =PP3V3_H3_USB 24M_O XTAL_24M_I XTAL_24M_O NC_HSIC1_STB NC_HSIC2_DATA NC_USB11_DP AP_TST_STPCLK TP_TST_CLKOUT AP_TDI NC_AP_TDO NC_AP_RTCK AP_TCK AP_TMS AP_TESTMODE NC_HSIC1_DATA NC_HSIC2_STB NC_USB11_DM TP_USB_ID USB_REXT TP_USB_ANALOGTEST USB_DP USB_DM =PP3V3_H3_USB =PP3V0_IO_USB PORT_USB_CHINA_DET AUD_VOL_UP_L AUD_VOL_DOWN_L ONOFF_L IO_XPNDR_INT_L TP_CAM_SHUTDOWN_L TP_CAM_CLK TP_CAM_EN ACCEL_INT2_L PORT_DOCK_VIDEO_AMP_EN ACCEL_INT1_L ALS_INT_L COMPASS_INT_L LO_LS_REF_SEL AP_GPIO32_4_DIAG GPS_SYNC DFU_STATUS CODEC_IRQ_N GRAPE_FW_DNLD_EN_L LAND_USB_CHINA_DET BT_WAKE AUD_SPKRAMP_MUTE_N RINGER_A HOME_L BACKLIGHT_EN PROX_INT_L IO_XPNDR_RST_L GPS_RESET_L HOME_L =PP1V8_SDRAM_H3 =PP1V8_ALWAYS AP_TCK AP_TMS AP_TDI =PP1V8_H3 AP_GPIO28_BOARD_ID_2 PORT_DK_DDIS_CHG LAND_DK_DDIS_CHG DP_SW_SEL DP_SW_SHUTDOWN_L USB_MUX_OE_L USB_MUX_SEL AP_JTAG_SEL RESET_1V8_N AP_WDOG PMU_RESET_IN AP_GPIO39_BRD_REV0 AP_GPIO40_BRD_REV1 AP_GPIO41_BRD_REV2 AP_PT_DK_ADPTR AP_LD_DK_ADPTR FORCE_DFU DFU_STATUS COMPASS_RST_L KEEPACT RADIO_ON AP_TRSTN =PP1V8_H3 =PP1V8_SDRAM_H3 ONOFF_L =PP1V8_SDRAM_H3 RINGER_A JTAG_TRSTN_CTRL R06401 2 FL0604 1 2 C06271 2 C06301 2 R06171 2 C0607 1 2 C06131 2 R0655 1 2 Y0602 2 4 1 3 R0632 1 2 C06181 2 R0670 1 2 R0671 1 2 R06881 2 R0691 1 2 U0652 V26 N7 Y10 Y9 AA9 F19 P25 R25 M27 M26 L27 L26 N17 N18 N16 N19 C18 B15 A19 C19 D18 B18 D19 E14 E15 D13 E13 F15 F14 N23 N24 B19 F23 K20 J20 R27 R26 N20 R23 P27 P26R20 R21 R22 N21 N25 P22 R24 N22 F22 B12 A12 R0650 1 2 R0651 1 2 R06421 2 C06081 2 C06061 2 R0662 1 2 U0652 F6 B6 C5 C9 C6 D6 F5 E5 F9 F3 F4 C10 B7 F10 E10 A4 B4 E4 E2 D10 E9 L2 G1 D9 G2 E3 B3 A3 B2 H2 L1 H1 E1 D5 A6 A7 B9 E6 A9 W24 W25 W20 V21 K23 K18 K19 H19 K21 J18 K22 G19 G18 J19 R18 AB25 AB27 AB26 R0665 1 2 R06301 2 R06311 2 R06331 2 C06421 2C06411 2 R06641 2 R0602 1 2 R0652 1 2 R0681 1 2 R0680 1 2 R06891 2 C06401 2 C06441 2 C06431 2 FL0605 1 2 C06461 2 C06451 2 FL0606 1 2 C06481 2 C06471 2 FL0607 1 2 R0647 1 2 R0646 1 2 R0645 1 2 R06351 2 R06361 2 R06371 2 R06381 2 R06391 2 R06771 2 R07861 2 R0624 1 2 R07211 2 DZ0600 1 2 6 OF 119 B.0.0 051-8245 6 OF 53 15 15 23 12 622 12 62635 33 41 23 26 16 19 27 2815 15 619 28 19 41 41 12 641 1939 13 615 61244 12 63944 63944 27 44 27 44 6 15 15 27 40 40 61940 1936 26 10 26 35 2635 30 41 6 28 23 27 39 29 61940 61939 21 42 36 41 61939 6815 1519 6 39 44 6 39 44 6 12 44 679121537 12 17 17 37 37 27 27 12 12 19 12 12 12 12 12 6 22 6 6 26 35 6 19 6 41 12 679121537 6815 61940 6815 61940 12
  • 9. SDIO0_DATA0 SDIO0_DATA1 SDIO0_DATA2 I2S0_BCLK I2S0_DIN I2S0_DOUT I2S0_LRCK I2S0_MCK SDIO0_CLK SDIO0_CMD SDIO0_DATA3 SPI0_SCLK SPI0_MOSI SPI0_MISO SPI0_SSIN SPI1_SCLK SPI1_MOSI SPI1_SSIN SPI1_MISO SPI2_SCLK SPI2_MOSI SPI2_MISO SPI2_SSIN I2S1_DIN I2S1_DOUT I2S1_BCLK I2S1_LRCK I2S1_MCK I2S2_DIN I2S2_DOUT I2S2_BCLK I2S2_LRCK I2S2_MCK I2C0_SDA I2C0_SCL I2C1_SDA I2C1_SCL I2C2_SDA I2C2_SCL SYMBOL 5 OF 9 UART6_CTSN UART6_RTSN UART6_RXD UART6_TXD UART5_RTXD UART4_CTSN UART4_RXD UART4_TXD UART3_CTSN UART2_RTSN UART1_RTSN UART1_RXD UART1_TXD UART0_TXD UART0_RXD UART1_CTSN UART3_RTSN UART4_RTSN UART3_RXD UART3_TXD UART2_CTSN UART2_RXD UART2_TXD SYMBOL 7 OF 9 DDR0VDDQ DDR1VDDQ VDDIO30 VDDIOD5 VDDIOD4 VDDIOD3 VDDIOD2 VDDIOD1 VDDIOD0 VDDIO18 VDDIOD VSS VDD SYMBOL 8 OF 9 SI VCC GND SCK CS* HOLD* NC WP* SO II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 (3.0V - FMI0_CEN[4-5],ENET) I/O (GPIO_3VX,UART0,CFSB,USB11) BASE PKG 1.8V SERIAL FLASH (PU IN H3) (3.3V - FMI1) (3.3V - FMI0) (INT PU) RETENTION MDDR CKE PLACE THE 27PF IN PAIRS AROUND THE IC I/O BOTTOM PKG (1.2V) MDDR I/O (3.0V - I2C2) (3.0V - SMII) (3.0V - UART4) PLACE THE 27PF IN PAIRS AROUND THE IC 40 PINS 1.2V - 1GHZ 1.1V - 800MHZ CORE 3.0V 3.0V PLACE NEAR U0652 20% 201 4V CERM-X5R-1 0.47UF 201 4V CERM-X5R-1 20% 0.47UF 201 4V CERM-X5R-1 20% 0.47UF 201 4V CERM-X5R-1 20% 0.47UF 201 4V CERM-X5R-1 20% 0.47UF 6.3V 20% 603 X5R 10UF 20% 6.3V X5R 603 10UF 27PF NP0-C0G 25V 201 5% 25V 5% 27PF NP0-C0G 201 25V 5% 27PF NP0-C0G 201 5% 25V 201 NP0-C0G 27PF X5R 0.1UF 6.3V 201 10% 0.1UF 201 10% 6.3V X5R 20% X5R 6.3V 201 0.22UF 20% 6.3V 201 X5R 0.22UF 6.3V 20% X5R 201 0.22UF X5R 20% 6.3V 201 0.22UF 201 20% 6.3V X5R 0.22UF 6.3V 201 20% X5R 0.22UF 6.3V 603 X5R 20% 10UF 201 4V CERM-X5R-1 0.47UF 20% 201 4V CERM-X5R-1 0.47UF 20% 201 4V CERM-X5R-1 0.47UF 20% 201 20% 4V CERM-X5R-1 0.47UF 6.3V 20% X5R 201 0.22UF 6.3V 20% X5R 201 0.22UF 6.3V 20% X5R 201 0.22UF X5R 201 20% 6.3V 0.22UF 201 20% X5R 6.3V 0.22UF 20% 6.3V X5R 201 0.22UF 20% X5R 6.3V 201 0.22UF 6.3V X5R 20% 201 0.22UF X5R 20% 6.3V 201 0.22UF 20% X5R 6.3V 201 0.22UF 201 4V CERM-X5R-1 0.47UF 20% 201 4V CERM-X5R-1 0.47UF 20% 201 4V CERM-X5R-1 0.47UF 20% 201 4V CERM-X5R-1 0.47UF 20% 201 4V CERM-X5R-1 0.47UF 20% 201 4V CERM-X5R-1 0.47UF 20% 201 4V CERM-X5R-1 0.47UF 20% 201 4V CERM-X5R-1 0.47UF 20% 201 4V CERM-X5R-1 0.47UF 20% 201 4V CERM-X5R-1 0.47UF 20% 201 4V CERM-X5R-1 0.47UF 20% 201 4V CERM-X5R-1 0.47UF 20% SM NOSTUFF CERM 6.3V 10% 1UF 402 1UF CERM 402 6.3V 10% 402 6.3V 10% CERM 1UF CERM 402 1UF 10% 6.3V 402 6.3V 10% 1UF CERM 1UF CERM 402 10% 6.3V 1UF CERM 402 6.3V 10% 1UF CERM 402 10% 6.3V 603 6.3V 20% X5R 10UF 10UF 603 6.3V X5R 20% 20% X5R 6.3V 603 10UF 20% X5R 6.3V 201 0.22UF 0.22UF 201 6.3V X5R 20% 0.22UF 201 20% 6.3V X5R 5% 25V NP0-C0G 201 27PF 201 NP0-C0G 25V 5% 27PF 201 NP0-C0G 5% 25V 27PF 201 NP0-C0G 5% 25V 27PF NP0-C0G 201 25V 5% 27PF 5% 201 NP0-C0G 25V 27PF NP0-C0G 5% 25V 201 27PF 201 5% 25V NP0-C0G 27PF CRITICAL H3P FBGA 256MB-DDR-FC 1% 1K 1/20W MF 201 1% 1K 1/20W MF 201 1/20W 1K 201 1% MF 1/20W 1% 1K MF 201 1% 1K 1/20W MF 201 1% 1/20W 1K MF 201 CRITICAL FBGA H3P 256MB-DDR-FC CRITICAL 256MB-DDR-FC H3P FBGA 201 6.3V X5R 20% 0.22UF 201 6.3V X5R 20% 0.22UF X5R 6.3V 201 20% 0.22UF X5R 6.3V 201 20% 0.22UF 33 201 MF 1/20W 1% 10% 201 0.1UF 6.3V X5R CRITICAL SERIAL-SPI-8MB-1.8V WLCSP11 AT25DF081UUN 20% 0.22UF 201 X5R 6.3V 20% 0.22UF 201 X5R 6.3V 100K 201 MF 1/20W 1% 201 20% 6.3V X5R 0.22UF0.22UF 201 6.3V X5R 20% 10UF 603 6.3V X5R 20% 4.7UF 20% 6.3V 402 X5R 402 6.3V 20% 4.7UF X5R-CERM201 6.3V X5R 20% 0.22UF0.22UF 20% X5R 6.3V 201 MF 1/20W 100K 1% 201 MF 1/20W 201 0 5% 5% 82PF 0201 CERM 25V AP PWR,AP BB&WIFI SYNC_MASTER=JAMES SYNC_DATE=12/21/2009 =PP1V8_H3 I2C2_SCL_3V0 =PP3V0_IO_H3 I2C2_SCL_3V0 WLAN_SDIO_CLK H3_SDIO_CLK H3_SDIO_CLK FLASH_DOUT IPC_SCLK =PP1V8_H3 I2C0_SCL_1V8 I2C1_SDA_1V8 I2C1_SCL_1V8 I2C2_SDA_3V0 WLAN_SDIO_CMD WLAN_SDIO_DATA<3> WLAN_SDIO_DATA<2> WLAN_SDIO_DATA<1> FLASH_CLK FLASH_DIN I2C1_SCL_1V8 I2C2_SDA_3V0 I2C0_SCL_1V8 I2S1_MCK AP_UART6_CTS_L AP_UART6_RTS_L AP_UART6_RXD AP_UART6_TXD AP_UART2_TXD AP_UART3_CTS_L FLASH_CS_N AP_UART4_RXD BB_USART0_RXD_CTRL AP_UART2_RXD AP_UART1_CTS_L AP_UART1_TXD AP_UART0_RXD SFLASH_DOUT AP_UART3_TXD =PP1V8_NOR_FLASH I2S1_DOUT I2S0_DOUT I2S0_DIN =PP1V2_SDRAM_MDDR =PP1V2_VDDIOD_H3 TP_I2S0_MCK BB_I2S2_WA0 MAKE_BASE=TRUE BB_I2S2_CLK MAKE_BASE=TRUE BB_I2S2_RX MAKE_BASE=TRUE BB_I2S2_TX MAKE_BASE=TRUE =PP3V0_IO_H3 PPVCORE_FB =PPVCORE_H3 IPC_MISO IPC_MOSI AP_GRAPE_CS_N AP_GRAPE_MISO AP_GRAPE_MOSI AP_GRAPE_SCLK WLAN_SDIO_DATA<0> =PP3V0_IO_H3 IPC_MRDY BATTERY_SWI AP_UART4_TXD AP_UART1_RTS_L AP_UART1_RXD AP_UART0_TXD AP_UART3_RTS_L AP_UART3_RXD UMTS_RXD_CTRL FLASH_CS_N FLASH_DOUT FLASH_DIN FLASH_CLK MLC_WC_L PROX_GPIO I2S1_LRCLK I2S0_LRCLK I2S0_BCLK I2C0_SDA_1V8 TP_I2S2_MCK I2S2_LRCK I2S2_DOUT I2S2_DIN I2C1_SDA_1V8 I2S1_DIN I2S2_BCLK I2C0_SDA_1V8 I2S1_BCLK =PP3V3_NAND C0704 1 2 C0703 1 2 C07021 2 C0701 1 2 C07001 2 C07531 2 C07541 2 C07371 2 C07381 2 C07391 2 C07401 2 C07801 2 C07791 2 C07311 2 C0732 1 2 C07331 2 C07341 2 C0735 1 2 C07361 2 C07521 2 C07451 2 C07461 2 C07471 2 C07481 2 C07491 2 C07501 2 C07511 2 C0728 1 2 C0727 1 2 C0726 1 2 C0725 1 2 C0724 1 2 C0729 1 2 C07301 2 C0787 1 2 C0786 1 2 C07851 2 C07841 2 C07571 2 C07551 2 C0798 1 2 C0789 1 2 C0790 1 2 C0791 1 2 C0792 1 2 C07931 2 XW0740 1 2 C07051 2 C07061 2 C07071 2 C07081 2 C07091 2 C07691 2 C07701 2 C07711 2 C07561 2 C07721 2 C07731 2 C07651 2 C07661 2 C07671 2 C07441 2 C07431 2 C07421 2 C07411 2 C07741 2 C07771 2 C07761 2 C07751 2 U0652 AB5 AB6 AB3 AB4 AC15 AD15 V23 W21 W22 V18 V20 V25 V24 W19 V15 AB22 Y26 R17 R16 AB23 W23 J21 K25 J24 J25 J26 J27 V6 W7 V4 W3 U2 W8 V3 V2 V7 AA1 AA2 W6 R07001 2 R07011 2 R07021 2 R07031 2 R07051 2 R07041 2 U0652 V27 Y27 Y1 V1 Y2 U1 V9 V10 W5 V5 AD5 R1 P3 R3 AD1 W4 AD6 AD2 V8 AC4 AC3 AC6 AC5 U0652 F13 N6 J10 J12 J13 J14 J15 J16 J17 J9 K10 K12 K9 L10 L12 L13 L14 L15 L16 L17 L9 M10 M12 M9 N10 N12 N13 N14 N15 P10 P12 R10 R12 R14 T10 U12 T12 T13 T14 T15 T16 T17 A10 A16 F1 N1 V22 W10 AB10 AC10 AD10 AE10 T21 U27 AB15 W18 AD22 V19 F18 H18 G13 H10 H9 J6 J7 J8 K8 N8 R8 A1 A18 AF10 AB13 AE9 AF1 AF11 AF23 AF16 AF17 AF2 AG1 C15 AG12 AB14 AF24 AF27 AF4 AF7 AG2 B10 B11 B16 A2 B17 AG23 AG26 AG27 B1 B20 B21 B5 B24 B26 A23 B27 C2 B8 C11 C17 D26 D11 D17 D2 E11 AD26 F26 E17 F11 F17 F2 G10 G11 G15 H17 H26 AE22 G17 G9 H11 H13 H15 J1 J11 J2 J3 J4 AD9 K13 J5 K11 A26 A27 AA17 AA10 AA11 AA15 AA26 AE17 AB2 AB11 AB17 AC11 AB9 AC13 AC17 AC2 AC9 AD11 AE2 AD17 C07151 2 C07141 2 C07131 2 C07121 2 R0826 1 2 C08201 2 U0808 B3 E3 C2 A4 F1 F4 D2 E2 C3 B2 D3 C07181 2 C07191 2 R07201 2 C07211 2 C07201 2 C07221 2 C07231 2 C07581 2 C07111 2 C07101 2 R07501 2 R0760 1 2 C07601 2 7 OF 119 B.0.0 051-8245 7 OF 53 6 7 9 12 15 37 71213172635 711131537 7 12 13 17 26 35 3945 7 7 7 41 679121537 717192628333644 744 744 7121317263544 3945 3945 3945 3945 7 712 7 44 7 12 13 17 26 35 44 7 17 19 26 28 33 36 44 12 12 12 12 12 11 12 7 12 11 11 11 11 12 12 15 12 44 12 12 8 15 15 41 41 41 41 7 11 13 15 37 18 15 41 41 23 23 23 23 3945 7 11 13 15 37 41 17 19 12 11 11 12 12 12 11 7 7 712 7 14 42 12 44 12 12 7 17 19 26 28 33 36 44 7 44 12 44 717192628333644 12 44 8 15 43
  • 10. VSS VDD_MEM VDDQ SYMBOL 9 OF 9 FMI0_CEN3 FMI0_CEN2 FMI0_IO7 FMI0_IO2 FMI0_IO0 FMI0_IO1 FMI0_IO4 FMI0_IO5 FMI0_IO6 FMI0_CEN1 FMI0_CEN0 FMI0_IO3 FMI0_CEN5 FMI0_CEN4 FMI0_CLE FMI0_ALE FMI0_WEN FMI0_REN FMI1_CEN0 FMI1_CEN1 FMI1_CEN2 FMI1_CEN3 FMI1_CEN4 FMI1_CEN5 FMI1_CEN6 FMI1_CEN7 FMI1_CLE FMI1_REN FMI1_ALE FMI1_WEN FMI1_IO0 FMI1_IO1 FMI1_IO2 FMI1_IO3 FMI1_IO4 FMI1_IO5 FMI1_IO6 FMI1_IO7 ENET_MDC ENET_MDIO SYMBOL 4 OF 9 II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 (3.0V FOR ALL I/O’S) PLACE THE 27PF IN PAIRS AROUND THE IC PLACE THE 27PF IN PAIRS AROUND THE IC (1.8V) TOP PKG MDDR CORE TOP PKG MDDR I/O (1.2V) 100K MF 201 1/20W 1% MF 100K 1% 1/20W 201 1/20W 201 MF 1% 100K 201 1% MF 1/20W 100K 201 1/20W MF 1% 100K 201 100K 1% MF 1/20W 100K MF 1/20W 1% 201 201 100K MF 1/20W 1% CRITICAL FBGA 256MB-DDR-FC H3P 5% 25V NP0-C0G 201 27PF 201 NP0-C0G 25V 5% 27PF27PF 201 5% NP0-C0G 25V 201 NP0-C0G 25V 5% 27PF 5% 25V NP0-C0G 201 27PF27PF 201 NP0-C0G 5% 25V 27PF 201 25V NP0-C0G 5% 27PF 201 5% 25V NP0-C0G 1UF 6.3V 10% 402 CERM 0.22UF 6.3V 20% X5R 201 0.22UF 6.3V 20% X5R 201 0.22UF X5R 20% 6.3V 201 0.22UF 20% X5R 6.3V 201 0.22UF 20% X5R 6.3V 201 0.22UF 201 X5R 20% 6.3V CERM 402 10% 6.3V 1UF CERM 402 10% 6.3V 1UF CERM 402 10% 6.3V 1UF CERM 402 10% 6.3V 1UF 1UF 6.3V 10% 402 CERM 1UF 6.3V 10% 402 CERM CRITICAL 256MB-DDR-FC H3P FBGA 6.3V 402 X5R 4.7UF 20% CERM 402 10% 6.3V 1UF1UF 6.3V 10% 402 CERM 1UF 6.3V 10% 402 CERM 1UF 6.3V 10% 402 CERM 201 X5R 20% 6.3V 0.22UF0.22UF 6.3V 20% X5R 201201 20% 4V CERM-X5R-1 0.47UF 201 4V CERM-X5R-1 0.47UF 20% 201 4V CERM-X5R-1 0.47UF 20% 201 4V CERM-X5R-1 0.47UF 20% CERM 402 10% 6.3V 1UF CERM 402 10% 6.3V 1UF CERM 402 10% 6.3V 1UF 201 X5R 20% 6.3V 0.22UF0.22UF 6.3V 20% X5R 201 CERM 402 10% 6.3V 1UF 201 X5R 20% 6.3V 0.22UF0.22UF 6.3V 20% X5R 201 27PF 201 NP0-C0G 25V 5% 27PF 5% 25V NP0-C0G 201 25V NP0-C0G 5% 201 27PF27PF 5% 25V NP0-C0G 201 100K 1/20W MF 1% 201 1% 1/20W 201 MF 100K 100K 1% MF 1/20W 201 MF 1% 1/20W 100K 201 1/20W 201 MF 1% 100K 1/20W MF 1% 100K 201 100K 1% MF 1/20W 201 100K MF 1/20W 1% 201 201 1% MF 1/20W 100K 1% 1/20W 201 MF 100K 201 1/20W MF 1% 100K 1% 1/20W MF 100K 201 1/20W 201 MF 1% 100K 201 100K 1% MF 1/20W 100K 1% MF 1/20W 201201 1% 1/20W MF 100K 201 1% MF 1/20W 100K 1% 1/20W 201 MF 100K 201 1/20W MF 1% 100K 1% 1/20W MF 100K 201 1/20W 201 MF 1% 100K 201 100K 1% MF 1/20W 100K 1% MF 1/20W 201201 1% 1/20W MF 100K SYNC_MASTER=JAMES SYNC_DATE=12/21/2009 AP NAND & GPIO, NOR F0CLE F1CLE F0ALE F1ALE F0WE_N F1RE_N F1WE_N F0RE_N =PP1V8_SDRAM_H3 =PP1V2_SDRAM_MDDR F0CE0_N F0CE1_N F0CE3_N F0CE2_N F1CE0_N F1CE1_N F1CE2_N =PP3V3_NAND F0AD<7> F0AD<2> F0AD<0> F0AD<1> F0AD<4> F0AD<5> F0AD<6> F0AD<3> LAND_DK_HI_I PORT_DK_HI_I F0CLE F0ALE F0WE_N F0RE_N LAND_BRICK_ID_P LAND_BRICK_ID_N PORT_BRICK_ID_P PORT_BRICK_ID_N F1CLE F1RE_N F1ALE F1WE_N F1AD<0> F1AD<1> F1AD<2> F1AD<3> F1AD<4> F1AD<5> F1AD<6> F1AD<7> MLC_PWR_EN LAND_DOCK_VIDEO_AMP_EN F1AD<7> F1AD<6> F1AD<5> F1AD<4> F1AD<3> F1AD<2> F1AD<1> F1AD<0> F0AD<7> F0AD<6> F0AD<5> F0AD<4> F0AD<3> F0AD<2> F0AD<1> F0AD<0> F1CE3_N =PP3V3_NAND R0825 1 2 R0836 1 2 R0828 1 2 R0827 1 2 R0834 1 2 R0833 1 2 R0832 1 2 R0831 1 2 U0652 A11 A21 P1 T27 W27 AG10 F27 AB1 AE1 AG11 AG16 AG24 D1 D27 H27 M1 A17 A24 W1 N27 T1 A20 A8 AA27 A5 AC1 AD27 AG4 AG7 C1 K1 K27 K6 K7 L11 M11 M13 M14 M15 M16 M17 M2 N11 N2 N26 N3 N4 N5 N9 P11 P13 P14 P15 P16 P17 P2 P23 P24 P4 P5 P6 P9 R11 R13 R15 R2 R4 R5 R6 R7 R9 T11 T2 T26 U11 U13 U14 U15 U16 U17 U19 U22 U26 W17 W2 W26 W9 K14 K15 K16 K17 K2 K26 K3 K4 K5 C08321 2 C08191 2 C08181 2 C08171 2 C08161 2 C08151 2 C08141 2 C08131 2 C08061 2 C08041 2 C08031 2 C08021 2 C08011 2 C08001 2 C08051 2 C08071 2 C08081 2 C08091 2 C08101 2 C08111 2 C08121 2 U0652 K24 J22 AG19 AC18 AG17 AD18 AB19 J23 F25 AF18 AC19 AF15 AE18 AG15 AD19 AE19 AB18 AE15 AF19 AF22 AE23 AE27 AF20 AG20 AG18 AG25 AF25 AB24 AD23 AE26 AF26 AC22 AC23 AC27 AC25 AC26 AC24 AG22 AF21 AG21 C08311 2 C08301 2 C08291 2 C08281 2 C08271 2 C08261 2 C08251 2 C08241 2 C08231 2 C08221 2 C08211 2 C08541 2 C08531 2 C08521 2 C08511 2 C08501 2 C08621 2 C08611 2 C08601 2 C08731 2 C08721 2 C08711 2 C08701 2 R0857 1 2 R0856 1 2 R0855 1 2 R0854 1 2 R0853 1 2 R0852 1 2 R0851 1 2 R0850 1 2 R0867 1 2 R0866 1 2 R0865 1 2 R0864 1 2 R0863 1 2 R0862 1 2 R0861 1 2 R0860 1 2 R0877 1 2 R0876 1 2 R0875 1 2 R0874 1 2 R0873 1 2 R0872 1 2 R0871 1 2 R0870 1 2 8 OF 119 B.0.0 051-8245 8 OF 53 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 615 715 4344 4344 4344 4344 4344 4344 4344 781543 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 17 17 84344 84344 84344 84344 27 27 27 27 84344 84344 84344 84344 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 20 10 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 8 43 44 4344 781543
  • 11. DP_PAD_TX0- DP_PAD_TX1- SMIA_RX_DATA+ SMIA_RX_DATA- SMIA_RX_CLK+ MIPID_VDD11_PLL DP_PAD_AVDD0 DP_PAD_AVDD1 DP_PAD_AVDDP0 DP_PAD_AVDDX DP_PAD_DVDD SMIA_VDD18 SMIA_VDD11 DP_PAD_DC_TP SMIA_VSS18 DP_PAD_DVSS DP_PAD_AVSSX DP_PAD_AVSSP0 DP_PAD_AVSS1 MIPID_DPDATA2 MIPID_DNDATA2 MIPID_DNDATA0 MIPID_DPDATA1 MIPID_DNDATA1 MIPID_DNDATA3 MIPID_DPCLK MIPID_DNCLK MIPIC_DPDATA0 MIPI_VDD11 MIPID_VDD18 DP_HPD SWI_DATA MIPID_VREG_0P4V DP_PAD_AVDD_AUX DP_PAD_AUXN DP_PAD_AUXP MIPIC_DNCLK MIPIC_DPCLK MIPI_VSS DP_PAD_AVSS_AUX MIPID_DPDATA3 MIPIC_DNDATA0 MIPIC_DPDATA1 MIPIC_DNDATA1 DP_PAD_AVSS0 MIPID_DPDATA0 MIPI_VSYNC SMIA_RX_CLK- DP_PAD_TX1+ DP_PAD_TX0+ DP_PAD_R_BIAS SYMBOL 2 OF 9 DIR A B VCCBVCCA GND II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 NOTE: 0.6V ANALOG REF (ANALOG DC TEST PORT) P/N 311S0487 SAME PART AS APN:353S2652 BUT CE PREFERRED PART NUMBER CRITICAL H3P 256MB-DDR-FC FBGA 201 6.3V X5R 0.1UF 10% 10% 0.1UF X5R 6.3V 201 10% X5R 2.2NF 10V 201 201 0.01UF 10% X5R 10V 5% 27PF 25V 201 NP0-C0G 80-OHM-0.2A-0.4-OHM 0201-1 201 6.3V 10% 0.1UF X5R 27PF NP0-C0G 201 5% 25V 0.01UF 10% X5R 10V 201 201 4V CERM-X5R-1 0.47UF 20% 201 6.3V X5R 0.1UF 10% 6.3V X5R 0.1UF 10% 201 6.3V X5R 0.1UF 10% 201 6.3V X5R 0.1UF 10% 201 201 10% 0.1UF X5R 6.3V 10% 0.1UF X5R 6.3V 201 10% 0.1UF X5R 6.3V 201 5% 10K 201 1/20W MF 0 MF 1/20W 5% 201 05% 1/20W MF 201 1% 4.99K 1/20W MF 201 0201-1 80-OHM-0.2A-0.4-OHM 0201-1 80-OHM-0.2A-0.4-OHM 0201-1 80-OHM-0.2A-0.4-OHM 0201-1 80-OHM-0.2A-0.4-OHM 0201-1 80-OHM-0.2A-0.4-OHM 80-OHM-0.2A-0.4-OHM 0201-1 80-OHM-0.2A-0.4-OHM 0201-1 6.3V CERM 402 1UF 10% 10% 1UF 402 CERM 6.3V 10% 1UF 402 CERM 6.3V 10% 1UF 402 CERM 6.3V 10% 1UF 402 CERM 6.3V 10% 1UF 402 CERM 6.3V CERM 10% 1UF 402 6.3V BGA1 CRITICAL SN74AVCH1T45 SYNC_MASTER=JAMES SYNC_DATE=12/21/2009 AP RGB/CLCD,CAMERA AP_SWI_R MLC_SWI =PP3V3_MLC=PP1V8_H3 H3_DP_AUX_P H3_DP_HPD H3_DP_AUX_N 0.4MM 0.2MM PP1V1_MIPI_PHY =PP1V8_MIPI H3_MIPID_0P4V TP_H3_MIPIC_CLK_N TP_H3_MIPIC_CLK_P TP_H3_MIPIC_DATA_N<1> TP_H3_MIPIC_DATA_P<1> TP_H3_MIPIC_DATA_N<0> TP_H3_MIPIC_DATA_P<0> H3_MIPID_CLK_N H3_MIPID_CLK_P H3_MIPID_DATA_N<3> H3_MIPID_DATA_P<3> H3_MIPID_DATA_N<2> H3_MIPID_DATA_P<2> H3_MIPID_DATA_N<1> H3_MIPID_DATA_P<1> H3_MIPID_DATA_N<0> H3_MIPID_DATA_P<0> =PP1V1_MIPI_PLL H3_DP_TX_P<0> H3_DP_TX_N<0> H3_DP_TX_P<1> H3_DP_TX_N<1> TP_CAM_SMIA_DATA_N TP_CAM_SMIA_DATA_P TP_CAM_SMIA_CLK_P TP_CAM_SMIA_CLK_N =PP1V1_MIPI TP_DP_ANALOG_TEST H3_DP_R_BIAS SWI_BLCTRLAP_SWI =PP1V1_SMIA =PP1V8_SMIA =PP1V1_DPORT =PP1V8_H3 =PP1V8_H3 =PP1V8_H3 =PP1V8_H3 0.2MM 0.4MM H3_DP_AVDD 0.2MM 0.4MM H3_DP_AVDDP0 0.2MM 0.4MM H3_DP_AVDDX 0.2MM 0.4MM H3_DP_DVDD H3_SMIA_VDD18 0.2MM 0.4MM 0.2MM 0.4MM H3_DP_AVDD_AUX 0.2MM 0.4MM H3_SMIA_VDD11 DIFF_MIC_SEL U0652 R19 E26 E27 E22 F24 C23 E23 C22 D22 E24 B23 D23 B22 A22 G27 G26 E25 C26 C27 B25 A25 Y18 Y15 W15 AA13 AG13 AE14 AF9 AF12 AE13 AG9 AF13 AG5 AF3 AE5 AF6 AG8 AF5 AG3 AE6 AG6 AF8 Y13 V13 W13 AG14 AF14 AD13 AD14 AA18 AC14 Y19 AA19 C09001 2 C09011 2 C09021 2 C09031 2 C09041 2 FL0900 1 2 C09051 2 C09061 2 C09071 2 C09081 2 C09091 2 C09101 2 C09111 2 C09121 2 C09131 2 C09511 2 C09501 2 R09501 2 R0952 1 2 R0953 1 2 R09201 2 FL0907 1 2 FL0906 1 2 FL0905 1 2 FL0904 1 2 FL0903 1 2 FL0902 1 2 FL0901 1 2 C09271 2 C09261 2 C09251 2 C09241 2 C09231 2 C09221 2 C09211 2 U0901 C1 C2 B2 B1 A1 A2 9 OF 119 B.0.0 051-8245 9 OF 53 13 13 14 15 25679121537 37 45 37 37 45 15 1445 1445 1445 1445 1445 1445 1445 1445 1445 1445 15 37 45 37 45 37 45 37 45 15 19 15 15 15 6 7 9 12 15 37 6 7 9 12 15 37 6 7 9 12 15 37 6 7 9 12 15 37 34
  • 12. DAC_AVDD30D DAC_VREF DAC_OUT2 DAC_IREF DAC_COMP DAC_AVSS30D DAC_AVSS30A2 DAC_AVSS30A1 DAC_OUT1 DAC_OUT3 DAC_AVDD30A SYMBOL 3 OF 9CH.2OUT EN CH.3IN CH.2IN VS+ CH.1INCH.1OUT CH.3OUT GND CH.2OUT EN CH.3IN CH.2IN VS+ CH.1INCH.1OUT CH.3OUT GND TABLE_ALT_ITEM PART NUMBER ALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS: TABLE_ALT_HEAD II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 CIN YIN CVBSIN (YIN) (CIN) (CVBSIN) NOTE: PLACE R1005,R1046-47 NEAR U0652 201 MF 75 1/20W 1% JTAG_DAP 1% 1/20W MF 201 200 200 1% MF 1/20W 201 6.3V 0.1UF 201 X5R 10% PORTRAIT_DOCK 1/20W 201 MF 1% 6.34K 6.3V X5R 10% 201 0.1UF 75 1/20W MF 1% 201 JTAG_DAP 1/20W MF 201 1% 75 JTAG_DAP MF 1/20W 200 1% 201 201 10% X5R 6.3V 0.1UF 6.3V 0.1UF 201 X5R 10% LANDSCAPE_DOCK LANDSCAPE_DOCK 1/20W MF 201 1% 75 75 LANDSCAPE_DOCK 1% 1/20W 201 MF 1/20W 100K MF 201 5% LANDSCAPE_DOCK LANDSCAPE_DOCK 201 1% MF 1/20W 75 CRITICAL FBGA 256MB-DDR-FC H3P 6.3V X5R 10% 201 0.1UF 240-OHM-0.2A-0.8-OHM 0201 6.3V CERM 1UF 10% 402 0.1UF 10% X5R 6.3V 201 THS7319 PORTRAIT_DOCK 5% 201 MF 100K NOSTUFF SM CRITICAL LANDSCAPE_DOCK THS7319 BGA SYNC_DATE=12/21/2009 AP TVOUT SYNC_MASTER=JAMES 353S2493 U1009,U1010 353S2684 INTERSIL VIDEO_AGND 0.3MM 0.175MM VIDEO_AGND LAND_COUT LAND_DOCK_VIDEO_AMP_EN DAC_OUT1 DAC_OUT2 DAC_OUT3 =PP3V0_VIDEO_BUFFER DAC_OUT2 PORT_DOCK_VIDEO_AMP_EN DAC_OUT3 DAC_OUT1 VIDEO_AGND =PP3V0_VIDEO_H3 PP3V0_DAC_AVDD_A 0.4MM 0.2MM DAC_VREF DOCK1_CVBS_PB DOCK2_Y_PR MAKE_BASE=TRUE PORT_DOCK_Y_PR DOCK2_CVBS_PB MAKE_BASE=TRUE PORT_DOCK_COMP_PB DOCK2_C_Y PORT_DOCK_C_Y MAKE_BASE=TRUE DAC_IREF DAC_COMP PORT_COUT PORT_CVBS_OUT PORT_YOUT LAND_YOUT MAKE_BASE=TRUE LAND_DOCK_Y_PR DOCK1_Y_PR DOCK1_C_Y =PP3V0_VIDEO_BUFFER LAND_CVBS_OUT MAKE_BASE=TRUE LAND_DOCK_C_Y LAND_DOCK_COMP_PB MAKE_BASE=TRUE BGA CRITICAL 1/20W R1004 1 2 R1046 1 2 R1047 1 2 C10261 2 R10121 2 C10151 2 R1003 1 2 R1043 1 2 R1005 1 2 C10141 2 C10301 2 R1050 1 2 R1051 1 2 R10531 2 R1052 1 2 U0652 C13 D14 B14 C14 D15 E18 A13 A15 A14 B13 E19 C10201 2 FL1000 1 2 C10281 2 C10711 2 U1009 A1A3 B1B3 C1C3 B2 A2C2 R10081 2 XW1000 1 2 U1010 A1A3 B1B3 C1C3 B2 A2C2 10 OF 119 B.0.0 051-8245 10 OF 53 10 10 45 8 10 45 10 45 10 45 1015 1045 6 1045 1045 10 15 3845 123945 123945 123945 45 45 45 45 3845 3845 1015 45
  • 13. GND Y1 Y2 2OE* A2 1OE* A1 VCC VCC GND A1 Y1 Y2 1OE A2 2OE S GND OUTPUT MUX SELECTOR I1 I0 Y VCC S GND OUTPUT MUX SELECTOR I1 I0 Y VCC II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 201 X5R 6.3V 10% 0.1UF 100K MF 201 1/20W 1% X5R 201 6.3V 0.1UF 10% K48M CRITICAL 74LVC2G125 SOT833 K48M CRITICAL 74LVC2G126GT/S500 SOT833 K48M_DEVELOPMENT 6.3V 201 X5R 10% 0.1UF K48M_PRODUCTION 1/20W 0 5% 201 MF K48M_DEVELOPMENT 74LVC1G157 SOT891 K48M_DEVELOPMENT 10% 201 6.3V X5R 0.1UF K48M_DEVELOPMENT 100K 1/20W 1% MF 201 K48M_PRODUCTION 1/20W MF 201 5% 0 K48M_DEVELOPMENT 201 MF 1% 1/20W 100K K48M_DEVELOPMENT SOT891 74LVC1G157 K48M_DEVELOPMENT MF 100K 1% 1/20W 201 K48M_DEVELOPMENT MF 100K 1% 1/20W 201 K48 201 MF 1/20W 0 5% K48 201 MF 1/20W 0 5% 1M 1% 1/20W MF 201 3G AND DEBUG MUXES SYNC_DATE=12/21/2009SYNC_MASTER=JAMES LAND_DOCK_ACC_TO_POD DOCK_UART_CTRL LAND_DOCK_POD_TO_ACC AP_UART4_TXD_MUX LAND_DOCK_P17 BB_USART0_RXD_CTRL AP_UART1_TXD AP_UART1_CTS_L BB_USART0_RTS_L AP_UART1_RTS_L BB_USART0_CTS_L AP_UART1_RXD BB_USART0_TXD AP_UART4_RXD_MUX LAND_DOCK_ACC_TO_POD AP_UART4_RXD_MUX AP_UART4_TXD_MUX LAND_DOCK_POD_TO_ACC =PP1V8_SDRAM_MISC AP_UART2_RXD BB_USART0_TXD UMTS_TXD =PP3V0_HP_DET_BIAS =PP3V0_IO_H3 BB_USART0_RXD =PP1V8_SDRAM_MISC UMTS_RXD =PP1V8_SDRAM_MISC UMTS_RXD_CTRL AP_UART2_TXD LAND_DOCK_P14 C11001 2 R11001 2 C11011 2 U1100 2 5 4 1 7 8 6 3 U1101 2 5 4 1 7 8 6 3 C11041 2 R1103 1 2 U1104 2 3 1 6 5 4 C11051 2 R11041 2 R1105 1 2 R11541 2 U1105 2 3 1 6 5 4 R11061 2 R11551 2 R1130 1 2 R1131 1 2 R11011 2 11 OF 119 B.0.0 051-8245 11 OF 53 11 38 19 11 38 1112 38 7 7 7 12 7 12 7 11 12 11 12 1138 11 12 1112 11 38 11 15 36 7 1112 12 15 27 33 34 36 39 7 13 15 37 12 11 15 36 12 11 15 36 7 7 38
  • 14. II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 SPI0 (DVT AND BEYOND)0000 DVT011 EVT 2010 SPI0 WITH TEST MODE0010 EVT 1001 PROTO 3000 000 PROTO3 011 K48 DEV 010 K48AP BOARD_REV[2:0] BOARD_ID[2:0] FOR REFERENCE CURRENT SETTING -> 1110 FMI0/1 4/4 CS W/TEST 1111 RESERVED 1101 FMI0/1 4/4 CS 1100 FMI0/1 2/2 CS 1010 FMI1 4CS W/TEST 0110 FMI0 4CS W/TEST 0010 SPI0 W/TEST BOOT_CONFIG[3:0] 1001 FMI1 4 CS 1000 FMI1 2 CS 0111 RESERVED 0101 FMI0 4CS 0100 FMI0 2CS 0001 SPI1 0000 SPI0 0011 SPI1 W/TEST BOARD ID <6> = BOARD_ID[2] BOARD ID <4> = BOARD_ID[0] BRD_REV[2-0] BOARD REVISION BOARD ID <0> = BOOT_CONFIG[0] BOARD ID <1> = BOOT_CONFIG[1] BOARD ID <2> = BOOT_CONFIG[2] BOARD ID <3> = BOOT_CONFIG[3] BOOT CONFIG ID BOOT_CONFIG[3-0] CODEC_IRQ_N (GPIO18) ALIASES FROM PAGE 50 ALIASES FROM PAGE 11ALIASES FROM PAGE 7 FLASH_DOUT FLASH_CLK BOARD ID <5> = BOARD_ID[1] BOARD ID 010 011 BOARD_ID[2-0] K48 AP K48 DEV ALIASES FROM PAGE 51 ALIASES FOR PAGE 57 NOTE: JTAG SCAN DUMP 3.92K 1/20W MF 201 1% 3.92K 1% 201 MF 1/20W NOSTUFF JTAG_DAP 0 NOSTUFF 0 201 MF 1/20W 0 5% JTAG_TAP 201 MF 1/20W 5% JTAG_TAP 0 0 H3_A0_DAP 0 5% 1/20W MF 201 JTAG_TAP 201 MF 1/20W 1% 3.92K NOSTUFF 201 MF 1/20W 1% 3.92K NOSTUFF 201 MF 1/20W 1% 3.92K AP MISC & ALIASES SYNC_DATE=12/21/2009SYNC_MASTER=JAMES DOCK2_CVBS_PBAP_TRSTN NC_AP_TDO AP_TDO TRUE DOCK2_Y_PRAP_TDI DOCK2_C_Y RESET_1V8_N AP_LD_DK_ADPTR LAND_DK_ADPTR AP_PT_DK_ADPTR PORT_DK_ADPTR I2C2_SDA_3V0 I2C2_SCL_3V0 PROX_ACSHIELDPROX_ACSHIELD_CONN PROX_SCL_3V0 PROX_SDA_3V0 AP_UART3_RXD MAKE_BASE=TRUE FLASH_DIN =PP1V8_H3 AUD_I2S_LRC_L61MAKE_BASE=TRUE I2S0_LRCLK AUD_I2S_BITCLK_L61MAKE_BASE=TRUE I2S0_BCLK AUD_I2S_SDIN_L61 MAKE_BASE=TRUE I2S0_DOUT AUD_I2S_SDOUT_L61MAKE_BASE=TRUE I2S0_DIN BB_I2S1_WA0 MAKE_BASE=TRUE I2S1_LRCLK I2S1_DIN BB_I2S1_CLK MAKE_BASE=TRUE I2S1_BCLK BB_I2S1_TX MAKE_BASE=TRUE I2S1_DOUT L61_I2S_MCLKMAKE_BASE=TRUE I2S1_MCK PORT_DOCK_ACC_TO_PODMAKE_BASE=TRUE AP_UART0_RXD BB_USART0_TXD_CONNMAKE_BASE=TRUE BB_USART0_TXD BB_USART0_RXD_CONN MAKE_BASE=TRUE BB_USART0_RXD BB_USART0_RTS_L_CONNMAKE_BASE=TRUE BB_USART0_RTS_L BB_USART0_CTS_L_CONNMAKE_BASE=TRUE BB_USART0_CTS_L UMTS_RXD_CONN MAKE_BASE=TRUE UMTS_RXD UMTS_TXD_CONNMAKE_BASE=TRUE UMTS_TXD AP_UART4_TXD_MUXAP_UART4_TXD MAKE_BASE=TRUE AP_UART4_RXD_MUXAP_UART4_RXD MAKE_BASE=TRUE LAND_USB_PWR USB_PWR_A MAKE_BASE=TRUE MAKE_BASE=TRUE AP_UART3_TXD MAKE_BASE=TRUE AP_UART3_CTS_L MAKE_BASE=TRUE AP_UART3_RTS_L CONN_AP_UART3_RXD CONN_AP_UART3_TXD CONN_AP_UART3_CTS_L CONN_AP_UART3_RTS_L =PP1V8_H3 AP_GPIO25_BOARD_ID_1 NC_BOARD_ID_3 MAKE_BASE=TRUE NC_BOARD_ID_2 MAKE_BASE=TRUE AP_JTAG_SEL JTAG_TRSTN_CTRL AP_TRSTN AP_GPIO29_BOARD_ID_3 AP_GPIO41_BRD_REV2 MAKE_BASE=TRUE BB_I2S1_RX BB_FLASH_ACTIVEMAKE_BASE=TRUE AP_GPIO39_BRD_REV0 AP_GPIO40_BRD_REV1 AP_GPIO41_BRD_REV2 GPS_UART_RX MAKE_BASE=TRUE AP_UART6_TXD GPS_UART_TX MAKE_BASE=TRUE AP_UART6_RXD AP_UART6_CTS_L AP_UART6_RTS_L GPS_UARTS_CTS_LMAKE_BASE=TRUE MAKE_BASE=TRUE GPS_UARTS_RTS_L AP_GPIO28_BOARD_ID_2 AP_UART0_TXD MAKE_BASE=TRUE PORT_DOCK_POD_TO_ACC BB_RST_RADIO MAKE_BASE=TRUE BB_RST R06251 2 R06221 2 R0663 1 2 R0661 1 2 R1200 1 2 R1202 1 2 R1203 1 2 R1201 1 2 R06271 2 R06281 2 R06291 2 12 OF 119 B.0.0 051-8245 12 OF 53 10 39 45612 6 44 10 39 45644 10 39 45 6 6 16 6 16 7 13 17 26 35 44 7 13 17 26 35 4242 42 42 7 7 679121537 287 287 287 287 32 41744 744 32 41744 32 41744 287 397 4111 4111 4111 4111 4111 4111 117 117 38 16 7 7 7 39 39 39 39 679121537 6 6 6 6 12 6 612 32 41 41 6 6 612 417 417 7 7 41 41 6 7 39 416
  • 15. MONITOR5 VDD33A_OSC VSYNC PPC MONITOR6 MONITOR4 TCLKN TEST MONITOR1 S_DNDATA2 S_DPDATA2 S_DNDATA1 S_DPDATA1 S_DPDATA0 S_DNDATA0 VDD33A_18LDO VDD33A_12LDO_1 VDD33A_12LDO_0 VDD33A_12LDO_2 VDD33P_LVDS VDD33A_LVDS VDD33D_LVDS TCLKP TCN TCP TBN TBP TAN TAP PWM VSS33A_18LDO VSS33A_12LDO_0 VSS33A_12LDO_1 VSS33A_LVDS MONITOR3 MONITOR2 MONITOR0 M_DPDATA0 S_DPCLK S_DNCLK M_DNDATA0 TDP TDN ROUT_LVDS SWI RESET* VSS33D_LVDS VSS12D_PLL VSS33P_LVDS MLC_SCL MLC_SDA EDID_SCL EDID_SDA M_DPCLK M_VREG_0P4V M_DNCLK CAP_12LDO_5 CAP_12LDO_3 CAP_12LDO_1 CAP_12LDO_0 CAP_18LDO BIST S_DNDATA3 S_DPDATA3 WC* E2 E0 SDASCL E1 VSS VCC EEPROM THM_P D G S PP PP PP PP PP PP PP II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) TABLE_5_ITEM TABLE_5_ITEM MLC EEPROM:RAW APN 335S0661 MLC SELECTED I2C MLC CAN READ H3P CAN WRITE WC_L USB MUX TABLE 1 0 STUFF R1499/R1498 TO BYPASS I2C SWITCHES PLACE ON TOP OF PADS FOR U1402/U1403 I2C MUXING CIRCUITRY WHEN WC_L IS LOW, CAN WRITE TO EEPROM WHEN WC_L IS HIGH, CANNOT WRITE TO EEPROM 8.45K 1% 1/20W MF 201 201 10V 2.2NF X5R 10% FBGA1 S6T2MLC OMIT MLP M24C64 0201-1 80-OHM-0.2A-0.4-OHM 0201-1 80-OHM-0.2A-0.4-OHM 80-OHM-0.2A-0.4-OHM 0201-1 4.7UF 402 20% 6.3V X5R-CERM 4.7UF 20% 6.3V 402 X5R-CERM 4.7UF 6.3V 402 X5R-CERM 20% CERM 10V 20% 0.1UF 402 20% 0.1UF 402 CERM 10V 0.1UF CERM 10V 402 20% 4.7UF 20% 6.3V X5R-CERM 402 201 MF 1/20W 1% 100K 201 100K 1/20W MF 1% 201 1% 1/20W MF 10K 402 20% 4.7UF X5R-CERM 6.3V MLC_DEV BGA SN74LVC2G66YZPR MLC_DEV BGA SN74LVC2G66YZPR MLC_DEV BGA SN74LVC2G66YZPR MLC_DEV BGA SN74LVC2G66YZPR 201 MF 1/20W 5% 4.7K 201 MF 5% 1/20W 4.7K MLC_PROD 1/20W 5% 0 201 MF MLC_PROD 5% 0 201 1/20W MF MLC_DEV SOD-VESM-HF SSM3K15FV MLC_DEV 100K 1% 201 MF 1/20W 201 NOSTUFF 100K 1/20W 1% MF 110K 1% 1/20W MF 201 1% MF 1/20W 100K 201 P4MM SM NOSTUFF NOSTUFF P4MM SM 6.3V 20% 4.7UF 402 X5R-CERM SM P4MM NOSTUFF SM P4MM NOSTUFF NOSTUFF P4MM SM SM P4MM NOSTUFF NOSTUFF P4MM SM 402 0.1UF 20% 10V CERM 25V CERM 0201 82PF 5% 20% 402 4.7UF X5R-CERM 6.3V 1 U1401 CRITICAL 54MHZ_PANEL341S2604 MLC EEPROM 54MHZ LVDS,2MHZ SWI MLC EEPROM 100MHZ LVDS,2MHZ SWI1 U1401 CRITICAL 100MHZ_PANEL341S2606 SYNC_DATE=09/16/2009SYNC_MASTER=MIAMI MLC =PP3V3_MLC MIN_LINE_WIDTH=0.4 MM MAX_NECK_LENGTH=3 MM VOLTAGE=3.3V PP3V3_MLC_18LDO_12LDO MIN_NECK_WIDTH=0.2 MM NET_SPACING_TYPE=PWR MLC_MIPID_DATA_P<2> =PP3V3_MLC_EEPROM MLC_SDA_3V3 NC_MASTER_MIPI_CLK_N =PP3V3_MLC MLC_VREG_0V4 MLC_MUX_SCL_3V3 MLC_MIPID_DATA_P<0> MLC_MIPID_CLK_N MLC_MIPID_CLK_P NC_MASTER_MIPI_DAT_N NC_MASTER_MIPI_DAT_P NC_MASTER_MIPI_CLK_P MLC_MONITOR0_PD ROUT_LVDS NC_MONITOR3 NC_MONITOR2 NC_MONITOR1 MLC_MIPID_DATA_N<0> =PP3V0_IO_H3 MIN_LINE_WIDTH=0.4 MM VOLTAGE=1.2V MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_NECK_WIDTH=0.2 MM MLC_CAP_1V2LDO_0 MLC_CAP_1V2LDO_1_3 MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR VOLTAGE=1.2V MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.4 MM MLC_CAP_1V2_LDO_5 MAX_NECK_LENGTH=3 MM VOLTAGE=1.2V NET_SPACING_TYPE=PWR MLC_SCL_3V3 =PP3V3_MLC MLC_2MUX_SDA_3V3 MLC_2WC_L MLC_WC I2C2_SCL_3V0 MLC_2WC_L MLC_WC I2C2_SDA_3V0 MLC_2MUX_SCL_3V3 =PP3V0_IO_H3 =PP3V0_IO_H3 =PP3V3_MLC =PP3V0_IO_H3 MLC_CAP_1V8LDO VOLTAGE=1.2V MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR LVDS_DDC_DATA LVDS_DDC_CLK MLC_MIPID_DATA_P<3> MLC_MIPID_DATA_N<3> MLC_SDA_3V3 MLC_SCL_3V3 MLC_RESET_L MLC_SWI NC_LVDS_DATA_N<3> NC_LVDS_DATA_P<3> LCD_BKLT_PWM LVDS_DATA_P<0> LVDS_DATA_N<0> LVDS_DATA_P<1> LVDS_DATA_N<1> LVDS_DATA_P<2> LVDS_DATA_N<2> LVDS_CLK_P MLC_MIPID_DATA_P<1> MLC_MIPID_DATA_N<1> MLC_MIPID_DATA_N<2> LVDS_CLK_N NC_MONITOR4 NC_MONITOR6 MLC_PPC_OUT TP_MLC_VSYNC NC_MONITOR5 MLC_MIPID_CLK_P MLC_MIPID_CLK_N MLC_TEST MLC_BIST MLC_SWI MLC_MUX_SDA_3V3 MLC_2WC_L MIN_LINE_WIDTH=0.4 MM VOLTAGE=3.3V PP3V3_MLC_DIG_12LDO MIN_NECK_WIDTH=0.2 MM MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MLC_MIPID_DATA_P<3> MLC_MIPID_DATA_N<3> MLC_MIPID_DATA_N<0> MLC_MIPID_DATA_P<0> MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR VOLTAGE=3.3V MIN_NECK_WIDTH=0.2 MM PP3V3_MLC_LVDS MIN_LINE_WIDTH=0.4 MM MLC_WC C1400 1 2 C1403 1 2 C1401 1 2 C1402 1 2 R14011 2 C14041 2 U1400 B7 E3 H7 A7 A4 C3 A8 B6 C2 B2 C1 B1 B3 A6 A5 H5 G3 G4 G5 F4 E4 D3 G6 D4 B5 C5 F2 D2 E2 G2 H2 F1 D1 E1 G1 H1 H6 G7 G8 F7 F8 C7 C8 E7 E8 D7 D8 B8 F3 H8 B4 A2 C6 H4 E5 D5 A3 H3 C4 A1 D6 F6 E6 F5 U1401 1 2 3 6 5 9 8 4 7 FL1400 1 2 FL1401 1 2 FL1402 1 2 C1410 1 2 C1411 1 2 C1412 1 2 C14131 2 C14141 2 C14151 2 R14021 2 R14031 2 R14061 2 U1403 D2 C2 C1 D1 A2 U1403 A1 B1 B2 D1 A2 U1402 A1 B1 B2 D1 A2 U1402 D2 C2 C1 D1 A2 R14041 2 R14051 2 R1499 1 2 R1498 1 2 Q1490 3 1 2 R14971 2 R14081 2 R14071 2 R14101 2 PP1400 1 PP1408 1 PP1401 1 PP1409 1 PP1410 1 PP1411 1 PP1412 1 C14171 2 C14161 2 14 OF 119 B.0.0 051-8245 13 OF 53 9131415 25 14 14 13 913141525 14 1314 1314 1314 1314 711131537 13 913141525 14 1314 13 712172635 1314 13 71217263544 14 711131537 711131537 913141525 711131537 25 25 1314 1314 13 13 6 913 21 25 45 25 45 25 45 25 45 25 45 25 45 25 45 14 14 14 25 45 25 13 14 13 14 9 13 14 1314 13 14 13 14 13 14 13 14 13
  • 16. II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 MLC ALIASES SYNC_DATE=09/16/2009 MLC ALIASES SYNC_MASTER=MIAMI H3_MIPID_DATA_P<3> MAKE_BASE=TRUE H3_MIPID_DATA_P<2> MAKE_BASE=TRUE MLC_MIPID_DATA_P<2> =PP3V3_MLC MLC_WC_L MLC_MIPID_CLK_P MLC_MIPID_CLK_N MLC_MIPID_DATA_P<1> MLC_MIPID_DATA_P<0> MLC_MIPID_DATA_N<3> MLC_MIPID_DATA_P<3> MLC_MIPID_DATA_N<0> MLC_MIPID_DATA_N<1> MLC_MIPID_DATA_N<2> MLC_2MUX_SDA_3V3 MLC_2MUX_SCL_3V3 H3_MIPID_DATA_P<1> MAKE_BASE=TRUE H3_MIPID_DATA_N<1> MAKE_BASE=TRUE H3_MIPID_DATA_N<2> MAKE_BASE=TRUE MAKE_BASE=TRUE H3_MIPID_DATA_N<3> H3_MIPID_CLK_P MAKE_BASE=TRUE H3_MIPID_CLK_N MAKE_BASE=TRUE H3_MIPID_DATA_P<0> MAKE_BASE=TRUE H3_MIPID_DATA_N<0> MAKE_BASE=TRUE MAKE_BASE=TRUE MLC_MUX_SDA_3V3 MLC_MUX_SCL_3V3 MAKE_BASE=TRUE MLC_2WC_L MAKE_BASE=TRUE =PP3V3_MLC_EEPROM 15 OF 119 B.0.0 051-8245 14 OF 53 945 945 13 9 13 15 25 7 13 13 13 13 13 13 13 13 13 13 13 945 945 945 945 945 945 945 945 13 13 13 13
  • 17. II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 POWER CONN / ALIAS (REPLACE WITH 155S0243 IF NEED FILTER) LDO RAILS PROGRAMMABLE ON/OFF BUCK RAILS CHARGER MAIN BATTERY 5% 0 1/4W FF-LF 1206 SYNC_DATE=12/04/2009SYNC_MASTER=MARK Power Conn / Alias MAKE_BASE=TRUE VOLTAGE=3.3V MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm PP3V3_OUT =PP3V3_AUDIO =PP3V3_H3_USB VOLTAGE=1.8V MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm MAKE_BASE=TRUE NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM PP1V8_SDRAM =PP1V8_SDRAM_GPS =PP1V8_SDRAM_1V2 MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.4 MM MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MAKE_BASE=TRUE VOLTAGE=3.3V PP3V3_MLC_OUT =PP3V3_MLC =PP3V3_NAND =PP3V3_LCD VOLTAGE=5.1V NET_SPACING_TYPE=PWR MAKE_BASE=TRUE MAX_NECK_LENGTH=3 MM MIN_NECK_WIDTH=0.2 mm MIN_LINE_WIDTH=0.4 MM PP5V1_OUT =PP5V1_LED MIN_LINE_WIDTH=0.6 MM MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2 MM VOLTAGE=20.4V PPLED_OUT =PPLED_REG =PP1V8_MIPI =PP1V8_SMIA =PP1V8_NOR_FLASH =PP1V8_H3 =PP1V8_AUDIO =PP1V8_CHGR =PP1V8_SMS =PP1V8_CAM MIN_LINE_WIDTH=0.3 MM VOLTAGE=1.8V MIN_NECK_WIDTH=0.2 mm MAKE_BASE=TRUE NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM PP1V8_GRAPE =PP1V8_GRAPE MIN_NECK_WIDTH=0.2 mm MIN_LINE_WIDTH=0.6 mm MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MAKE_BASE=TRUE PP1V8 VOLTAGE=1.8V =PP1V2_HSICPP1V2_H3 VOLTAGE=1.2V MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2 mm MIN_LINE_WIDTH=0.6 MM =PP1V2_VDDIOD_H3 PP1V2_SDRAM VOLTAGE=1.2V MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.6 MM =PP1V2_SDRAM_MDDR VOLTAGE=1.8V MIN_NECK_WIDTH=0.1 MM MIN_LINE_WIDTH=0.2 MM PP1V8_ALWAYS MAKE_BASE=TRUE NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM =PP1V8_ALWAYS =PP1V1_USB =PP1V1_HSIC =PP1V1_MIPI =PP1V1_MIPI_PLL =PP1V1_DPORT =PP1V1_SMIA =PP1V1_PLL MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm MAKE_BASE=TRUE NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM PP1V7_VA_VCP VOLTAGE=1.7V =PP1V7_VA_VCP =PP3V0_HP_DET_BIAS MIN_LINE_WIDTH=0.5 MM VOLTAGE=1.2V MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MAKE_BASE=TRUE PP1V2_AUDIENCE MIN_NECK_WIDTH=0.2 mm =PP1V2_AUDIO MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2 mm PP3V0_LCD VOLTAGE=3.0V MIN_LINE_WIDTH=0.3 MM =PP3V0_LCD =PP3V0_IO_USB =PP3V0_IO_CHGR =PP3V0_IO_3V3 =PP3V0_IO_H3 =PP3V0_IO_SMS PP3V3_PORT_ACC VOLTAGE=3.3V MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MAKE_BASE=TRUE MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm =PP3V3_PORT_ACC MIN_LINE_WIDTH=0.2MM VOLTAGE=3.3V MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MAKE_BASE=TRUE PP3V3_LAND_ACC MIN_NECK_WIDTH=0.1MM =PP3V3_LAND_ACC =PP3V0_OPTICAL =PP3V0_VIDEO_H3 =PP3V0_DPMUX =PP3V0_VIDEO_BUFFER MIN_LINE_WIDTH=0.5 MM MIN_NECK_WIDTH=0.2 mm MAKE_BASE=TRUE NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM PP1V1_H3_PHY VOLTAGE=1.1V MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2 mm PP3V0_VIDEO VOLTAGE=3.0V MIN_LINE_WIDTH=0.6 mm NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM MAKE_BASE=TRUE NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.6 MM VOLTAGE=3.0V PP3V0_IO MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_NECK_WIDTH=0.25 MM MAKE_BASE=TRUE MIN_LINE_WIDTH=0.6 MM VOLTAGE=4.2V BATT_POS_F =BATT_POS_F_3G =PP1V8_SDRAM_MISC =PP1V8_SDRAM_WL =VCC_MAIN_3V3 =PP1V8_SDRAM_H3 MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2 mm MIN_LINE_WIDTH=0.6 mm PP3V0_GRAPE VOLTAGE=3.0V VOLTAGE=3.1V PP3V1_AUDIO MIN_NECK_WIDTH=0.2 mm MAKE_BASE=TRUE NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM MIN_LINE_WIDTH=0.6 mm =PP3V1_AUDIO VOLTAGE=1.2V MIN_LINE_WIDTH=0.6 MM MAKE_BASE=TRUE MIN_NECK_WIDTH=0.25 MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM PPVCORE_H3 =PPVCORE_H3 =VCC_MAIN_LED =VCC_MAIN_AUDIO =VCC_MAIN_WL =PP3V0_GRAPE =PP3V0_GRAPE_Z2 =PP3V0_GRAPE_Z1 =PP3V0_GRAPE_MARIO2 =PP3V0_GRAPE_MARIO1 =PP3V0_GRAPE_MARIO3 =VCC_MAIN_DOCK =VCC_MAIN_ASH VOLTAGE=4.7V PPVCC_MAIN MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MAKE_BASE=TRUE BATT_POS BATT_POS_F MIN_LINE_WIDTH=0.4MM PP3V0_HP_DET_BIAS MAX_NECK_LENGTH=3 MM MIN_NECK_WIDTH=0.2MM MAKE_BASE=TRUE VOLTAGE=3.0V NET_SPACING_TYPE=PWR MAKE_BASE=TRUE PP3V0_OPTICAL VOLTAGE=3.0V MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 mm NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM MIN_NECK_WIDTH=0.20MM NET_SPACING_TYPE=GND MAX_NECK_LENGTH=5 MM GND MAKE_BASE=TRUE VOLTAGE=0V MIN_LINE_WIDTH=0.6 MM R1940 1 2 17 OF 119 B.0.0 051-8245 15 OF 53 20 28 6 18 41 18 20 9 13 14 25 7 8 43 25 18 21 21 25 9 9 7 6 7 9 12 37 28 17 26 42 18 23 1819 618 7 18 7 8 18 6 19 6 6 9 9 9 9 6 18 28 11 27 33 34 36 39 18 18 21 6 17 20 7 11 13 37 26 42 18 39 18 38 35 10 37 10 18 18 18 1517 41 11 36 39 20 6 8 18 18 28 30 18 7 21 22 29 39 23 24 24 24 23 38 39 18 17 17 15 17 18 18
  • 18. N-CH P-CH D G S N-CH P-CH D G S SENSE GATE CTL STAT VIN GND SENSE GATE CTL STAT VIN GND II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 NOTE: PROTECTED UP TO 26.5V NOTE: PROTECTED UP TO 26.5V MOSFET CHANNEL VGS MAX RDS(ON) IMAX 8 A P-TYPE +/- 16V SI4563DY 25 MOHM @-4.5V SO-8 DUAL P/N FETS VGS MAX +/- 16V CHANNEL RDS(ON) MOSFET IMAX N-TYPE 8 A 15 MOHM @4.5V SI4563DY SO-8 DUAL P/N FETS DCIN POWER PATH PORTRAIT (PULLUP ON PAGE 19) (PULLUP ON PAGE 19) LANDSCAPE 5.6V ZENER SHORT-0201 NOSTUFF CRITICAL SI4563DY LANDSCAPE_DOCK SOI 201 100K 1/20W 1% MF LANDSCAPE_DOCK LANDSCAPE_DOCK 1/20W 1% 201 MF 10K CRITICAL SSM3K15FV LANDSCAPE_DOCK SOD-VESM-HF SI4563DY PORTRAIT_DOCK SOI CRITICAL 201 100K 1% 1/20W MF PORTRAIT_DOCK CRITICAL SSM3K15FV PORTRAIT_DOCK SOD-VESM-HF PORTRAIT_DOCK 1/20W 10K 201 MF 1% SHORT-0201 NOSTUFF 402 MF-LF 1/16W 1% 10K CRITICAL SOT23-6 LTC4412ES6 CRITICAL LTC4412ES6SOT23-6 NOSTUFF 201 470K MF 1% 1/20W NOSTUFF SHORT-0201 603 51.1 1/10W MF-LF 1% CRITICAL SOT23 MMBZ5232B-350MW CRITICAL 1SS418 SOD-723-HF CRITICAL SOD-723-HF 1SS418 10% 0.01UF X5R 10V 201 10V X5R 0.01UF 10% 201 SYNC_DATE=12/04/2009SYNC_MASTER=MARK DCIN POWER PATH TRUE USB_PWRB_VIN MIN_LINE_WIDTH=0.60MM MIN_NECK_WIDTH=0.25MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM VOLTAGE=6V PORT_DK_VBUS LAND_DK_VBUS MIN_LINE_WIDTH=0.60MM MIN_NECK_WIDTH=0.25MM MAX_NECK_LENGTH=3 MM VOLTAGE=6V USB_PWRA_VIN NET_SPACING_TYPE=PWR VOLTAGE=6V MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_NECK_WIDTH=0.25MM MIN_LINE_WIDTH=0.60MM DOCK_VBUS_R MIN_LINE_WIDTH=0.60MM MIN_NECK_WIDTH=0.25MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM VOLTAGE=6V DOCK_VBUS VBUS_P USB_PWR_B NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM VOLTAGE=6V PORT_DK_STAT LAND_DK_STAT LAND_DK_ADPTR PORT_DK_ADPTR MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=ANLG PORT_DK_OVGATE MIN_LINE_WIDTH=0.20MM MIN_NECK_WIDTH=0.1MMUSB_PWRB_GATE MIN_LINE_WIDTH=0.20MM NET_SPACING_TYPE=ANLG MIN_NECK_WIDTH=0.1MM VOLTAGE=6V MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=ANLG MIN_LINE_WIDTH=0.20MM PORT_DK_OVSENS MIN_NECK_WIDTH=0.1MMUSB_PWRA_GATE MIN_LINE_WIDTH=0.20MM NET_SPACING_TYPE=ANLG MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=ANLG MAX_NECK_LENGTH=3 MM VOLTAGE=6V MIN_LINE_WIDTH=0.20MM LAND_DK_OVSENS NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM USB_PWR_A VOLTAGE=6V MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=ANLG MIN_LINE_WIDTH=0.20MM LAND_DK_OVGATE XW1820 1 2 Q1820 7 8 5 6 2 4 1 3 R18201 2 R18211 2 Q1821 3 1 2 Q1810 7 8 5 6 2 4 1 3 R18101 2 Q1811 3 1 2 R18111 2 XW1810 1 2 R18001 2 U1820 3 5 2 6 4 1 U1810 3 5 2 6 4 1 R18221 2 XW1800 1 2 R1823 1 2 DZ1800 13 D1820 1 2 D1810 1 2 C1820 1 2 C1810 1 2 18 OF 119 B.0.0 051-8245 16 OF 53 18 17 17 19 18 6 39 17 17 12 12 17 17 17 12 17
  • 19. A VC IRQ* OVGATE OVSENS DVCC SCL SDA NTCBIAS GND NTC CLPROG PROG VBUS THRML WALL SW ACPR* IDGATE VOUT BAT BATSENS PAD OUT OUT IN IN G S D OUT IN IN OUT VC IRQ* OVGATE OVSENS DVCC SCL SDA NTCBIAS GND NTC CLPROG PROG VBUS THRML WALL SW ACPR* IDGATE VOUT BAT BATSENS PAD G S D D G S D G S D G S IN D G S IN D G S D G S IN IN BI PP PP DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 CHANGE TO A SMALLER FUSE FOR H3 APN:998-2616 SYSTEM CURRENT 3.0A MAX (ONLY NEEDED WHEN BATTERY ISN’T PRESENT) (CAN REMOVE FOR PRODUCTION) (REPLACE SENSE SHORTS WITH 0 OHM RESISTORS TO REMOVE AMANDA???) (644 OHM FOR 0.16A FOR DEEP DISCHG) (825 OHM FOR 1.5A) (644 OHM FOR 0.16A FOR DEEP DISCHG) (825 OHM FOR 1.5A) (3.09K OHM FOR 1.26A) (3.09K OHM FOR 1.26A) (MAKE SURE WE HAVE A LARGE COPPER NC NC NC NC (CHANGE I2C BUS) BATT_POS (PULLUPS ON PAGE 10) (PULLUPS ON PAGE 10) ID=7.8A RDSON=0.015@VGS=-2.5V (MAKE SURE THERE IS A PULLUP) (PULLUPS ON PAGE 10) (PULLUPS ON PAGE 10) ID=7.8A RDSON=0.015@VGS=-2.5V (NEEDED TO DISCHARGE BEYOND 2A) (NEEDED TO DISCHARGE BEYOND 2A) DCR=60.1 MOHM DCR=60.1 MOHM (1.78K OHM FOR 2.1A) (1.78K OHM FOR 2.1A) (MAKE SURE THERE IS A PULLUP) NOTE: VERIFY PINOUT OF BATTERY CONNECTOR (FIGURE OUT NTC BIAS VALUE) MAIN SUPPLY/BATTERY CHARGER POUR TO DISSIPATE HEAT) PPVCC_MAIN_FUSE NP0-C0G 25V 201 33PF 5% 10% 16V X7R 201 1000PF TP-1P0-TOP FUNC_TEST=TRUE NOSTUFF 5AMP-32V 0603 OMIT 1000PF X7R 16V 10% 201 X5R 10% 0.1UF 6.3V 201 4021/16W MF-LF1% 6.04K 5% 1/20W 201 MF 0 IHLP2525AH-SM 3.3UH-3.25A CRITICAL 0.01UF 10V X5R 10% 201 6.3V 20% 22UF X5R-CERM 603 10% 10UF X5R 25V 805 CRITICAL 1/20W 1% MF 3.01K 201 QFN LTC4099 CRITICAL 16 19 7192628333644 7192628333644 CRITICAL PWRPK-1212-8 SI7107DN NOSTUFF X5R 201 6.3V 10% 0.1UF 1% 0.050 1/6W MF-HF 402 NOSTUFF MF 1% 0.5 1/16W 402 0.1UF 10% X5R 25V 402 201 470K 1/20W MF 1% MF 1/20W 1% 100K 201 19201 X5R 10V 0.01UF 10% 71213263544 712132635 16 5% 1/20W 201 MF 0 805 10% 10UF X5R 25V CRITICAL QFN LTC4099 CRITICAL 402 MF-LF 1/16W 1% 6.04K PWRPK-1212-8 CRITICAL SI7107DN IHLP2525AH-SM 3.3UH-3.25A CRITICAL 201 6.3V 0.1UF 10% X5R 10% 1000PF 201 16V X7R 201 100K 1% 1/20W MF 201 470K 1/20W MF 1% 201 0 5% 1/20W MF CMLDM8002AG SOT563 SOT563 CMLDM8002AG 1% MF 1/20W 201 17.4K 1/20W MF 1% 201 17.4K SSM3K15FV SOD-VESM-HF 8 MF 1% 100K 201 1/20W 1/20W MF 1% 4.42K 201 SSM3K15FV SOD-VESM-HF 6 100K 201 1/20W MF 1% 201 2.94K 1/20W MF 1% 201 825 1/20W MF 1% SOD-VESM-HF SSM3K15FV 402 25V 0.1UF X5R 10% 1/20W MF 1% 4.42K 201 1% MF 1/20W 3.01K 201 201 1/20W MF 1% 100K SOD-VESM-HF SSM3K15FV 1/20W MF 1% 100K 201 6 8 201 1% MF 1/20W 825 201 1% MF 1/20W 2.94K 22UF 20% 6.3V X5R-CERM 603 22UF 20% 6.3V X5R-CERM 603 SM SM 201 MF 0 1/20W 5% 201 MF5% 1/20W 0 10K 1% 1/20W MF 201 NOSTUFF 201 1/20W MF 1% 10K 6.3V 20% 22UF X5R-CERM 603 201 5% 33PF 25V NP0-C0G 0201-1 240-OHM-0.2A-0.8-OHM 201 0 MF 1/20W 5% 719 10% 0.01UF X5R 10V 201 201 10V X5R 0.01UF 10% 201 10% 16V X7R 1000PF 1000PF X7R 16V 10% 201 NOSTUFF CRITICAL FC-SM BATT-K48 B15G CRITICAL 20% 6.3V 150UF TANT-1 NOSTUFF B15G CRITICAL 20% 6.3V 150UF TANT-1 NOSTUFF B15G CRITICAL 20% 6.3V 150UF TANT-1 201 NP0-C0G 25V 27PF 5% SM P4MM NOSTUFF NOSTUFF P4MM SM GDZ-0201 GDZT2R6.8 CRITICAL 25V CERM 0201 82PF 5% 1% MF 1/20W 20K 201 CRITICAL DFN1411-3 ZXTN26020DMF CRITICAL ZXTN26020DMF DFN1411-3 1% MF 1/20W 20K 201 GDZ-0201 GDZT2R6.8 CRITICAL RES,FF,0 OHM,1/10W,0603,5%SMD,LF,0.020110S0550 F1900 CRITICAL1 CHARGER SYNC_DATE=12/04/2009SYNC_MASTER=MARK VOLTAGE=4.7V MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR PPVCC_MAIN_FUSE MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.25 MM BATT_SWI_CONN_R NET_SPACING_TYPE=ANLG BATT_NTC_CONN_R DIDT=TRUE NET_SPACING_TYPE=SWITCHNODE MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.25 MM LAND_DK_SW PORT_DK_SW MIN_NECK_WIDTH=0.25 MM MIN_LINE_WIDTH=0.6 MM NET_SPACING_TYPE=SWITCHNODE DIDT=TRUE PORT_DK_WALL LAND_DK_WALL BATT_POS_F BATTERY_SWI LD_OVSENS_R NET_SPACING_TYPE=ANLG VOLTAGE=6V LAND_DK_OVSENS PORT_DK_STAT PORT_DK_WALL LAND_DK_STAT LAND_DK_WALL NET_SPACING_TYPE=ANLG BATT_NTC_CONN PORT_DK_CLPROGPORT_DK_CLPROG_R PORT_DK_CLPROG_F LAND_DK_CLPROGLAND_DK_CLPROG_R LAND_DK_CLPROG_F PD_OVSENS_R NET_SPACING_TYPE=ANLG VOLTAGE=6V PORT_DK_OVSENS MIN_LINE_WIDTH=0.2 MM PORT_DK_IDGATE NET_SPACING_TYPE=ANLG MIN_NECK_WIDTH=0.1 MM I2C0_SCL_1V8 I2C0_SDA_1V8 =PP1V8_CHGR MIN_LINE_WIDTH=0.2 MM LAND_DK_IDGATE NET_SPACING_TYPE=ANLG MIN_NECK_WIDTH=0.1 MM LAND_DK_OVGATE I2C2_SCL_3V0 I2C2_SDA_3V0 =PP3V0_IO_CHGR LAND_PMU_IRQ_L LAND_DK_IRQ_L PORT_PMU_IRQ_L PORT_DK_IRQ_L PORT_DK_HI_I PORT_DK_DDIS_CHG LAND_DK_DDIS_CHG LAND_DK_PROG LAND_DK_HI_I LAND_DK_PROG_R PORT_DK_PROG_R PORT_DK_PROG BATTSNS NET_SPACING_TYPE=ANLG BATTSNS_S NET_SPACING_TYPE=ANLG NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM MIN_NECK_WIDTH=0.25 MM MIN_LINE_WIDTH=0.6 MM BATT_VCC_CURSNS BATT_POS_RC BATT_NTC_CONN BATT_NTC_CONN CHGR_NTCBIAS CHGR_NTCBIAS MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_NECK_WIDTH=0.25 MM MIN_LINE_WIDTH=0.6 MM BATT_POS VOLTAGE=4.2V PPVCC_MAIN NET_SPACING_TYPE=ANLG ECHGR_BATTSNS PORT_DK_OVGATE LAND_OVP_B PORT_OVP_B PORT_DK_VBUS VOLTAGE=6.1V NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM MIN_NECK_WIDTH=0.25MM MIN_LINE_WIDTH=0.60MM LAND_DK_VBUS MAX_NECK_LENGTH=3 MM MIN_NECK_WIDTH=0.25MM MIN_LINE_WIDTH=0.60MM NET_SPACING_TYPE=PWR VOLTAGE=6.1V BATT_POS_F VOLTAGE=4.2V MAX_NECK_LENGTH=3 MM MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.25 MM NET_SPACING_TYPE=PWR C1922 1 2 C1924 1 2 TP19001 F1900 1 2 C19051 2 C19041 2 R1900 1 2 R1901 1 2 L1900 1 2 C1901 1 2 C19081 2 C1900 1 2 R19031 2 U1900 18 11 6 19 15 9 10 8 2 3 1 20 7 16 17 14 21 13 4 12 5 Q1901 5 4 1 2 3 C19381 2R1921 1 2 R19071 2 C19021 2 R19061 2 R1905 1 2 C1951 1 2 R1951 1 2 C1950 1 2 U1950 18 11 6 19 15 9 10 8 2 3 1 20 7 16 17 14 21 13 4 12 5R1950 1 2 Q1951 5 4 1 2 3 L1950 1 2 C19541 2 C19551 2 R1955 1 2 R19561 2 R1920 1 2 Q1900 6 1 2 Q1900 3 4 5 R19101 2 R19601 2 Q1902 3 1 2 R19121 2 R19111 2 Q1903 3 1 2 R19141 2 R19631 2 R19541 2 Q1953 3 1 2 C19521 2 R19611 2 R19531 2 R19641 2 Q1952 3 1 2 R19621 2 R19041 2 R19131 2 C19531 2 C19031 2 XW1900 1 2 XW1920 1 2 R1965 1 2 R1915 1 2 R1930 1 2 R19021 2 C19091 2 C1923 1 2 FL1900 1 2 R1941 1 2 C1906 1 2 C1956 1 2 C1907 1 2 C1957 1 2 J1900 1 2 3 4 C1910 1 2 C1911 1 2 C1912 1 2 C1913 1 2 PP1900 1 PP1950 1 DZ1900 12 C1925 1 2 R19161 2 Q19041 3 2 Q19541 3 2 R19661 2 DZ1950 12 19 OF 119 B.0.0 051-8245 17 OF 53 17 17 15 17 16 16 17 16 17 17 16 15 15 18 18 18 17 17 17 17 15 15 16 16 15 17
  • 20. VDD_LDO_10 ADIO ON_BUF VLDO9_DSW VLDO9 WLED2 WLED1 WIFIDIG VSS VLDO_12 VLDO_11 VLDO_10 VLDO_8 VLDO_7 VLDO_6 VLDO_5 VLDO_4 VLDO_3 VLDO_2 VLDO_1 VLCM2 VLCM1 VIB_PWM_EN VIB VDD_VIB VDD_OUT VDD_OUT_S VDD_LDO_12 VDD_LDO_11 VDD_LDO_3_5_8 VDD_LDO_2 VDD_LDO_1_6 VDD_LDO4_7 VDD_LCM_SW VDD_LCM VDD_BUCK_1_2 VBUS_PROT_S VBUS_PROT VBUCK2_FB VBUCK2 VBUCK1_FB VBOOST_LCM LX_LCM LX_CHG LX2 LX1 LCM_ISENSE LCM2_EN CPU_1V8 BOOST_SENSEP IBAT_S IBAT VBUS_OV VBUS VBAT BST_PROT LX_LED VCENTER VCC_MAINUSB/BAT 1V8 VCORE LDOLED_BOOSTLCM/GRAPEVIB (2 OF 2) G D S G S D CE VOUT VDD GND II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL (100MA; 0.6-1.3V; SUPPLIED FROM BUCK2; CAN BE USED IN HIB) NOTE: DELAY 0.1MS LAYOUT NOTE: PLACE NEAR U0652 (1.5A MAX; 0.2A IN HIB) REFERENCED TO VDD_OUT TO PREVENT VOLTAGE DROP, SUCH AS GPIO NOTE: FOR ECHGR, SHORT VBAT AND VDDOUT FOR I/O DIRECTLY (PLACE ONE 1UF CAP AT EACH VDD INPUT) (1.26A MAX) (150MA; 1.7-3.0V; LOW NOISE; CAN BE SUPPLIED FROM BUCK2) (200MA; 2.5-3.55V; CAN BE 300MA BYPASS; CAN BE USED IN HIB) (10MA; 2.0-3.55V; CAN BE USED IN HIB) (250MA; 2.5-3.6V; CAN BE USED IN HIB; CAN BE 300MA BYPASS) (300MA; 1.2-1.5V; ONLY SUPPLIED FROM BUCK2; CAN BE USED IN HIB) (150MA; 2.5-3.6V; CAN BE 1 OHM BYPASS WITH 300MA LIMIT) (150MA; 2.5-3.55V; CAN BE 300MA BYPASS) (100MA; 1.65-1.8V; LOW NOISE; SUPPLIED FROM BUCK2) (50MA; 2.5-3.3V; LOW NOISE) (100MA; 1.8-3.3V; CAN BE CONTROLLED BY BUTTON 2) (2.0A MAX) (2MA; USED FOR 100K PULLUPS) (RON=2.5 OHM) TO 4.7UF) (CHANGED (CHECK THESE INDUCTORS????) (CHECK THESE INDUCTORS????) N88 DCR=406MOHM DCR=105MOHM DCR=76.6MOHM N88 DCR=98MOHM CHECK CURRENT USED AND V DROP????) (CHANGED TO 4.7UF) (CAN I LEAVE BL BOOST UNCONNECTED????) (RON=0.5 OHM) (RON=0.5 OHM) (CAN I LEAVE VIBE UNCONNECTED????) I2C ADDRESS: 1110100X (E8H) (REVERSE VOLTAGE PROTECTION) (DERIVED FROM CHARGER INPUTS) (CHECK WHICH NEED TO BE TIED TO 1.8V???) (CAN I LEAVE VDD_VIB UNCONNECTED TO REDUCE STATIC POWER DRAIN?) (100MA; 1.5-4.6V) ANY ISSUES??) (BATT IS FLOATING NOTE: SUPPLY ASHLEY INTERNAL POWER (PULLDOWN INT) (PULLDOWN INT) TO 4.7UF) (CHANGED TO 2.2UF)(CHANGED TO 2.2UF) (CHANGED TO 2.2UF) (CHANGED TO 2.2UF) (CHANGED TO 2.2UF) (CHANGED(CHANGED TO 2.2UF) TO 2.2UF) (CHANGED (400MA) 10% 0.1UF X5R 6.3V 201 CERM 6.3V 1UF 10% 402 402 CERM 6.3V 1UF 10% 2.2UF X5R 402 6.3V 10% X5R 2.2UF 402 10% 6.3V 2.2UF X5R 10% 6.3V 402 2.2UF X5R 10% 6.3V 402 10% 1UF 6.3V CERM 402 2.2UF X5R 6.3V 10% 402402 20% 4.7UF X5R-CERM 6.3V 220UF-16-MOHM CASE-B18-SM POLY-TANT 20% CRITICAL 2.5V 603 20% 10UF X5R 6.3V 603 20% 10UF X5R 6.3V X5R 603 20% 6.3V 10UF CRITICAL MDT2520CN-SM 2.2UH 603 20% 6.3V X5R 10UF 402 0 5% 1/16W MF-LF NOSTUFF 25V NP0-C0G 18PF 5% 201 CERM 25V 82PF 5% 0201 UFBGA ASHLEY CRITICAL OMIT CMLDM8002AG SOT563 100K MF 1/20W 1% 201 1UF CERM 6.3V 10% 402 402 5% 0 1/16W MF-LF 5% 0 1/20W MF 201 NOSTUFF SHORT-0201 402 0 5% 1/16W MF-LF SHORT-0201 NOSTUFF 20% 4.7UF X5R-CERM 6.3V 402 20% 6.3V X5R-CERM 402 4.7UF 201 6.3V 20% 0.22UF X5R 402 10% 1UF 6.3V CERM 6.3V CERM 10% 1UF 402 10% 1UF X5R 16V 402 10% 1UF 6.3V 402 CERM CRITICAL SOT723 NTK3134NTXXH SOD882 PMEG2005AEL CRITICAL 50V 201 22PF 5% CERM 402 1UF 10% 16V X5R 10V 10UF 20% X5R 805 1% 0.1 201 1/20W MF 402 1UF 6.3V CERM 10% SHORT-0201 NOSTUFF CRITICAL 2.2UH-1.8A-155MOHM VLS252012-SM CERM 402 10% 1UF 6.3V 6.3V CERM 10% 1UF 402 PLACEMENT_NOTE=PLACE NEAR U0652 PLACEMENT_NOTE=PLACE NEAR U0652 6.3V X5R-CERM 4.7UF 20% 402 2.2UF X5R 6.3V 10% 402 201 0.01UF 10V 10% X5R 10K 201 MF 1/20W 1% 25V CERM 100PF 5% NOSTUFF 201 X5R 6.3V 0.1UF 10% 201 MF 1/20W 201 5% 0 5% 0 1/20W MF 201 B15G TANT-1 150UF 6.3V 20% CRITICAL RP106Z121D WLCSP4 CRITICAL PLACEMENT_NOTE=PLACE NEAR U0652 6.3V X5R 603 10UF 20% 10% 1UF CERM 6.3V 402 6.3V 1UF 10% CERM 402 10% 1UF 402 CERM 6.3V 2.2UF X5R 402 10% 6.3V CRITICAL IHLP2525AH-SM 4.7UH-8.0A X5R 603 20% 10UF 6.3V 10UF 6.3V 603 X5R 20% 1UF CERM 402 6.3V 10% CRITICAL1 U2000338S0805 IC,PMU,ASHLEY,D1815A2,OTPXX,UFBGA121,K48 SYNC_MASTER=MARK SYNC_DATE=12/04/2009 PMU P1V8_1V2_SS PP1V2_SDRAM =PP1V8_SDRAM_1V2 DOCK_VBUS USB_PWRB_VIN_R MIN_NECK_WIDTH=0.25 MM VOLTAGE=5V NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.3 MM NET_SPACING_TYPE=PWR VBUS_OVSENS USB_PWRB_VIN_GATE USB_PWRB_VIN PP3V3_PORT_ACC PP3V0_IO TP_VIB_PWM_EN TP_LCM2_EN PPVDD_VIB MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM VOLTAGE=1.3V PP1V8_ALWAYS DOCK_VBUS_S TP_SW_BOOST TP_BOOST_PROT BATTSNS TP_VBUS_OVGATE NET_SPACING_TYPE=SWITCHNODE MIN_NECK_WIDTH=0.25 MM MIN_LINE_WIDTH=0.6 MM DIDT=TRUESW_BUCK1 MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.25 MM NET_SPACING_TYPE=SWITCHNODE DIDT=TRUESW_BUCK2 P1V8_FB NET_SPACING_TYPE=ANLG TP_PPVIBE_OUT MIN_NECK_WIDTH=0.25 MM MIN_LINE_WIDTH=0.6 MM DIDT=TRUE NET_SPACING_TYPE=SWITCHNODE LCM_BOOST_SW MIN_NECK_WIDTH=0.25 MM MIN_LINE_WIDTH=0.6 MM NET_SPACING_TYPE=PWR LCM_BOOST_SRC LCM_BOOST_LX DIDT=TRUE NET_SPACING_TYPE=SWITCHNODE MIN_NECK_WIDTH=0.25 MM MIN_LINE_WIDTH=0.6 MM PP1V8_SDRAM VOLTAGE=4.7V MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_NECK_WIDTH=0.25 MM MIN_LINE_WIDTH=0.6 MM TP_PMU_CHG_OUT PP1V8 PP1V8_GRAPE PP3V0_OPTICAL PP3V0_VIDEO PP3V3_LAND_ACC PP1V7_VA_VCP PP3V1_AUDIO PP5V1_OUT PP3V0_LCD PP1V2_H3 PP3V0_HP_DET_BIAS PP3V0_GRAPE PP1V1_H3_PHY PP1V2_AUDIENCE TP_VSW_CHG MIN_NECK_WIDTH=0.25 MM MIN_LINE_WIDTH=0.6 MM NET_SPACING_TYPE=SWITCHNODE DIDT=TRUE VCENTER MIN_NECK_WIDTH=0.25 MM MIN_LINE_WIDTH=0.6 MM NET_SPACING_TYPE=PWR VOLTAGE=5V MAX_NECK_LENGTH=3 MM LCM_BOOST_ISENSE NET_SPACING_TYPE=ANLG NET_SPACING_TYPE=ANLG MIN_NECK_WIDTH=0.1 MM MIN_LINE_WIDTH=0.2 MM LCM_BOOST_GATE BATT_VCC_CURSNS PP1V8_SDRAM TP_BOOST_SENSEP NC_WLED1 NC_WLED2 NC_VLCM1 NC_VLCM2 BATT_VCC_CURSNS BATTSNS_S NC_ADIO NET_SPACING_TYPE=ANLG PPVCORE_FB PPVCORE_H3 =VCC_MAIN_ASH =VCC_MAIN_ASH C2027 1 2 C2025 1 2 C20021 2 C20031 2 C20411 2 C20011 2 C20401 2 C20041 2 C20051 2 C20061 2 C20381 2 C20351 2 C20071 2 C20081 2 C20091 2 L2001 1 2 C2043 12 C2015 1 2 C2016 1 2 C2019 1 2 C2020 1 2 C2022 1 2 C2023 1 2 C2024 1 2 C2026 1 2 C2021 1 2 C20391 2 C20361 2 C20371 2 L2002 1 2 R2019 1 2 C20111 2 C20101 2 U2000 K7 E3 G3 B1 L9 L10 H7 B6 J4 A6 A4 L7 K4 E1 J1 J9 K2 D9 A1 B5 K6 J3 L5 J5 L6 A5 A7 K5 L4 H10 K11 G10 B8 A10 F11 D11 K8 L8 J2 K3 L3 C5 L1 L2 A2 A3 B9 L11 G11 A8 E11 E10 H11 C11 A11 J11 B11 C6 D5 F5 F6 F7 F8 G4 G5 G6 G7 G8 H5 D6 H6 J6 D7 D8 E5 E6 E7 E8 F4 B2 E2 F2 Q2000 3 4 5 R20311 2 C2000 1 2 R20421 2 R2003 1 2 XW20001 2 R2021 1 2 XW20011 2 C2017 1 2 C2018 1 2 C2030 1 2 C2029 1 2 C2028 1 2 C20441 2 Q2005 3 1 2 D2000 1 2 C20471 2 C20461 2 C20451 2 R20441 2 XW2002 1 2 L2003 1 2 C2050 1 2 C2051 1 2 C2054 1 2 R20431 2 C2055 12 R20001 2 R2020 1 2 C2056 1 2 U2001B1 B2 A1 A2 20 OF 119 B.0.0 051-8245 18 OF 53 15 15 16 2716 15 15 15 17 1518 15 19 15 15 15 15 15 15 15 15 15 15 15 15 15 1718 15 18 1718 17 7 15 1518 15 18
  • 21. IN OUT OUT IN IN OUT IN OUT IN IN IN IN IN IN OUT OUT IN IN IN IN IN IN IN IN G D S BI INPUTI2CRESETWDOG GPIO TEMPERATURE REFERENCES INPUT DIGITALANALOG (1 OF 2) T3 ACC_DET ACC_ID ADC_IN7 BRICK_ID FW_DET GPIO1 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 IREF IRQ* KEEPACT RESET* RESET_IN SCL SDA SHDN SWI T1 T2 T4 TBAT TCAL VDD_REF XTAL1 GPIO10 GPIO9 GPIO2 GPIO3 ADC_REF VDD_RTC VREF XTAL2 BUTTON3 BUTTON2 BUTTON1 II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 DO WE NEED NTC??? (DISABLE CHARGER) (2.5V ALWAYS ON PULLUP IN BMU) (H3 PULLUP INT) (H3 PULLUP EXT) (DESENSE AND VCC_MAIN PULLUP EXT) (DESENSE AND VCC_MAIN PULLUP EXT) (DESENSE AND VCC_MAIN PULLUP EXT) (ASRTD IN STDBY OR HIB; 3.0V IO PULLUP EXT) (50UA CURRENT SOURCE) (INPUT TO ADC / 0.5) (R FOR TEMP CALIBRATION) (1.8V_SDRAM PULLUP EXT) (I-LIM R ON CONN PAGE; BATT_POS PULLUP EXT) (VCC_MAIN PULLUP EXT) (VCC_MAIN PULLUP INT) (VCC_MAIN PULLUP INT) (3.0V_HP_DET PULLUP EXT) (3.0V_HP_DET PULLUP EXT) (ALWAYS ON RAIL) (I2C REGS, AND REF) (SUPPLY FOR ADC, OTC) (FOR ACC IDENTIFY) (TEMPERATURE SUPERVISION)(1.2V) (TEMPERATURE SUPERVISION) NOTE: WILL WAKE FROM STANDBY ON INSERTION/EXTRACTION) (PULLDOWN INT) (DIFFER FROM N90) (PULLDOWN INT) (REVERSE VOLTAGE PROTECTION) 25V 5% NPO 15PF 201 639 24 44 39 6 36 38 41 17 11 17 640 33 9 7172628333644 7172628333644 CRITICAL 32.768K-20PPM-12.5PF 2012 639 6 0.1UF 10% 6.3V 201 X5R 10V CERM 402 10% 0.22UF 16V 10% X7R 1000PF 201 10% 0.1UF 6.3V X5R 201 201 15PF NPO 25V 5% MF 1/20W 1% 201 200K 6 22 6 MF 0.1% 3.92K 402 1/16W 201 MF 4.02K 1/20W 1% 0201 10KOHM-1%0201 10KOHM-1%0201 10KOHM-1%0201 10KOHM-1% 38 640 39 X5R10% 10V 201 0.01UF 627 39 1% 1/20W MF 100K 201 CMLDM8002AG SOT563 0 5% 1/20W MF 201 MF 1/20W 100K 1% 201 NOSTUFF 100K MF 1/20W 1% NOSTUFF 201 7 17 1% 1/20W MF 210 201 GDZ-0201 GDZT2R5.1B CRITICAL CRITICAL UFBGA ASHLEY 201 CERM 100PF 25V 5%CERM 100PF 25V 5% 201 5% 25V 100PF CERM 201 5% 25V 100PF CERM 201 5% 25V 100PF CERM 201 PMU SYNC_MASTER=MARK SYNC_DATE=12/04/2009 BOARD_TEMP1 BOARD_TEMP3 BOARD_TEMP2 VOLTAGE=5V NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM USB_PWRA_VIN_R MIN_LINE_WIDTH=0.2 MM MIN_NECK_WIDTH=0.1 MMMIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.3 MM VOLTAGE=5V NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM USB_PWRA_VIN_FET USB_PWRA_VIN_GATE USB_PWRA_VIN PMU_RESET_IN PP1V8 SWI_BLCTRL PMU_EXTAL NET_SPACING_TYPE=CRYSTALNET_SPACING_TYPE=CRYSTAL PMU_XTAL USB_BRICKID PMU_IREFNET_SPACING_TYPE=PWR NET_SPACING_TYPE=PWR PMU_VDD_REF PMU_ADC_REF NET_SPACING_TYPE=ANLG NET_SPACING_TYPE=PWR PMU_VREF CLK_32K_X17 CLK_32K_PMU IO_XPNDR_INT_L LAND_DOCK_ACC_DET_L BB_PMU_ON_R_L DOCK_UART_CTRL LAND_PMU_IRQ_L PORT_PMU_IRQ_L AUD_MIK_HS1_INT_L HOME_L ONOFF_L RINGER_A PORT_DOCK_ACC_DET_L PORT_DOCK_ACCID ADC_IN7 PMU_SHDWN RESET_L PMU_IRQ_L I2C0_SDA_1V8 I2C0_SCL_1V8 NET_SPACING_TYPE=PWR PMU_VDD_RTC KEEPACT =PP1V8_ALWAYS BATTERY_SWI BOARD_TEMP4 PMU_NTC NET_SPACING_TYPE=PWR PMU_TCAL C21061 2 Y2100 1 2 C2105 1 2 U2000 K9 F3 F10 G2 C8 H8 J8 K10 J10 C2 D1 C1 D3 D4 H4 K1 H3 E4 D2 F9 C4 H9 C7 B7 B3 C3 C10 J7 B10 D10 B4 A9 E9 C9 H2 F1 G9 G1 H1 C21021 2 C21031 2C21011 2 C21041 2 R21001 2 R21091 2 R21081 2 R2104 1 2 R2103 1 2 R2102 1 2 R2101 1 2 C2107 12 R21111 2 Q2000 6 1 2 R2110 1 2 R2112 1 2 R21071 2 R2113 1 2 DZ2100 12 C2108 1 2 C2109 1 2 C2110 1 2 C2111 1 2 C2112 1 2 21 OF 119 B.0.0 051-8245 19 OF 53 16 1518 3839 615
  • 22. D G S IN BURST VC FB VIN SHDN*/SS RLIM RT THRM SGND PGND VOUT SW1 SW2 PAD D SG D SG D S G II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 3.3V SUPPLY T(SS)=~1MS F=1KHZ K48 AVG=0.12A PEAK=0.12A 3.3V MLC POWER BUDGET 100MOHM @-1.5V SIA413DJ P-TYPE SIA413DJ 3.32V NOMINAL RDS(ON) MOSFET CHANNEL 3 AIMAX +/- 8VVGS MAX 3.3V POWER BUDGET PEAK=1.5A AVG=1.25A K48 3.29V NOMINAL <R1> <R2> VOUT=1.22*(1+R1/R2) DCR=85 MOHM 10% 4.7UF X5R-CERM 6.3V 603 0.015UF 10% X5R 6.3V 0201 1% 1/20W MF 47K 201 NOSTUFF 1% MF 1/20W 201 10K SOD-VESM-HF SSM3K15FV 8 1% MF 1/20W 100K 201 DFN CRITICAL LTC3442 201 1/20W MF 1% 1M 16V CERM-X5R 0.022UF 10% 402 MF 1/20W 1% 43.2K 201 20% 6.3V 22UF X5R-CERM 603 PIMB051H-SM 4.7UH-4A CRITICAL SSM6N15FEAPE SOT563100K 1/20W MF 1% 201 SOT563 SSM6N15FEAPE 201 1% MF 1/20W 100K 200K 1% MF 1/20W 201 1% MF 340K 201 1/20W 1% MF 1/20W 10K 201 10% 220PF 25V 201 X7R-CERM 10% 470PF X5R-X7R 16V 201 201 10K 1% MF 1/20W 5% 10PF NPO 25V 201 201 249K MF 1/20W 1% 402 0.01UF X7R 10% 25V 20% TANT-1 150UF 6.3V CRITICAL B15G CRITICAL SC70-6L SIA413DJ 1% MF 1/20W 39K 201 16V X7R 1000PF 10% 201 201 16V X7R 1000PF 10% 5% 100PF 201 CERM 25V 25V CERM 201 100PF 5%5% 82PF 0201 CERM 25V 201 MF 1/20W 5% 0 NOSTUFF 3.3V SUPPLY SYNC_MASTER=MARK SYNC_DATE=12/04/2009 BB_3V3_BURST PP3V3_OUT DIDT=TRUE MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.25 MM BB_3V3_PHASE2 NET_SPACING_TYPE=SWITCHNODE BB_3V3_VC NET_SPACING_TYPE=PWR NET_SPACING_TYPE=PWR BB_3V3_FB P3V3MLC_EN BB_3V3_FB_RC BB_3V3_VOUT_RC MLC_PWR_EN P3V3MLCWR_SS PP3V3_MLC_OUT MIN_NECK_WIDTH=0.25 MM BB_3V3_PHASE1 MIN_LINE_WIDTH=0.6 MM NET_SPACING_TYPE=SWITCHNODE DIDT=TRUE BB_3V3_RT BB_3V3_VC_L =VCC_MAIN_3V3 BB_3V3_SS BB_3V3_EN =PP3V0_IO_3V3 =VCC_MAIN_3V3 C24521 2 C2451 1 2 R2452 1 2 R24511 2 Q2451 3 1 2 R24501 2 U2400 7 12 5 10 2 3 1 4 6 13 11 9 8 R24001 2 C2408 1 2 R24011 2 C2400 1 2 L2400 1 2 Q2400 3 5 4 R24061 2 Q2400 6 2 1 R24081 2 R24051 2 R24041 2 R24031 2 C24021 2 C24011 2 R24021 2 C24051 2 R24091 2 C2409 1 2 C24031 2 Q2450 1 3 47 R24531 2 C24101 2 C24531 2 C24601 2 C24611 2 C24111 2 R24101 2 24 OF 119 B.0.0 051-8245 20 OF 53 15 15 1520 15 1520
  • 23. OUT IN S D G GND VOUT VIN S S D N-CHANNEL G D G P-CHANNEL OUT OUT OUT OUT OUT OUT VREF DIM ENA VSYNC SSTCMP ISEN4 ISEN5 ISEN3 VSEN VIN THRM_PAD LRT LPF ISWSEN ISET ISEN6 ISEN2 ISEN1 GNDA DRV RT GS D D G S IN DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 TO SET BL INTENSITY INDEPENDENT OF H2: FOR 100 PERCENT BL (>=3.3V): R2627=953 FOR 75 PERCENT BL (2.5V): R2627=2.55K FOR 50 PERCENT BL (1.7V): R2627=5.90K (3.3V DRIVER) (FREQ=580KHZ) PLACE U2600 NEAR U1400 LAYOUT NOTE: (R2630 AND R2631 PIN 1 SHOULD BE PLACED NEAR C2604 PIN 2) (OVP @ 2.48V) (IS THIS NEEDED??) (FREE-RUNNING FREQ) (SET TO 20.07MA) (FREQ=8.4KHZ) RDSON=0.015@VGS=-2.5V ID=7.8A LED BOOST/BACKLIGHT CONTROLLER DCR=155.0 MOHM 15 PLACEMENT_NOTE=PLACE NEAR Q2602 PMEG4010BEA SOD-323 CRITICAL 6 201 0 5% 1/20W MF 201 0 1/20W MF 5% NOSTUFF 201 5% 0 1/20W MF CRITICAL SSOT6 FDC5612 PLACEMENT_NOTE=PLACE NEAR C2604 201 6.3V X5R 0.1UF 10% 603 10UF X5R 6.3V 20% 201 1000PF X7R 16V 10% X60003D-41 SOT23-3 CRITICAL 201 10K 1% MF 1/20W 201 10K 1% MF 1/20W 402 1% MF 1/6W 0.4 PLACEMENT_NOTE=PLACE NEAR C2604 AND Q2602 20% 4.7UF X5R 6.3V 402 402 MF-LF 1/16W 1% 115K CRITICAL SOT-963 NTUD3169CZ 5% 100PF CERM 50V 402 402 50V CERM 100PF 5% 402 50V CERM 100PF 5% 1/6W MF 1% 402 0.4 PLACEMENT_NOTE=PLACE NEAR C2604 AND Q2602 50V CERM 100PF 5% 402 5% 82PF 0201 CERM 25V MF-LF 1% 1/16W 402 100 PIMB051H-SM 10UH-3A CRITICAL PLACEMENT_NOTE=PLACE NEAR Q2602 402 X5R 10% 1UF 16V 25 25 25 25 25 25 1% 1.00 1/20W MF 201 NOSTUFF 402 47PF 5% 50V CERM SM PLACEMENT_NOTE=PLACE NEAR U1400 APP001 QFN CRITICAL OMIT CRITICAL 20% 22UF CERM-X5R 6.3V 805 10K NOSTUFF MF 1% 1/20W 201 BKLT_PLL 5% 0 1/20W MF 201 MF 1% 1/6W 0.1 402-HF 0.0047UF NOSTUFF CERM 25V 402 10% 201 MF 1/20W 1% 10K 402 10% 0.1UF X5R 25V CRITICAL PLACEMENT_NOTE=PLACE NEAR J3201 0805 4.7UF X5R-CERM 35V 10% BKLT_PLL 10% 1000PF X7R 16V 201 201 100K 1% 1/20W MF NOSTUFF 10V X5R 2.2NF 10% 201 25V X5R 10% 0.1UF 402 BKLT_PLL PWRPK-1212-8 SI7107DN CRITICAL 0.047UF 16V 10% X7R 402 100K 201 1% 1/20W MF 1/20W MF 5% 10K 201 SOD-VESM-HF SSM3K15FV MF 1/20W 1% 201 100K 2M 201 MF 1/20W 5% NOSTUFF 1/20W MF 1% 10K 201 402 10% 0.01UF X7R 25V 1% 100K 1/20W MF 201 13 1% MF-LF 1M 1/16W 402 100K 201 1/20W MF 1% BKLT_PLL 201 10K 1/20W MF 1% 201 1/20W MF 1% 475 201 1.40K 1/20W MF 1% SM 1% 1/20W MF 3.01K 201 201 MF 1/20W 0 5% 1% 1.00 1/20W MF 201 1% 1.00 1/20W MF 201 1% 1.00 1/20W MF 201 1% 1.00 1/20W MF 201 1% 1.00 1/20W MF 201 1/20W100K 201 1% MF NOSTUFF 201 5% 0 1/20W MF LED BACKLIGHT CONTROLLER SYNC_MASTER=MARK SYNC_DATE=12/04/2009 IC,APP001A,WHT LED BKLGHT CTR,SCRN,QFN20 U2600353S2413 CRITICAL1 LED_IO1_R MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM LED_IO2_R VOLTAGE=0V MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.25 MM GND_LED_PWRGND NET_SPACING_TYPE=ANLG LED_PWM_RC VCC_MAIN_LED_EN MIN_LINE_WIDTH=0.6 MM MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_NECK_WIDTH=0.25 MM MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_NECK_WIDTH=0.25 MM MIN_LINE_WIDTH=0.6 MM VCC_MAIN_FET =PP5V1_LED =VCC_MAIN_LED NET_SPACING_TYPE=PWR LED_SSTCMP GND_LED_PWRGND MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.3 MM LED_IO6_R LED_DIM NET_SPACING_TYPE=ANLG =PP5V1_LED LED_LPF NET_SPACING_TYPE=PWR VCC_MAIN_LED_EN_R MIN_NECK_WIDTH=0.1 MM MIN_LINE_WIDTH=0.2 MM VCC_MAIN_LED_EN_G=PP3V0_LCD MIN_NECK_WIDTH=0.25 mm LED_SW MIN_LINE_WIDTH=0.6 MM NET_SPACING_TYPE=SWITCHNODE DIDT=TRUE LED_BOOST_SINK MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.25 MM DIDT=TRUE NET_SPACING_TYPE=PWR LED_ISWSEN NET_SPACING_TYPE=PWR DIDT=TRUE LED_GATE DIDT=TRUE NET_SPACING_TYPE=ANLG MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.25 MM MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.3 MM LED_IO_1 VCC_MAIN_FET_R MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.25 MM LED_LRT LED_LRT_RC MIN_LINE_WIDTH=0.5 MM VOLTAGE=0V GND_LED_PWRGND_X DIDT=TRUE LED_IO_2 MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM LED_IO_3 MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM LED_IO3_R LED_IO_4 MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM LED_IO4_R LED_IO_5 MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM LED_IO5_R LED_IO_6 MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM GND_LED_PWRGND LED_VSYNC GND_LED_PWRGND =PP3V0_LCD LED_SSTCMP_RC GND_LED_PWRGND BACKLIGHT_EN NET_SPACING_TYPE=PWR LED_VSYNC_R LED_RT LED_ISET GND_LED_PWRGND LED_VSEN NET_SPACING_TYPE=ANLG P4V096_REF NET_SPACING_TYPE=ANLG =PP5V1_LED NET_SPACING_TYPE=ANLG LED_PWR_REF LCD_BKLT_PWM NET_SPACING_TYPE=ANLG LED_PWR_EN_L NET_SPACING_TYPE=ANLG LCD_BKLT_PWM_R GND_LED_PWRGND LED_PWR_IN_5V NET_SPACING_TYPE=ANLG PPLED_OUT C26051 2 XW2601 1 2 D2600 1 2 Q2602 1 2 5 6 3 4 R2631 12 R2630 12 R2629 12 L2600 1 2 C26011 2 R2608 1 2 C26001 2 XW2600 1 2 U2600 20 1 5 13 10 11 12 14 15 16 8 2 19 18 6 7 21 3 4 9 17 C26021 2 R26151 2 R2609 12 R2607 12 C2608 12 R2635 12 C26091 2 C26101 2 R2622 12 C2606 1 2 C26111 2 Q2600 5 4 1 2 3 C2607 1 2 R26141 2 R26161 2 Q2601 3 1 2 R2618 1 2 R2621 12 R2600 12 C26121 2 R2620 12 R26101 2 R26251 2 R26241 2 R26271 2 R26281 2 R26021 2 R2623 12 R2606 1 2 R2605 1 2 R2604 1 2 R2603 1 2 R2617 1 2 R2613 12 R26011 2 R2632 1 2 R2633 1 2 R26341 2 C26141 2 C26131 2 C2615 1 2 U2601 31 2 R26361 2 R26261 2 C2616 1 2 R26111 2 Q2603 6 3 2 5 1 4 C26201 2 C26211 2 C26221 2 C26231 2 C2603 1 2 26 OF 119 B.0.0 051-8245 21 OF 53 21 1521 15 21 1521 1521 MIN_NECK_WIDTH=0.20 MM 21 25 21 1521 21 21 1521 21
  • 24. II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 DEBUG RESET ACCESS 5% 1/20W MF 201 300 NOSTUFF 300 NOSTUFF 5% 1/20W MF 201 RED-50MCD-20MA 0603 NOSTUFF 201 MF 1/20W 1% 1.5K NOSTUFF SYNC_DATE=09/16/2009SYNC_MASTER=MIAMI DEBUG RESET ACCESS FORCE_DFU PMU_SHDWN PWR_ON_LED =VCC_MAIN_AUDIO R29001 2 R29011 2 LED2900 A K R29021 2 29 OF 119 B.0.0 051-8245 22 OF 53 6 19 1529
  • 25. CTRL PGND THRML L VIN DO FB SW PAD GND VCCA 1B1 1B2 2A2 1A1 2A1 1A2 2DIR 2OE* 1DIR 1OE* 2B2 2B1 GND VCCB VSTM26 VSTM25 VSTM24 VSTM23 MUX19 MUX17 BON_L0 BON_L1 BON_L2 BON_L3 BON_L4 BON_L5 MUX0 MUX1 MUX2 MUX3 MUX4 MUX5 MUX6 MUX7 MUX8 MUX9 MUX10 MUX11 MUX12 MUX13 MUX16 MUX15 MUX18 MUX20 MUX21 MUX22 MUX23 NC VSTM1 VSTM0 VSTM6 VSTM5 VSTM4 VSTM3 VSTM2 VSTM8 VSTM11 VSTM10 VSTM7 VSTM16 VSTM15 VSTM14 VSTM13 VSTM12 VSTM21 VSTM20 VSTM19 VSTM18 VSTM17 VSTM22 VSTM27 VSTM31 VSTM30 VSTM29 VSTM28 VSTM32 VSTM36 VSTM35 VSTM34 VSTM33 VSTM37 VSTM42 VSTM41 VSTM40 VSTM39 VSTM38 VSTM47 VSTM45 VSTM44 VSTM43 A_AD_R2 A_AD_R1 A_AD_R0 MUX14 VSTM46 GND VSTM9 VDDH VCC_DIG VCCA 1B1 1B2 2A2 1A1 2A1 1A2 2DIR 2OE* 1DIR 1OE* 2B2 2B1 GND VCCB VCC OE A NC Y GND NC OE* II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL MATES WITH RIGHTMOST GRAPE FLEX TAIL NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC P/N 518S0743 MATES WITH LEFTMOST GRAPE FLEX TAIL CONNECTORS TO GRAPE FLEX (A -> B) (A -> B) NC NC APN:311S0485 APN:311S0485 LOAD CURRENT ~ 153UA BOOST CONVERTOR NC 603-1 X5R 10% 25V 1UF VLF 4.7UH-700MA-280MOHM QFN CRITICAL TPS61045 SM 0.1UF 10% 6.3V X5R 201 6.3V X5R 0.1UF 10% 201MF 1/20W 201 10K 5% MF 1/20W 201 10K 5% 0.1UF 6.3V X5R 10% 201 6.3V 201 0.1UF 10% X5R 10K MF 1/20W 201 5%5% 201 1/20W MF 10K MF 1/20W 201 5% 3.3K 5% 10K 201 1/20W MF 6.3V X5R 10% 201 0.1UF 6.3V X5R 10% 201 0.1UF 201 5% 1/20W MF 10K 201 5% 0 1/20W MF 1K NOSTUFF MF 1/20W 201 5% SN74AVCH4T245RSV CRITICAL PQFP1 502250-8451 F-RT-SM CRITICAL CRITICAL 502250-8451 F-RT-SM 0.1UF 10% 25V X5R 402 0.1UF 10% 25V X5R 402 0.1UF 10% 25V X5R 402 201 10% 0.1UF X5R 6.3V CRITICAL BGA GROUNDHOG SN74AVCH4T245RSV CRITICAL PQFP1 OMIT SN74LVC1G126DRYR LLP CRITICAL SN74LVC1G125 LLP CRITICAL 402 MF-LF 1/16W 1M 1% 201 1/20W MF 1% 71.5K 603 10% 6.3V X5R 2.2UF 201 33PF NP0-C0G 5% 25V B0520WSXG SOD-323 402 X5R 16V 10% 0.1UF 1% 0.1 1/20W MF 201 IC,SNGL 3-STATE BUFFER,5-PIN,DRY U3010311S0506 CRITICAL1 GRAPE 1 OF 2 SYNC_DATE=12/21/2009SYNC_MASTER=JAMES Z1_CS_LZ2_H_CS_L Z1_CS_OE GRAPE_MISOAP_GRAPE_MISO =PP3V0_GRAPE BOOST_EN PP18V_GRAPE MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.6MM VOLTAGE=18V AGND 0.2MM 0.2MM BOOST_L =PP3V0_GRAPE 0.2MM BOOST_SW BOOST_FBK PP18V_R_GRAPE VOLTAGE=18V MIN_NECK_WIDTH=0.4MM MIN_LINE_WIDTH=0.6MM Z1_MOSI =PP3V0_GRAPE AP_GRAPE_MISO Z1_CS_OE =PP1V8_GRAPE GRAPE_SCLK GRAPE_MOSI GRAPE_Z2_RESET_L MAKE_BASE=TRUE AP_GRAPE_SCLK AP_GRAPE_CS_N AP_GRAPE_MOSI GRAPE_Z1_RESET_L GRAPE_CS_L =PP3V0_GRAPE =PP3V0_GRAPE GRAPE_HOST_INT_L Z1_B_ADR<1> MAKE_BASE=TRUE AP_GRAPE_HOST_INT_N GRAPE_RESET_N Z2_H_CS_L Z1_CS_OE GRAPE_FW_DNLD_EN_L =PP1V8_GRAPE Z1_SCLK Z1_MISO AP_GRAPE_SCLK AP_GRAPE_CS_N AP_GRAPE_MOSI MT_PANEL_IN<0> MT_PANEL_IN<5> MT_PANEL_IN<11> MT_PANEL_IN<13> MT_PANEL_IN<15> MT_PANEL_IN<1> MT_PANEL_OUT<6> MT_PANEL_OUT<8> MT_PANEL_OUT<10> MT_PANEL_OUT<12> MT_PANEL_IN<6> MT_PANEL_IN<10> MT_PANEL_IN<12> MT_PANEL_IN<26> MT_PANEL_IN<24> MT_PANEL_OUT<0> MT_PANEL_OUT<2> MT_PANEL_OUT<4> MT_PANEL_IN<2> MT_PANEL_IN<4> MT_PANEL_IN<8> MT_PANEL_IN<19> MT_PANEL_IN<17> MT_PANEL_OUT<13> MT_PANEL_OUT<11> MT_PANEL_OUT<7> MT_PANEL_OUT<9> MT_PANEL_IN<29> MT_PANEL_OUT<3> MT_PANEL_IN<3> MT_PANEL_IN<25> MT_PANEL_IN<27> MT_PANEL_IN<27> MT_PANEL_OUT<5> MT_PANEL_OUT<1> MT_PANEL_IN<25> MT_PANEL_IN<23> MT_PANEL_IN<21> MT_PANEL_IN<9> MT_PANEL_IN<7> MT_PANEL_IN<18> MT_PANEL_IN<16> MT_PANEL_IN<14> MT_PANEL_IN<28> MT_PANEL_IN<28> MT_PANEL_IN<26> MT_PANEL_IN<24> MT_PANEL_IN<22> MT_PANEL_IN<20> MT_PANEL_OUT<15> MT_PANEL_OUT<20> MT_PANEL_OUT<26> MT_PANEL_OUT<28> MT_PANEL_OUT<30> MT_PANEL_OUT<16> MT_PANEL_IN<7> MT_PANEL_IN<5> MT_PANEL_IN<3> MT_PANEL_IN<1> MT_PANEL_OUT<21> MT_PANEL_OUT<25> MT_PANEL_OUT<27> MT_PANEL_IN<17> MT_PANEL_IN<15> MT_PANEL_IN<13> MT_PANEL_IN<11> MT_PANEL_IN<9> MT_PANEL_OUT<17> MT_PANEL_OUT<19> MT_PANEL_OUT<23> MT_PANEL_OUT<34> MT_PANEL_OUT<32> MT_PANEL_IN<0> MT_PANEL_IN<2> MT_PANEL_IN<6> MT_PANEL_IN<4> MT_PANEL_IN<20> MT_PANEL_IN<10> MT_PANEL_OUT<18> MT_PANEL_IN<22> MT_PANEL_IN<18> MT_PANEL_IN<8> MT_PANEL_IN<12> MT_PANEL_IN<14> MT_PANEL_IN<16> MT_PANEL_OUT<38> MT_PANEL_OUT<36> MT_PANEL_OUT<24> MT_PANEL_OUT<22> MT_PANEL_OUT<33> MT_PANEL_OUT<31> MT_PANEL_OUT<29> MT_PANEL_OUT<14> MT_PANEL_IN<19> MT_PANEL_IN<21> MT_PANEL_IN<23> MT_PANEL_OUT<39> MT_PANEL_OUT<37> MT_PANEL_OUT<35> =PP3V0_GRAPE_MARIO1 PP18V_GRAPE MT_PANEL_OUT<26> MT_PANEL_OUT<25> MT_PANEL_OUT<24> MT_PANEL_OUT<23> MT_PANEL_OUT<1> MT_PANEL_OUT<6> MT_PANEL_OUT<5> MT_PANEL_OUT<4> MT_PANEL_OUT<3> MT_PANEL_OUT<2> MT_PANEL_OUT<8> MT_PANEL_OUT<11> MT_PANEL_OUT<10> MT_PANEL_OUT<7> MT_PANEL_OUT<16> MT_PANEL_OUT<15> MT_PANEL_OUT<14> MT_PANEL_OUT<13> MT_PANEL_OUT<12> MT_PANEL_OUT<21> MT_PANEL_OUT<20> MT_PANEL_OUT<19> MT_PANEL_OUT<18> MT_PANEL_OUT<17> MT_PANEL_OUT<22> MT_PANEL_OUT<27> MT_PANEL_OUT<31> MT_PANEL_OUT<30> MT_PANEL_OUT<29> MT_PANEL_OUT<28> MT_PANEL_OUT<32> MT_PANEL_OUT<36> MT_PANEL_OUT<35> MT_PANEL_OUT<34> MT_PANEL_OUT<33> MT_PANEL_OUT<37> MT_PANEL_OUT<39> MT_PANEL_OUT<38> MT_PANEL_OUT<9> MT_PANEL_OUT<0>MUX_IN<0> MUX_IN<1> MUX_IN<2> MUX_IN<3> MUX_IN<4> MUX_IN<5> MUX_IN<6> MUX_IN<7> MUX_IN<8> MUX_IN<9> MUX_IN<19> MUX_IN<18> MUX_IN<17> MUX_IN<16> MUX_IN<15> MUX_IN<14> MUX_IN<13> MUX_IN<12> MUX_IN<11> MUX_IN<10> Z1_BON_L<1> Z1_BON_L<2> Z1_BON_L<3> Z1_BON_L<4> Z1_BON_L<5> Z1_BON_L<0> Z1_B_ADR<2> Z1_B_ADR<0> C30001 2 R3009 1 2 R30121 2 C3008 1 2 D3000 1 2 C3009 1 2 L3000 1 2 U3000 53 4 6 1 7 8 9 2 XW3000 1 2 C30011 2 R3066 1 2 C30201 2 C30211 2 R30201 2 R30211 2 C30311 2 C30301 2 R30311 2 R30301 2 R30321 2 R30251 2 C30411 2 C30501 2 R30331 2 R3099 1 2 R30501 2 U3007 6 7 15 14 4 1 8 9 13 12 5 16 10 11 3 2 J3010 1 10 11 12 13 14 15 16 17 18 19 2 20 21 22 23 24 25 26 27 28 29 3 30 31 32 33 34 35 36 37 38 39 4 40 41 42 43 44 45 46 47 48 49 5 50 51 52 53 6 7 8 9 J3011 1 10 11 12 13 14 15 16 17 18 19 2 20 21 22 23 24 25 26 27 28 29 3 30 31 32 33 34 35 36 37 38 39 4 40 41 42 43 44 45 46 47 48 49 5 50 51 52 53 6 7 8 9 C3005 1 2 C3007 1 2 C3053 1 2 C30061 2 U3003 A10 B9 A9 C7 A7 B7 B8 A8 C8 C9 D7 G7 G8 E3 E5 E6 E7 F6 F7 G5 G6 B1 C1 I5 J8 J9 K8 J10 I10 H10 F11 C11 E10 E1 A11 B4 A5 A2 F2 H1 J1 J2 J3 K4 H5 C6 D3 F5 F8 F9 G3 G4 G9 H3 H4 H7 H8 D4 H9 J6 K7 D5 D6 D8 D9 E4 E8 F4 A6 B6 E9 F3 A1 B2 H2 I2 K1 K2 I3 K3 J4 I4 K6 H6 C2 K5 J5 I7 K9 I8 K10 I6 J7 K11 I9 D1 J11 I11 H11 G11 G10 F10 C10 D10 E11 D11 D2 B11 B10 C4 A4 B5 C5 A3 B3 E2 F1 G1 G2 I1 U3005 6 7 15 14 4 1 8 9 13 12 5 16 10 11 3 2 U3010 2 3 1 6 4 U3009 2 3 1 6 4 30 OF 119 B.0.0 051-8245 23 OF 53 5 5 242324 2324 24723 15 23 24 24 23 152324 24 15 23 24 723 2324 1523 24 24 24 723 723 723 24 24 15 23 24 15 23 24 24 24 6 6 23 24 23 24 6 1523 24 24 723 723 723 23 24 2324 2324 2324 2324 2324 23 23 23 23 23 24 23 24 23 24 23 24 23 24 23 23 23 23 24 23 24 23 24 2324 2324 23 23 23 23 24 23 2324 2324 2324 2324 23 23 2324 2324 2324 2324 2324 23 24 23 24 23 24 23 24 23 24 23 24 23 24 23 24 23 24 23 23 23 23 23 23 23 24 23 24 23 24 23 24 23 23 23 23 24 23 24 23 24 23 24 23 24 23 23 23 23 23 2324 2324 2324 2324 2324 2324 23 2324 2324 2324 2324 2324 2324 23 23 23 23 23 23 23 23 23 24 23 24 23 24 23 23 23 15 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 2324 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24