To learn the definition of Static CMOS Logic Circuit, truly know how to apply in use of the function of Static CMOS Logic Circuit in life.

1. By : LIEW YONG HAO (07DEP15F1056)
CAROLINE SAMADAU (07DEP15F1087)
DEE6113 - CMOS IC DESIGN
PRESENTATION 2

2.  Static CMOS logic
- The principle of static CMOS logic is the output is connected to ground through an n-
block and to VDD through a dual p-block
- Without changes of the inputs, this gate consumes only the leakage currents of some
transistors.
- When it is switching, it draws an additional current which is needed to charge and
discharge the internal capacitances and the load.
- Although the gate's logic function is ideally independent of the transistor channel
widths, they determine the dynamic behavior essentially: wider transistors will switch
a capacitive load faster, but they will also cause a larger input capacitance of the
gate.
- Unless otherwise noted, minimum-width and, of course, minimum-channel-length
transistors are assumed.
- For given capacitances the transistors' on-state current will limit the switching speed
of the gate and, consequently, the maximum clock frequency of a synchronous circuit

4. Ex: Logic gates, mux,
decoder, adder
Ex: Registers, counters,
oscillators, memory

5. COMBINATIONAL LOGIC SEQUENTIAL LOGIC
- Circuits (or non-regenerative)
that have the property that at
any point in time, the output of
the circuit is related to its
current input signals by some
Boolean expression (assuming
that the transients through the
logic gates have settled).
- No intentional connection
between outputs and inputs is
present.
- Or regenerative circuits — the
output is not only a function of
the current input data, but also
of previous values of the input
signals
- This is accomplished by
connecting one or more outputs
intentionally back to some
inputs.
- Consequently, the circuit
“remembers” past events and
has a sense of history.
- A sequential circuit includes a
combinational logic portion and
a module that holds the state.