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DEE6113 : CMOS IC DESIGN
PAST SEM QUESTION SECTION B DECEMBER 2017
MASTURA SUFIAN 07DEP16F1028
AZILLAH JEPREE 07DEP16F1034
CINDY SOIMON 07DEP16F1046
ARINAH RASYIKAH 07DEP16F1091
SECTION B : QUESTION 1
• you a CMOS IC circuit designer in a leading company ; a
customer of your company has requested you to design a
CMOS IC circuit by providing only the information of the
boolean equation; Z = ((A.C)+B) .
• Your task is to sketch a transistor level schematic diagram
and to transform it to a stick diagram using the Euler Path
method from the equation.
1. Find the PUN and PDN network equation
• Z= ((A.C)+B)
PUN = Z = ((A.C)+B)
=((A'+C').B')
PDN = Z = ((A.C)+B)
= ((A.C)+B)
2. Draw the transistor level schematic diagram
A C
B
A
C
B
Vdd
Vss
Z (output)
PMOS is use as
pull up network.
refer to the equation,
' . ' means siries
connection and
' + ' means parallel
connection.
NMOS is use as pull
down network.
refer to the equation,
' . ' means siries
connection and
' + ' means parallel
connection.
3. Draw the Euler path by refer the schematic circuit
Vdd
Z (output)
Vss
A
C
B
A
C
B
A C B
4. By referring the Euler path , draw the stick diagram
A C B
Vdd
Vss
Z (output)
PMOS
NMOS
colour code
Red for polysilicon layer
green for active area
blue for metal1 layer
black for poly contact
THE END

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Presentation cmos 2

  • 1. DEE6113 : CMOS IC DESIGN PAST SEM QUESTION SECTION B DECEMBER 2017
  • 2. MASTURA SUFIAN 07DEP16F1028 AZILLAH JEPREE 07DEP16F1034 CINDY SOIMON 07DEP16F1046 ARINAH RASYIKAH 07DEP16F1091
  • 3. SECTION B : QUESTION 1 • you a CMOS IC circuit designer in a leading company ; a customer of your company has requested you to design a CMOS IC circuit by providing only the information of the boolean equation; Z = ((A.C)+B) . • Your task is to sketch a transistor level schematic diagram and to transform it to a stick diagram using the Euler Path method from the equation.
  • 4. 1. Find the PUN and PDN network equation • Z= ((A.C)+B) PUN = Z = ((A.C)+B) =((A'+C').B') PDN = Z = ((A.C)+B) = ((A.C)+B)
  • 5. 2. Draw the transistor level schematic diagram A C B A C B Vdd Vss Z (output) PMOS is use as pull up network. refer to the equation, ' . ' means siries connection and ' + ' means parallel connection. NMOS is use as pull down network. refer to the equation, ' . ' means siries connection and ' + ' means parallel connection.
  • 6. 3. Draw the Euler path by refer the schematic circuit Vdd Z (output) Vss A C B A C B A C B
  • 7. 4. By referring the Euler path , draw the stick diagram A C B Vdd Vss Z (output) PMOS NMOS colour code Red for polysilicon layer green for active area blue for metal1 layer black for poly contact