1. Implementing Concurrency Abstractions
for Programming
Multi-Core Embedded Systems
in Scheme
Ruben Vandamme
Promotor: Prof. Dr. Wolfgang De Meuter
Advisors: Dr. Coen De Roover
Christophe Scholliers
2. 2
Overview
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Embedded systems
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Event-driven XMOS chip
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Interpreter requirements
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Bit Scheme
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Modifying Bit Scheme to support XMOS
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Demonstration
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Contributions & Conclusion
3. 3
Embedded software
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Increasingly important
β
Digital watches, microwaves, cars, etc
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98% of processors used are embedded
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Different from PC and server software
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Interacts with the outside world
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Reading sensors, buttons, communicating, etc
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Polling: frequently check condition
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Interrupts: asynchronous signals
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Less overhead, less power
4. 4
Interrupts
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Dedicated hardware for frequent tasks
β
PWM, UART, IΒ²C,β¦
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Timing sensitive tasks
β
Interrupts are often used as an interface
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Source of various bugs
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Stack overflow, interrupt overload, β¦
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John Regehr (2005)
Safe and structured use of interrupts in real-time
and embedded software
5. 5
Event-driven chip
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XMOS XS1-G4
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No interrupts or polling
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Multi-core, multi-threaded
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Threads supported in HW
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Guaranteed execution time
β
Message passing
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Transputer
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Programmed in XC
β
Based on CSP
6. 6
Interpreter requirements
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Use less than 64 KB memory (per core)
β
Most interpreters need an order of magnitude
more memory
β
MiniScheme, Pico, etc.
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Contain a real-time garbage collector
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We need to extend it to
β
exploit concurrency provided by hardware
β
export hardware functionality
Input & output, timing, ...
7. 7
Bit Scheme
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Fits in 64KB memory
Byte code + interpreter + runtime memory
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Byte code based
Compiler can remove unneeded functions
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No runtime error handling
Keeps interpreter small
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Real-time garbage collector
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Served as a basis for our XMOS Scheme
8. 8
Exploiting XMOS concurrency
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We run four interpreters run in parallel
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One on each core
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Modified compiler and interpreter accordingly
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Exploit all memory and IO possibilities
(par
(core CORE_0
...)
(core CORE_1
...)
(core CORE_2
...)
(core CORE_3
...))
9. 9
Communication primitives added
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Use message passing over channels
β
cout, cin
β
Primitives use hardware
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Doesn't support composite types
β
Serialization needed
Core 0 Core 1
(par
(core CORE_0
(cout CORE_1 99))
(core CORE_1
(display (cin CORE_0)))) Core 2 Core 3
10. 10
IO primitives added
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Initialize and configure IO
pon, poff, pconf_in, pconf_out
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Perform IO
pout, pin
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Wait for an event on IO pins
peq, pneq
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Use hardware functionality
(define PORT_CLOCKLED 525056)
(pon PORT_CLOCKLED)
(pconf_out PORT_CLOCKLED 0)
(pout PORT_CLOCKLED 15)
11. 11
Time primitives added
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We added a notion of time
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Execute actions at a certain point in time
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(timer)
Returns the current time in clockticks
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(after time)
Blocks thread until current time is after time
β
Both primitives call hardware functionality
(define now (timer))
(define clock 100000000)
(after (+ now (β 5 clock)))
(display β5 seconds laterβ)
12. Handling multiple events at once
12
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Certain primitives are blocking
pne, peq, cin
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Threads need to be able to handle more
than one event at a time
(select
((select_pne buttons 15)
(lambda (buttonsvalue)
(display buttonsvalue)))
((select_cin CORE_1)
display)
(else (display βdefaultβ)))
15. 15
Demonstration
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Case study
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LED Pulse Width Modulation in Scheme
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Communication over Xbee
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Via UART implemented in Scheme
App UART
Buttons RX
UART
PWM
TX
16. 16
Contributions & Conclusion
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Ported a Scheme interpreter to the new
XMOS chip
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Exploit the concurrency of XMOS chip
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Added new primitives
β
IO, message passing, time, β¦
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Allow to program hardware from Scheme
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Modified compiler accordingly