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© 2013
Copyrights © Yole Développement SA. All rights reserved.
Embedded Die-in-Package
Patent Analysis
Texas
Instruments
Nokia
© 2013 • 2
Copyrights © Yole Développement SA. All rights reserved.
Table of Contents
• Context and Objectives ............................................................................................. 3
• Introduction to Embedded IC Market and Technology ……………………………... 13
• Methodology for Patent Screening and Analysis ..................................................... 25
• IP Landscape Overview...................................................................................... 31
• Global Patent Ranking and Patent Potential Analysis ……………………………… 48
• Link with Existing Product and Commercialized Solutions ……………………….... 54
• Top Players Portfolio Analysis ……………………………………………………………
- Focus on SEMCO
- Focus on ASE
- Focus on Samsung
- Focus on Unimicron
- Focus on Intel
- Focus on Imbera
- Focus on Shinko
- Focus on Murata
- Focus on LG Innotek
- Focus on Daeduck
68
• Conclusions …………………………………………………………………………………. 213
70
93
108
120
134
146
161
178
193
203
© 2013 • 3
Copyrights © Yole Développement SA. All rights reserved.
Why this Report?
• After several years of customer-specific analysis, last year YOLE Développement
began publishing reports on the analysis of patents’ technical contents
• This new IP report is focused on Embedded IC in substrate technology
• YOLE has developed a specific methodology for making such analyses, mixing
our technical and business knowledge with traditional patent database access
© 2013 • 4
Copyrights © Yole Développement SA. All rights reserved.
What’s included/not included in this report?
• This report includes:
– An overview of « who owns what » in terms of patents for Embedded IC in package
technology, plus a dedicated focus on the ten most-active players in this area
– The report’s main objectives are:
 To present the current industrial and business status of Embedded IC
 To define and provide a database of all relevant patents, with technological segmentation
 To detail implementation architecture
 To identify the key patents and their owners
• The report does not include:
– A juridic analysis of patent portfolios
– Deep-link analysis (legal, juridic, etc.) between assignees
• To summarize, this report’s goal is to analyze key patents and identify
structural concepts from a technological or an industrial point of view,
leading to business and strategic conclusions.
© 2013 • 5
Copyrights © Yole Développement SA. All rights reserved.
Yole’s standard
reports
• Market analysis
• Technology analysis
A New Report Type Providing a Clear Link Between the
IP Situation and Market Evolutions
• More than an analysis describing the state-of-the-art IP situation, this report is the
missing link between patented technology solutions and market, technological
and business trends
– YOLE has developed a unique methodology in order to create a technical segmentation of the patent
landscape and define which patents are the most innovative, either for future preparation or already
in-production
– By combining its technical knowledge, business understanding and patent search abilities, Yole was
able to assemble a report rife with unique analysis and added-value
– The in-depth technological analysis of patents contained in this report will provide a deep
understanding of key players’ strategic decisions and positioning within the value chain
Embedded IC Technological &
Market Evolution
Embedded IC IP
landscape
Yole’s new IP report
• Relevant patent analysis
• Technological segmentation
• Detailed implementation architecture
• Key patent identification
• Links between patents and available products
© 2013 • 6
Copyrights © Yole Développement SA. All rights reserved.
Patent Analysis Definitions
• Patent family
– A patent family is a set of either patent applications or publications taken in multiple countries to protect a single invention by a common
inventor(s) which is then patented in multiple countries. A first application is made in one country – the priority – and is then extended to other
offices.
• Assignee (or applicant)
– The assignee is the person or organization (i.e. company, university) who/which filed a patent application. There may be more than one assignee
per application. The assignee may also be the inventor.
• Priority date
– The priority date is the date on which the patent application was filed. On this date the patent document is protected from public viewing.
• Priority Number
– The priority number is the application number by which priority is claimed, i.e. it’s the same as the application number of the claimed priority
document. The priority number consists of a country code (two letters), the filing year (four digits) and a serial number (variable, maximum seven
digits).
• Publication date
– The publication date is the date on which the patent application was first published. It’s the date on which the patent document is made available
to the public, thereby becoming “state-of-the-art”.
• Publication number
– The publication number is the number assigned to a patent application upon publication. Publication numbers are generally made up of a country
code (two letters) and a serial number (variable, one to twelve digits – i.e. DE202004009768).
• International Patent Classification (IPC)
– Patent documents’ technical content is classified in accordance with International Patent Classification (IPC). The publishing office assigns an IPC
symbol valid upon publication of the patent application. The complete IPC can be found on the World Intellectual Property Organization’s (WIPO)
website: http://www.wipo.int/ipcpub).
© 2013 • 7
Copyrights © Yole Développement SA. All rights reserved.
Assumptions and Methodology (4/4)
• These parameters enable us to evaluate patent potential in four
dimensions:
• The final patent potential is the average score of each parameter
• A score between 1 - 10 is thus calculated for each dimension, and for
global patent potential
Patent dimensions Involved parameters
Technology Tech. Infringement Capability/Innovation Type/Search Report (citations)
Market Competitor Type/Geo. Protect./Market Size
Duration Legal Status/Applicant Type/Life Expectancy
Legal Legal Status/Geo. Protect./Search Report (citations)
© 2013
Copyrights © Yole Développement SA. All rights reserved.
Introduction to the
Embedded IC
Market and Technology
Texas
Instruments
Nokia
STATS ChipPAC
AT&SInfineon
© 2013 • 9
Copyrights © Yole Développement SA. All rights reserved.
• Overall relevance of analyzed patents:
Relevant
596
Related
125
Non-relevant
3,246
Overall Relevance of Analyzed Patents for
Embedded IC Technology in 2012
Landscape Overview for Embedded IC Technologies
Distribution of analyzed patents
Yole
Developpement ©
Dec. 2012
• ~ 80% of patents are marked « non-relevant »
• 596 patent families will be further analyzed
© 2013 • 10
Copyrights © Yole Développement SA. All rights reserved.
Embedded Die Packaging SiP Module Capability
Enables further simplification of board-level mounting to OEMs
• Embedded die packaging is a great platform for moving to SiP module capabilities
– Once the infrastructure for test, yield and volume manufacturing is in place, it’s likely we’ll see a lot of
today’s SOC-designing fabless companies move to complex SiP module realizations, as they’ll benefit from
cost-savings at the FE level, integration of more in-package value (i.e. passive integration) and higher
electrical performance in RF, while simplifying board-level integration to the final customer
(n+2)
generation
 Smaller die size  Lower “front-end” cost thanks to more advanced
lithography, while integrating more functionalities
 Simplification of PCB mother-board mounting + integration of EMI
shielding at the package level  interesting from OEM perspective for
much simpler board mounting
 Enables realization of complex SiP modules, including active and
discrete passive functions  very interesting for wireless IC players
willing to integrate “more value” into their SiP modules
PCB 0.5mm pitch
RF Connectivity 40nm
“Fan-in” WLCSP
+ Discrete passives on board
+ EMI shielding
Embedded
RF-SiP module
PCB 0.5mm pitch
RF Connectivity 28nm
 OEM integrates many additional components “around” the main
connectivity IC, making final board assembly quite complex:
 Discrete passives
 Additional active IC like local DC/DC converter components
 Metal Cages to provide EMI shielding
© 2013 • 11
Copyrights © Yole Développement SA. All rights reserved.
Embedded Die Package
Map of key players
© 2013 • 12
Copyrights © Yole Développement SA. All rights reserved.
Top 10 IPC Classes Used for Embedded IC Patents
Top 10 International Patent Classification (IPC) Classes used in in Embedded IP Domain
IPC
Code
Description
No. of Patent
Families
H05K
PRINTED CIRCUITS; CASINGS OR CONSTRUCTION DETAILS FOR ELECTRIC APPARATUS; MANUFACTURE OF ELECTRICAL
COMPONENTS’ ASSEMBLAGES
514
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR 433
B32B LAYERED PRODUCTS, i.e. PRODUCTS MADE OF FLAT OR NON-FLAT STRATA (i.e. CELLULAR OR HONEYCOMB FORM) 30
G06K DATA RECOGNITION; DATA PRESENTATION; RECORD CARRIERS; RECORD CARRIER HANDLING 17
H01K ELECTRIC INCANDESCENT LAMPS 14
B29C
SHAPING OR JOINING OF PLASTICS; SHAPING OF SUBSTANCES IN A GENERAL PLASTIC STATE; AFTER-TREATMENT OF
SHAPED PRODUCTS, i.e. REPAIRING
13
H01Q AERIALS 11
H01R
ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED
ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
11
B42D
BOOKS; BOOK COVERS; LOOSE LEAVES; PRINTED MATTER OF SPECIAL FORMAT OR STYLE NOT OTHERWISE PROVIDED
FOR; DEVICES FOR USE THEREWITH; MOVABLE-STRIP WRITING OR READING APPARATUS
10
H01G
CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-
SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
10
© 2013 • 13
Copyrights © Yole Développement SA. All rights reserved.
Top 10 Patent Assignees for Embedded IC Technologies
• Around180 players are involved in embedded die technologies, but the top 10 assignees
represent 53% of patents filed
Top 10 Patent Assignees for Embedded Patents (includes relevant and related)
Yole Developpement © December 2012
147
34
22
23
19
23
20
14
14
15
13
9
4
9
5
5
0
2
3
1
0
2
0 25 50 75 100 125 150 175
SEMCO (KR)
ASE (TW)
SAMSUNG (KR)
UNIMICRON (TW)
INTEL (US)
IMBERA (FI)
SHINKO (JP)
MURATA (JP)
LG INNOTEK (KR)
DAEDUCK (KR)
TDK (JP)
No. of Patent Families
Assignee
Relevant Related
© 2013 • 14
Copyrights © Yole Développement SA. All rights reserved.
Evolution of Patent Assignees for Embedded IC Technologies
• Numbers represent the number of published patent families. Panasonic, Shinko and Infineon are the early
players, having been involved in Embedded die pre-2000. Panasonic has been inactive since 2007
• From the mid 2000’s, Semco is the main assignee. Over the last five years, Unimicron has emerged as
new key player
Evolution of Top 15 Assignees for Embedded Patents (incl. related and relevant)
LG INNOTEK 3 11 1
DAEDUCK 5 5 4 1
UNIMICRON 2 3 6 3 8 6
SEMCO 21 33 12 14 29 29 18
MURATA 2 3 3 1 6 2
TDK 1 4 4 3 1 2
DENSO 1 1 3 1 3 2
AT&S 1 3 1 3 3 3
ASE 1 7 11 6 5 3 4 1
IMBERA 2 5 5 1 2 4 1 3
SAMSUNG 1 1 1 5 4 9 4 1 5
INTEL 1 3 1 1 2 1 1 8 6
INFINEON 1 1 2 2 1 3 1
SHINKO 1 2 5 4 5 1 4
PANASONIC 1 1 1 2 1 5
1982 1998 1999 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012
Yole Developpement © December 2012
© 2013 • 15
Copyrights © Yole Développement SA. All rights reserved.
Publication Countries of Top 15 Assignees for Embedded IC
Patents
• Bubble size represents number of published patents (note that World (WO) and Europe (EP) country
codes may hide a significant # of other countries). Semco mostly protected its innovations in Korea, the
USA, Japan and China. Daeduck chose an IP strategy whereby its innovations are only protected in its
originating country (Korea) -- contrary to Imbera, which opted for large geographic protection.
Publication Countries of Top 15 assignees for Embedded Patents (incl. related and relevant)
Yole Developpement © December 2012
© 2013 • 16
Copyrights © Yole Développement SA. All rights reserved.
Assignee Collaboration Network for Embedded IC Patent Filing
• Patents co-filing in the corpus of selected patents for the embedded die domain
• The black number is the number of co-filings
• The white number is the assignee’s number of patent families
Assignee Collaboration Network
Yole Developpement © December 2012
© 2013 • 17
Copyrights © Yole Développement SA. All rights reserved.
Inventors/Assignees Collaboration Network for Embedded IC Technology
Inventors/Assignees Collaboration Network (incl. related and relevant)
• Assignees direct relationship (patents co-filing) and indirect relationship (via inventors) in the
corpus of selected patents for the embedded die domain
• The black number is the number of co-filings
• The white number is the number of patent families for this assignee or inventor
Yole Developpement © December 2012
© 2013 • 18
Copyrights © Yole Développement SA. All rights reserved.
Rohm Device: Main Process Steps
and Related Patents Currently Used (2/3) Related patents
and drawings
• Described in
• US2009/0218678
• EP1936675
• Mentioned in
• EP1936676
• EP2019574
• JP2005-236039
• US2007/0141759
• US2012/0247819
• Described in
• US2009/0218678
• EP1936675
• Mentioned in
• EP1936676
• EP2019574
• JP2005-236039
• US2007/0141759
• US2012/0247819
• Described in
• US2009/0218678
• EP1936675
• Mentioned in
• EP1936676
• EP2019574
• JP2005-236039
• US2007/0141759
• US2012/0247819
• Described in
• US2009/0218678
• EP1936675
• Mentioned in
• EP1936676
• EP2019574
• JP2005-236039
• US2007/0141759
• US2012/0247819
© 2013
Copyrights © Yole Développement SA. All rights reserved.
Top Players Portfolio
Analysis
 SEMCO
 ASE
 Samsung
 Unimicron
 Intel
 Imbera
 Shinko
 Murata
 LG Innotek
 daeduck
© 2013 • 20
Copyrights © Yole Développement SA. All rights reserved.
SEMCO’s Patent Portfolio for
Embedded Die Technologies
© 2013 • 21
Copyrights © Yole Développement SA. All rights reserved.
SEMCO’s Patent Filing Evolution for Embedded Die Technologies
(incl. relevant and related)
SEMCO’s Patent Filing Evolution for Embedded IC
Technology
• SEMCO’s patent portfolio is composed of 156 patent families (147 relevant and 9 related)
comprising 317 patents. Its embedded die patenting activity began in the mid-2000’s,
growing to an average of about 25 patent filings per year between 2005 - 2010
Note: Data corresponding to the years 2011 and 2012 may be incomplete since a significant number of patent applications filed
during these years may not have been published yet
6
30
21
18
33
15
23
1
3
3
2
1
0
5
10
15
20
25
30
35
40
2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012
No.ofpatentfamilies
Priority year
Related
Relevant
Yole Developpement © December 2012
© 2013 • 22
Copyrights © Yole Développement SA. All rights reserved.
Top SEMCO Inventors for Embedded Die Technologies
(incl. relevant and related)
Top SEMCO Inventors for Embedded IC
• At SEMCO, about 160 inventors are involved in embedded die. HWAN DOO LEE is the
leading inventor with 45 patent families. HYEON-SUK CHO has been inactive since 2007,
while KYO YUL CHUNG and SUNG TAE JEONG are new inventors as of 2008
Filing year
Inventor
No. of patent
families
2004 2005 2006 2007 2008 2009 2010 2011
LEE, DOO HWAN 45 3 8 11 5 4 6 8
KIM, MOON-IL 27 7 8 4 3 3 2
CHO, SUK-HYEON 26 5 13 8
CHUNG, YUL KYO 25 3 8 9 5
CHO, HAN-SEO 25 18 7
YOO, JE-GWANG 22 7 9 4 1 1
RYU, CHANG-SUP 21 5 14 1 1
LEE, JAE-KUL 16 4 5 2 2 2 1
BAEK, SANG JIN 14 6 3 4 1
JEONG, TAE SUNG 14 4 3 7
Yole Developpement © December 2012
© 2013 • 23
Copyrights © Yole Développement SA. All rights reserved.
SEMCO’s Patent Mapping for Chip Placement/Bonding
By priority date
2004
KR20060078118
KR20060005840
2009
KR20100081073
US20110141711
US20100236821
KR20110021123
KR20100133768
US20100288535
TW201103385
US20110083892
US2011083891
US2011005823
2010
KR20120028010
US20110290540
KR20120028008
KR101085727
US20120160550
KR20120003658
KR20110101430
KR101085733
KR101067109
US2011216513
US2011214913
KR20120069452
2007
KR100820633
KR100867150
KR20070101183
KR20090062709
US2011179642
KR100832653
US2009071705
KR20090047318
KR100887685
US2010242272
KR100811034
CN101369574
2008
KR20100049769
KR20100000678
US20100012364
KR20100051310
US20100101847
US20090321118
US20090310323
KR20100001799
KR20090093449
KR20100021810
US20120134125
KR20090117237
US20100134991
US20100078204
US20100142170
KR20100059010
US2010013968
KR20100004248
KR20090132186
KR20090126537
US2012042513
US2010006203
US2012017435
US2011314667
2006
KR100789530
KR100789530
KR100769527
KR100771320
KR20070112985
KR100758229
KR100771319
KR100771306
KR100773985
KR100782405
KR100788213
FI20075593
2005
US20070074900
FI200600447
US20090268418
CN1886026
KR100653247
KR100651358
KR100643334
KR20070036341
KR100661296
KR20070000645
KR20070000644
KR100651568
KR100700922
US2010163291
KR100674293
KR100656751
KR20070023319
KR100728748
KR100651474
US2013042472
US2010154210
KR100673860

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Embedded Die in Package Patent Investigation 2013 Report by Yole Developpement

  • 1. © 2013 Copyrights © Yole Développement SA. All rights reserved. Embedded Die-in-Package Patent Analysis Texas Instruments Nokia
  • 2. © 2013 • 2 Copyrights © Yole Développement SA. All rights reserved. Table of Contents • Context and Objectives ............................................................................................. 3 • Introduction to Embedded IC Market and Technology ……………………………... 13 • Methodology for Patent Screening and Analysis ..................................................... 25 • IP Landscape Overview...................................................................................... 31 • Global Patent Ranking and Patent Potential Analysis ……………………………… 48 • Link with Existing Product and Commercialized Solutions ……………………….... 54 • Top Players Portfolio Analysis …………………………………………………………… - Focus on SEMCO - Focus on ASE - Focus on Samsung - Focus on Unimicron - Focus on Intel - Focus on Imbera - Focus on Shinko - Focus on Murata - Focus on LG Innotek - Focus on Daeduck 68 • Conclusions …………………………………………………………………………………. 213 70 93 108 120 134 146 161 178 193 203
  • 3. © 2013 • 3 Copyrights © Yole Développement SA. All rights reserved. Why this Report? • After several years of customer-specific analysis, last year YOLE Développement began publishing reports on the analysis of patents’ technical contents • This new IP report is focused on Embedded IC in substrate technology • YOLE has developed a specific methodology for making such analyses, mixing our technical and business knowledge with traditional patent database access
  • 4. © 2013 • 4 Copyrights © Yole Développement SA. All rights reserved. What’s included/not included in this report? • This report includes: – An overview of « who owns what » in terms of patents for Embedded IC in package technology, plus a dedicated focus on the ten most-active players in this area – The report’s main objectives are:  To present the current industrial and business status of Embedded IC  To define and provide a database of all relevant patents, with technological segmentation  To detail implementation architecture  To identify the key patents and their owners • The report does not include: – A juridic analysis of patent portfolios – Deep-link analysis (legal, juridic, etc.) between assignees • To summarize, this report’s goal is to analyze key patents and identify structural concepts from a technological or an industrial point of view, leading to business and strategic conclusions.
  • 5. © 2013 • 5 Copyrights © Yole Développement SA. All rights reserved. Yole’s standard reports • Market analysis • Technology analysis A New Report Type Providing a Clear Link Between the IP Situation and Market Evolutions • More than an analysis describing the state-of-the-art IP situation, this report is the missing link between patented technology solutions and market, technological and business trends – YOLE has developed a unique methodology in order to create a technical segmentation of the patent landscape and define which patents are the most innovative, either for future preparation or already in-production – By combining its technical knowledge, business understanding and patent search abilities, Yole was able to assemble a report rife with unique analysis and added-value – The in-depth technological analysis of patents contained in this report will provide a deep understanding of key players’ strategic decisions and positioning within the value chain Embedded IC Technological & Market Evolution Embedded IC IP landscape Yole’s new IP report • Relevant patent analysis • Technological segmentation • Detailed implementation architecture • Key patent identification • Links between patents and available products
  • 6. © 2013 • 6 Copyrights © Yole Développement SA. All rights reserved. Patent Analysis Definitions • Patent family – A patent family is a set of either patent applications or publications taken in multiple countries to protect a single invention by a common inventor(s) which is then patented in multiple countries. A first application is made in one country – the priority – and is then extended to other offices. • Assignee (or applicant) – The assignee is the person or organization (i.e. company, university) who/which filed a patent application. There may be more than one assignee per application. The assignee may also be the inventor. • Priority date – The priority date is the date on which the patent application was filed. On this date the patent document is protected from public viewing. • Priority Number – The priority number is the application number by which priority is claimed, i.e. it’s the same as the application number of the claimed priority document. The priority number consists of a country code (two letters), the filing year (four digits) and a serial number (variable, maximum seven digits). • Publication date – The publication date is the date on which the patent application was first published. It’s the date on which the patent document is made available to the public, thereby becoming “state-of-the-art”. • Publication number – The publication number is the number assigned to a patent application upon publication. Publication numbers are generally made up of a country code (two letters) and a serial number (variable, one to twelve digits – i.e. DE202004009768). • International Patent Classification (IPC) – Patent documents’ technical content is classified in accordance with International Patent Classification (IPC). The publishing office assigns an IPC symbol valid upon publication of the patent application. The complete IPC can be found on the World Intellectual Property Organization’s (WIPO) website: http://www.wipo.int/ipcpub).
  • 7. © 2013 • 7 Copyrights © Yole Développement SA. All rights reserved. Assumptions and Methodology (4/4) • These parameters enable us to evaluate patent potential in four dimensions: • The final patent potential is the average score of each parameter • A score between 1 - 10 is thus calculated for each dimension, and for global patent potential Patent dimensions Involved parameters Technology Tech. Infringement Capability/Innovation Type/Search Report (citations) Market Competitor Type/Geo. Protect./Market Size Duration Legal Status/Applicant Type/Life Expectancy Legal Legal Status/Geo. Protect./Search Report (citations)
  • 8. © 2013 Copyrights © Yole Développement SA. All rights reserved. Introduction to the Embedded IC Market and Technology Texas Instruments Nokia STATS ChipPAC AT&SInfineon
  • 9. © 2013 • 9 Copyrights © Yole Développement SA. All rights reserved. • Overall relevance of analyzed patents: Relevant 596 Related 125 Non-relevant 3,246 Overall Relevance of Analyzed Patents for Embedded IC Technology in 2012 Landscape Overview for Embedded IC Technologies Distribution of analyzed patents Yole Developpement © Dec. 2012 • ~ 80% of patents are marked « non-relevant » • 596 patent families will be further analyzed
  • 10. © 2013 • 10 Copyrights © Yole Développement SA. All rights reserved. Embedded Die Packaging SiP Module Capability Enables further simplification of board-level mounting to OEMs • Embedded die packaging is a great platform for moving to SiP module capabilities – Once the infrastructure for test, yield and volume manufacturing is in place, it’s likely we’ll see a lot of today’s SOC-designing fabless companies move to complex SiP module realizations, as they’ll benefit from cost-savings at the FE level, integration of more in-package value (i.e. passive integration) and higher electrical performance in RF, while simplifying board-level integration to the final customer (n+2) generation  Smaller die size  Lower “front-end” cost thanks to more advanced lithography, while integrating more functionalities  Simplification of PCB mother-board mounting + integration of EMI shielding at the package level  interesting from OEM perspective for much simpler board mounting  Enables realization of complex SiP modules, including active and discrete passive functions  very interesting for wireless IC players willing to integrate “more value” into their SiP modules PCB 0.5mm pitch RF Connectivity 40nm “Fan-in” WLCSP + Discrete passives on board + EMI shielding Embedded RF-SiP module PCB 0.5mm pitch RF Connectivity 28nm  OEM integrates many additional components “around” the main connectivity IC, making final board assembly quite complex:  Discrete passives  Additional active IC like local DC/DC converter components  Metal Cages to provide EMI shielding
  • 11. © 2013 • 11 Copyrights © Yole Développement SA. All rights reserved. Embedded Die Package Map of key players
  • 12. © 2013 • 12 Copyrights © Yole Développement SA. All rights reserved. Top 10 IPC Classes Used for Embedded IC Patents Top 10 International Patent Classification (IPC) Classes used in in Embedded IP Domain IPC Code Description No. of Patent Families H05K PRINTED CIRCUITS; CASINGS OR CONSTRUCTION DETAILS FOR ELECTRIC APPARATUS; MANUFACTURE OF ELECTRICAL COMPONENTS’ ASSEMBLAGES 514 H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR 433 B32B LAYERED PRODUCTS, i.e. PRODUCTS MADE OF FLAT OR NON-FLAT STRATA (i.e. CELLULAR OR HONEYCOMB FORM) 30 G06K DATA RECOGNITION; DATA PRESENTATION; RECORD CARRIERS; RECORD CARRIER HANDLING 17 H01K ELECTRIC INCANDESCENT LAMPS 14 B29C SHAPING OR JOINING OF PLASTICS; SHAPING OF SUBSTANCES IN A GENERAL PLASTIC STATE; AFTER-TREATMENT OF SHAPED PRODUCTS, i.e. REPAIRING 13 H01Q AERIALS 11 H01R ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS 11 B42D BOOKS; BOOK COVERS; LOOSE LEAVES; PRINTED MATTER OF SPECIAL FORMAT OR STYLE NOT OTHERWISE PROVIDED FOR; DEVICES FOR USE THEREWITH; MOVABLE-STRIP WRITING OR READING APPARATUS 10 H01G CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE- SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE 10
  • 13. © 2013 • 13 Copyrights © Yole Développement SA. All rights reserved. Top 10 Patent Assignees for Embedded IC Technologies • Around180 players are involved in embedded die technologies, but the top 10 assignees represent 53% of patents filed Top 10 Patent Assignees for Embedded Patents (includes relevant and related) Yole Developpement © December 2012 147 34 22 23 19 23 20 14 14 15 13 9 4 9 5 5 0 2 3 1 0 2 0 25 50 75 100 125 150 175 SEMCO (KR) ASE (TW) SAMSUNG (KR) UNIMICRON (TW) INTEL (US) IMBERA (FI) SHINKO (JP) MURATA (JP) LG INNOTEK (KR) DAEDUCK (KR) TDK (JP) No. of Patent Families Assignee Relevant Related
  • 14. © 2013 • 14 Copyrights © Yole Développement SA. All rights reserved. Evolution of Patent Assignees for Embedded IC Technologies • Numbers represent the number of published patent families. Panasonic, Shinko and Infineon are the early players, having been involved in Embedded die pre-2000. Panasonic has been inactive since 2007 • From the mid 2000’s, Semco is the main assignee. Over the last five years, Unimicron has emerged as new key player Evolution of Top 15 Assignees for Embedded Patents (incl. related and relevant) LG INNOTEK 3 11 1 DAEDUCK 5 5 4 1 UNIMICRON 2 3 6 3 8 6 SEMCO 21 33 12 14 29 29 18 MURATA 2 3 3 1 6 2 TDK 1 4 4 3 1 2 DENSO 1 1 3 1 3 2 AT&S 1 3 1 3 3 3 ASE 1 7 11 6 5 3 4 1 IMBERA 2 5 5 1 2 4 1 3 SAMSUNG 1 1 1 5 4 9 4 1 5 INTEL 1 3 1 1 2 1 1 8 6 INFINEON 1 1 2 2 1 3 1 SHINKO 1 2 5 4 5 1 4 PANASONIC 1 1 1 2 1 5 1982 1998 1999 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 Yole Developpement © December 2012
  • 15. © 2013 • 15 Copyrights © Yole Développement SA. All rights reserved. Publication Countries of Top 15 Assignees for Embedded IC Patents • Bubble size represents number of published patents (note that World (WO) and Europe (EP) country codes may hide a significant # of other countries). Semco mostly protected its innovations in Korea, the USA, Japan and China. Daeduck chose an IP strategy whereby its innovations are only protected in its originating country (Korea) -- contrary to Imbera, which opted for large geographic protection. Publication Countries of Top 15 assignees for Embedded Patents (incl. related and relevant) Yole Developpement © December 2012
  • 16. © 2013 • 16 Copyrights © Yole Développement SA. All rights reserved. Assignee Collaboration Network for Embedded IC Patent Filing • Patents co-filing in the corpus of selected patents for the embedded die domain • The black number is the number of co-filings • The white number is the assignee’s number of patent families Assignee Collaboration Network Yole Developpement © December 2012
  • 17. © 2013 • 17 Copyrights © Yole Développement SA. All rights reserved. Inventors/Assignees Collaboration Network for Embedded IC Technology Inventors/Assignees Collaboration Network (incl. related and relevant) • Assignees direct relationship (patents co-filing) and indirect relationship (via inventors) in the corpus of selected patents for the embedded die domain • The black number is the number of co-filings • The white number is the number of patent families for this assignee or inventor Yole Developpement © December 2012
  • 18. © 2013 • 18 Copyrights © Yole Développement SA. All rights reserved. Rohm Device: Main Process Steps and Related Patents Currently Used (2/3) Related patents and drawings • Described in • US2009/0218678 • EP1936675 • Mentioned in • EP1936676 • EP2019574 • JP2005-236039 • US2007/0141759 • US2012/0247819 • Described in • US2009/0218678 • EP1936675 • Mentioned in • EP1936676 • EP2019574 • JP2005-236039 • US2007/0141759 • US2012/0247819 • Described in • US2009/0218678 • EP1936675 • Mentioned in • EP1936676 • EP2019574 • JP2005-236039 • US2007/0141759 • US2012/0247819 • Described in • US2009/0218678 • EP1936675 • Mentioned in • EP1936676 • EP2019574 • JP2005-236039 • US2007/0141759 • US2012/0247819
  • 19. © 2013 Copyrights © Yole Développement SA. All rights reserved. Top Players Portfolio Analysis  SEMCO  ASE  Samsung  Unimicron  Intel  Imbera  Shinko  Murata  LG Innotek  daeduck
  • 20. © 2013 • 20 Copyrights © Yole Développement SA. All rights reserved. SEMCO’s Patent Portfolio for Embedded Die Technologies
  • 21. © 2013 • 21 Copyrights © Yole Développement SA. All rights reserved. SEMCO’s Patent Filing Evolution for Embedded Die Technologies (incl. relevant and related) SEMCO’s Patent Filing Evolution for Embedded IC Technology • SEMCO’s patent portfolio is composed of 156 patent families (147 relevant and 9 related) comprising 317 patents. Its embedded die patenting activity began in the mid-2000’s, growing to an average of about 25 patent filings per year between 2005 - 2010 Note: Data corresponding to the years 2011 and 2012 may be incomplete since a significant number of patent applications filed during these years may not have been published yet 6 30 21 18 33 15 23 1 3 3 2 1 0 5 10 15 20 25 30 35 40 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 No.ofpatentfamilies Priority year Related Relevant Yole Developpement © December 2012
  • 22. © 2013 • 22 Copyrights © Yole Développement SA. All rights reserved. Top SEMCO Inventors for Embedded Die Technologies (incl. relevant and related) Top SEMCO Inventors for Embedded IC • At SEMCO, about 160 inventors are involved in embedded die. HWAN DOO LEE is the leading inventor with 45 patent families. HYEON-SUK CHO has been inactive since 2007, while KYO YUL CHUNG and SUNG TAE JEONG are new inventors as of 2008 Filing year Inventor No. of patent families 2004 2005 2006 2007 2008 2009 2010 2011 LEE, DOO HWAN 45 3 8 11 5 4 6 8 KIM, MOON-IL 27 7 8 4 3 3 2 CHO, SUK-HYEON 26 5 13 8 CHUNG, YUL KYO 25 3 8 9 5 CHO, HAN-SEO 25 18 7 YOO, JE-GWANG 22 7 9 4 1 1 RYU, CHANG-SUP 21 5 14 1 1 LEE, JAE-KUL 16 4 5 2 2 2 1 BAEK, SANG JIN 14 6 3 4 1 JEONG, TAE SUNG 14 4 3 7 Yole Developpement © December 2012
  • 23. © 2013 • 23 Copyrights © Yole Développement SA. All rights reserved. SEMCO’s Patent Mapping for Chip Placement/Bonding By priority date 2004 KR20060078118 KR20060005840 2009 KR20100081073 US20110141711 US20100236821 KR20110021123 KR20100133768 US20100288535 TW201103385 US20110083892 US2011083891 US2011005823 2010 KR20120028010 US20110290540 KR20120028008 KR101085727 US20120160550 KR20120003658 KR20110101430 KR101085733 KR101067109 US2011216513 US2011214913 KR20120069452 2007 KR100820633 KR100867150 KR20070101183 KR20090062709 US2011179642 KR100832653 US2009071705 KR20090047318 KR100887685 US2010242272 KR100811034 CN101369574 2008 KR20100049769 KR20100000678 US20100012364 KR20100051310 US20100101847 US20090321118 US20090310323 KR20100001799 KR20090093449 KR20100021810 US20120134125 KR20090117237 US20100134991 US20100078204 US20100142170 KR20100059010 US2010013968 KR20100004248 KR20090132186 KR20090126537 US2012042513 US2010006203 US2012017435 US2011314667 2006 KR100789530 KR100789530 KR100769527 KR100771320 KR20070112985 KR100758229 KR100771319 KR100771306 KR100773985 KR100782405 KR100788213 FI20075593 2005 US20070074900 FI200600447 US20090268418 CN1886026 KR100653247 KR100651358 KR100643334 KR20070036341 KR100661296 KR20070000645 KR20070000644 KR100651568 KR100700922 US2010163291 KR100674293 KR100656751 KR20070023319 KR100728748 KR100651474 US2013042472 US2010154210 KR100673860