SPICE MODEL of MUSES8820 , PSpice Model in SPICE PARK
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SPICE MODEL of MUSES8820 , PSpice Model in SPICE PARK. English Version is http://www.spicepark.net. Japanese Version is http://www.spicepark.com by Bee Technologies.
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SPICE MODEL of MUSES8820 , PSpice Model in SPICE PARK
- 1. Device Modeling Report COMPONENTS: OPERATIONAL AMPLIFIER PART NUMBER: MUSES8820 MANUFACTURER: New Japan Radio REMARK TYPE: (OPAMP) Bee Technologies Inc. All Rights Reserved Copyright (c) Bee Technologies Inc. 2010 1
- 2. SPICE MODEL U1 OUT1 V+ V+ CH1 -IN1 - + OUT2 CH2 +IN1 + - -IN2 V- V- +IN2 MUSES8820 All Rights Reserved Copyright (c) Bee Technologies Inc. 2010 2
- 3. Output Voltage Swing Simulation result 20V VOH 0V VOL -20V -1.0V -0.5V 0V 0.5V 1.0V V(Out) V_VIN+ Evaluation circuit RL 2k U1 Out V+ VCC CH1 15Vdc - + CH2 + - 0 V- VEE MUSES8820 VIN- VIN+ -15Vdc 0 0Vdc 0 0 0 0 Comparison table Parameter Measurement Simulation %Error VOH (V) 13.500 13.497 -0.02 VOL (V) -13.500 -13.497 -0.02 All Rights Reserved Copyright (c) Bee Technologies Inc. 2010 3
- 4. Output Short Circuit Current Simulation result 100mA 50mA SEL>> 0A I(OH) 100mA 50mA 0A I(OL) Time Evaluation circuit OH U1 V+ VCC CH1 15Vdc - + CH2 + - 0 VOH V- VEE -15Vdc MUSES8820 VIN- VIN+ 0 0Vdc 1Vdc 0 0 0 0 OL U2 V+ VCC1 CH1 15Vdc - + CH2 + - 0 VOL V- VEE1 -15Vdc MUSES8820 VIN-1 VIN+1 0 1Vdc 0Vdc 0 0 0 0 Comparison table Parameter Measurement Simulation %Error IOH (mA) 50.000 50.075 0.15 IOL (mA) 50.000 50.075 0.15 All Rights Reserved Copyright (c) Bee Technologies Inc. 2010 4
- 5. Input Offset Voltage Simulation result 15V 12V 9V 6V 3V 0V -3V -6V -9V -12V -15V -4.0mV -3.0mV -2.0mV -1.0mV 0V 1.0mV 2.0mV 3.0mV V(OUT) V_VIN+ Evaluation circuit U1 OUT V+ VCC CH1 15Vdc - + CH2 + - 0 V- VIN+ MUSES8820 VEE -15Vdc Vcm 0Vdc 0 0 0 Comparison table Parameter Measurement Simulation %Error Vio (mV) 0.300 0.300 -0.01 All Rights Reserved Copyright (c) Bee Technologies Inc. 2010 5
- 6. Input Current Ib, Ibos Simulation result 100nA 80nA 60nA 40nA 20nA 0A ABS(I(U1:2)+I(U1:3))/2 ABS(I(U1:2)-I(U1:3)) Time Evaluation circuit U1 OUT V+ VCC CH1 15Vdc - + CH2 VIN+ + - 0 0.299966mV V- MUSES8820 VCM 0 0Vdc VEE -15Vdc 0 0 Comparison table Parameter Measurement Simulation %Error Iio (nA) 5.000 5.003 0.05 Ib (nA) 100.000 100.012 0.01 All Rights Reserved Copyright (c) Bee Technologies Inc. 2010 6
- 7. Slew Rate Simulation result 6.0V 2.0V 1 2 5.0V 1.0V 4.0V 0V 3.0V -1.0V 2.0V -2.0V 1.0V -3.0V 0V -4.0V -1.0V -5.0V >> -2.0V -6.0V 8us 9us 10us 11us 12us 13us 14us 15us 16us 17us 18us 1 V(Output) 2 V(Input) Time Evaluation circuit U1 Output VCC V+ 15Vdc CH1 - + CH2 CL RL + - Input 0 10p 2k V- MUSES8820 V1 = -1 Vi 0 V2 = 1 TD = 10u VEE TR = 10n -15Vdc 0 0 TF = 10n PW = 5u PER = 500u 0 0 Comparison table Parameter Measurement Simulation %Error Slew Rate (V/us) 5.000 4.925 -1.50 All Rights Reserved Copyright (c) Bee Technologies Inc. 2010 7
- 8. Open loop voltage gain Simulation result 120 100 80 60 40 20 0 1.0Hz 10Hz 100Hz 1.0KHz 10KHz 100KHz 1.0MHz 10MHz DB(V(Output)/V(Input)) Frequency Evaluation circuit U1 Output VCC V1 V+ 15Vdc Input CH1 - + CH2 CL1 RL1 1uVac + - 0 100p 10k 0Vdc Vcm V- 0Vdc MUSES8820 0 VEE -15Vdc 0 0 0 0 Comparison table Parameter Measurement Simulation %Error AV (db) 110.000 109.914 -0.08 All Rights Reserved Copyright (c) Bee Technologies Inc. 2010 8
- 9. Common-mode rejection voltage gain Simulation result 50mV 0V -50mV 0s 1.0s 2.0s 3.0s 4.0s 5.0s V(Output) Time Evaluation circuit U1 Output VCC V+ 15Vdc Input CH1 - + CH2 + - CL1 RL1 0 100p 2k V1 Vio V- 0.299966mVdc VAMPL = 0.05 MUSES8820 FREQ = 1 0 VEE V2 -15Vdc 0Vdc 0 0 0 0 Comparison table Common mode gain = 0.961 V/V CMRR = 20*log10(316627/0.961) = 110.356 Parameter Measurement Simulation %Error CMRR(dB) 110.000 110.356 0.32 All Rights Reserved Copyright (c) Bee Technologies Inc. 2010 9
- 10. Supply Current Simulation result 12mA 10mA 8mA 6mA 4mA 2mA 0A 0V 2V 4V 6V 8V 10V 12V 14V 16V 18V I(U1:8) V_VCC1 Evaluation circuit U1 VCC1 V+ 15Vdc CH1 - + CH2 R3 + - 1G V- R4 R5 1G MUSES8820 1G R6 1G VEE1 0Vdc 0 0 0 0 0 0 Comparison table Parameter Measurement Simulation %Error ICC (mA) 7.600 7.641 0.54 All Rights Reserved Copyright (c) Bee Technologies Inc. 2010 10
- 11. Power supply rejection ration Simulation result 150 100 50 0 1.0Hz 10Hz 100Hz 1.0KHz 10KHz 100KHz 1.0MHz db(v(in)/v(out)) Frequency Evaluation circuit V1 U1 out in VCC V+ 15Vdc CH1 - + 1Vac CL CH2 0Vdc + - 200p V- MUSES8820 VEE -15Vdc 0 0 0 0 0 Comparison table Parameter Measurement Simulation %Error PSRR (dB) 110.000 109.992 -0.01 All Rights Reserved Copyright (c) Bee Technologies Inc. 2010 11
- 12. Input common-mode voltage range Simulation result 15V 10V 5V 0V -5V -10V -15V -15V -10V -5V 0V 5V 10V 15V V(OUT) V_VIN Evaluation circuit U1 OUT VCC V+ 15Vdc CH1 - + Rf 10MEG CH2 + - V- Cf R5 10 MUSES8820 1G VIN R6 0Vdc VEE 1G -15Vdc 0 0 0 0 0 Comparison table Parameter Measurement Simulation %Error Vicm (V) 27.000 27.153 0.57 All Rights Reserved Copyright (c) Bee Technologies Inc. 2010 12
- 13. Gain Bandwidth Product Simulation result 60 180d 1 2 40 120d 20 60d 0 0d -20 -60d -40 -120d >> -60 -180d 1.0KHz 10KHz 100KHz 1.0MHz 10MHz 1 DB(V(OUT)/V(IN)) 2 P(V(OUT))-180 Frequency Evaluation circuit U1 OUT V+ CH1 - + RL 2k Rf CH2 + - 100k Ri 1k VCC V- IN 15V CL MUSES8820 0 10p Vin 1uVac VEE Vcm -15V 0 0 0 0 0 Comparison table VCC=15[V], VEE=-15[V], Av=40[dB] Parameter Measurement Simulation %Error Ft (MHz) 5.800 5.711 -1.54 Phase margin () 48.000 46.969 -2.15 All Rights Reserved Copyright (c) Bee Technologies Inc. 2010 13