Unblocking The Main Thread Solving ANRs and Frozen Frames
SPICE MODEL of NJM2059 in SPICE PARK
1. Device Modeling Report
COMPONENTS: OPERATIONAL AMPLIFIER
PART NUMBER: NJM2059
MANUFACTURER: NEW JAPAN RADIO
REMARK TYPE: (OPAMP)
Bee Technologies Inc.
All Rights Reserved Copyright (c) Bee Technologies Inc. 2006
2. Spice Model
A D
- +
- +
- + - +
B C
NJM2059
All Rights Reserved Copyright (c) Bee Technologies Inc. 2006
3. Output Voltage Swing
Simulation result
20V
0V
-20V
-10V -5V 0V 5V 10V
V(Vout)
V_V1
Evaluation circuit
Rload
10k Vout
A D
- +
- +
V-
V1 V+
- +
- +
0Vdc -15Vdc
B C
15Vdc
NJM2059
0 0
Output Voltage Swing Data sheet Simulation %Error
+Vout(V) +14.000 13.995 0.035
-Vout(V) -14.000 -13.995 0.035
All Rights Reserved Copyright (c) Bee Technologies Inc. 2006
4. Input Offset Voltage
Simulation result
14.6V
10.0V
0V
-10.0V
-14.6V
-7.0mV -6.0mV -5.0mV -4.5mV
V(Vout)
V_Vin
Evaluation circuit
Rload
10k Vout U9
A D
- +
- +
Vin Vi
VOFF = 0 VOFF = 0
VAMPL = 0 VAMPL = 0 V+
- +
- +
FREQ = 0 FREQ = 0
B C
AC = 0 AC = 0 V-
DC = 0 DC = 0 15Vdc
NJM2059
-15Vdc
0 0
Measurement Simulation Error
Vos
6 mV 6.0204 mV 0.34 %
All Rights Reserved Copyright (c) Bee Technologies Inc. 2006
5. Slew Rate
Simulation result
10V
0V
-10V
-20V
0s 5us 10us
V(Vout)
Time
Evaluation circuit
Rload
2k Vout U14
A D
- +
- +
V1 = 0 Vi
V2 = 14
TD = 0
TR = 10n Vin
TF = 10n VOFF = 0
PW = 5u VAMPL = 0 V+ V-
- +
- +
PER = 500u FREQ = 0
V2AC = 0 B C
-6.0204m DC = 0 15Vdc -15Vdc
NJM2059
0 0
Data sheet Simulation %Error
Slew Rate(v/us)
2.000 2.081 4.050
All Rights Reserved Copyright (c) Bee Technologies Inc. 2006
6. Input current
Simulation result
24nA
20nA
16nA
0s 0.5ms 1.0ms
I(Vi) I(Vin)
Time
Evaluation circuit
Rload
2k Vout U13
A D
- +
- +
VOFF = -6.0204m
Vi Vin
VOFF = 0
VAMPL = 0 VAMPL = 0 V+ V-
FREQ = 0 FREQ = 0 - + - +
B C
AC = 0 AC = 0
DC = 0 DC = 0 15Vdc -15Vdc
NJM2059
0 0
Data sheet Simulation %Error
Ib(nA) 20.000 20.418 2.090
Ibos(nA) 5.000 5.170 3.400
All Rights Reserved Copyright (c) Bee Technologies Inc. 2006
7. Open Loop Voltage Gain vs. Frequency
Simulation result
100
50
0
1.0Hz 1.0KHz 1.0MHz 30MHz
DB(V(Vout)/V(Vin:+))
Frequency
Evaluation circuit
Vout U15
A D
- +
- +
Vin Vi V+
VOFF = 0 VOFF = 0 - + - +
V-
B C
VAMPL = 0 VAMPL = 0
FREQ = 0 FREQ = 0 15Vdc
AC = 1m AC = 0 -15Vdc
NJM2059
DC = -6.0204m DC = 0
0
Data sheet Simulation %Error
f-0dB(MHz) 6.000 5.944 0.933
Av-dc(dB) 100.000 99.972 0.028
All Rights Reserved Copyright (c) Bee Technologies Inc. 2006
8. Common-Mode Rejection Voltage gain
Simulation result
2.0V
0V
-2.0V
0s 1.0s 2.0s 3.0s 4.0s
V(Vout)
Time
Evaluation circuit
Vout U13
A D
- +
- +
-6.0207mVdc
V1
V+ V-
- + - +
B C
V
VOFF = 0 15Vdc -15Vdc
VAMPL = 0.5
NJM2059
FREQ = 1
AC = 0
DC = 0
0
Common Mode Rejection Ratio=99678/3.171=31434.247
Data sheet Simulation %Error
CMRR
90 89.948 -0.057
All Rights Reserved Copyright (c) Bee Technologies Inc. 2006