SlideShare a Scribd company logo
1 of 7
Download to read offline
EE Dept CIIT Islamabad 1
Abstract—This report presents the design methodology,
simulation results and implementation details of an LNA at
900MHz RF frequency. The LNA is designed to work on
bandwidth of GSM system. Destined to be unconditionally stable
and work over a considerable bandwidth of about 300MHz with
gain of over 10dB and Noise Figure of less than 4, the achieved
results conformed quite well to the specifications. Final results
include a gain of 12 dB at the center frequency with a nominal
variation of ±1.3dB over the desired bandwidth. The Noise Figure
obtained was 3.9dB, evidence of a compromise between Noise
Figure and unconditional stability. Very high degree of linearity
was achieved with output one-dB compression at +15dB and
output third order intercept at +46dB.
The report contains extensive graphical and tabular
representation of results at every stage of design, simulation and
implementation along with an explanation of increased Noise
Figure in exchange for unconditional stability
Index Terms—Amplifier, noise figure, Low noise, Stability,
Impedance matching
I. INTRODUCTION
Low noise amplifiers (LNAs) are used in wide range in
wireless communications. RF receivers have a LNA at their
front-end. It is a special type of electronic amplifier which is
used in communication systems.
A low noise amplifier is a device that amplifies incoming
electronic signal while introducing little noise of its own.
Because of this property (high amplification but low noise
injection). It is usually placed as the first component in a
receiver chain. Low noise amplifier (LNA) is also used in both
commercial and military applications such as cellular phones,
WLANs, Doppler radars and signal interceptors. Depending
upon the system in which they are used, LNAs can be
implemented using different design topologies. The systems
deployed in commercial applications aim toward high
integration, and low voltage and bias currents.
Before going through, the title of this project define word by
word, Low noise amplifiers (LNAs) is that amplifying the
signal plus bring minimal amount of noise to the signal. The
aim of this project is to achieve maximum gain while
minimizing the noise and distortion as possible. Gain of the
amplifier is expressed as:
Stability, Noise figure, Impedance matching are some
important elements in Low noise amplifier design. Although
these elements are not much dependant on each other but
tradeoff between these elements must be understood while
designing a Low noise amplifier. Noise figure of two port
amplifier is expressed as
The scope of this project is to design a low noise amplifier
for GSM application. The LNA is designed to operate at a
frequency of 900MHz. The report presents the simulation, test
results and analysis for the designed of LNA. The performance
of the LNA is analyzed on the advance simulators.
II. LOW NOISE AMPLIFIER CIRCUIT DESIGN
Design and simulation of the LNA is accomplished by using
advance simulators. Use the transistor BFG135 and simulate
the S parameter file only. The simulation process consists of 4
stages. In each stage a single design is being implemented.
Whereas in every next stage, the previously designed LNA is
being customized to achieve the best results. The results, such
as gain, noise figure at each stage are also compared. Coming
up with different software models for the transistor, which
would also include searching for manufacturer datasheets and
s-parameter files with noise data on the internet. For the
Design and Implementation of Low Noise
Amplifier at 900MHz
Abdus Sami(samihundal@gmail.com), Nauman Azeem, Shabir Ahmad
COMSATS Institute of Information and Technology Islamabad, Pakistan
EE Dept CIIT Islamabad 2
Design of a biasing network include the DC blocking
capacitors and RF chokes.
A. Biasing circuit Design
The supply voltage was standardized at 12 VDC. With
proper design of biasing resistors, desired operating voltage
and current (Vce = 10Vdc and Ic =100mA DC) were achieved.
In Figure.2 the values of resistors R1 and R2 are 20℩ and
12.09K℩. DC blocking capacitors (C2 and C4) ensure that
none of the DC current flows away from the transistor in the
RF path. C7 is a filtering capacitor that grounds any high
frequency ripple from the DC power supply (VCC). The
values of C2, C4 and C7 are 10uF, 10uF and 18pF
respectively. The RF chokes (L1 and L2) ensure that no RF
signal flows into the DC biasing circuit. The RF chokes should
be designed to keep out our center frequency from the DC
biasing network. The values of RF Chokes are calculated from
the formula:
XL = 2πf(L) (3)
According to this formula the value of RF Chokes is 45nH;
however, during simulation it was observed that it is possible
to tune all the reactive components simultaneously for
maximum gain.
B. Stability sub circuit Design
The LNA should be unconditionally stable from 0Hz to
. Here is equal to the maximum frequency of
oscillation of our transistor, BFG135. The maximum limit of
frequency range up to 3GHz (It is safe to assume that if the
LNA is stable up to 3GHz, at higher frequencies. The losses of
the components and transmission line segments are so high
that the reduced gain will negate any possibility of instability).
There are two types of tests to check the stability of LNA (K-Δ
test and ” test). The test used for the measurement of the
stability of LNA is derived stability factor ”.
(4)
The simulation results of LNA show that the LNA is
unstable below 500MHz frequency (”<1) (Fig.8). One idea is
to add a shunt resistance in the output circuit and tune all
component values again to achieve best gain, noise figure and
unconditional stability.
C. Matching Circuit Design
The amplifier should be impedance matched perfectly to 50
ohms at input and output around 900MHz. However, there are
usually two methods by which impedance matching can be
done, each with its unique advantage. It is possible to either
match for maximum gain, using technique of simultaneous
conjugate matching, or minimum noise figure using noise and
available gain circles. In this project, it was decided to match
the LNA for maximum gain using the principle of
simultaneous conjugate matching (even though some designers
may recommend using noise matching at input and gain
matching at output). For this ‘matched’ source and load
reflection co-efficient (Γms and Γml) should be plotted on
Smith-Chart. Once these are plotted, it is possible to find their
value at the center frequency and match 50Ω input and output
terminations to complex conjugates of these reflection co-
efficient. In this design we can note that we used only input
matching network and output impedance was automatically
matched to 50Ohms so we don’t need an output matching
network.
For input impedance matching, the input impedance was
plotted on smith chart and by using appropriate LC circuit
input impedance was matched to 50Ohms as shown in figure.1
:
Figure.1 Matching Circuit design using Smith chart
However, after continuous tuning of all parameters to
achieve best noise figure and gain, the matching components
no longer retained their designed values. Once the passive
matching components are derived, they are inserted in the
correct order starting from source and load impedances. Then
the schematic components are again tuned for best gain, noise
figure and stability. The values of inductor and capacitor for
the matching circuit are calculated from smith chart and the
values for inductor and capacitor are 5.6nH and 6.24pF
respectively. The schematic obtained after inserting the
matching components is shown in Figure.2:
EE Dept CIIT Islamabad 3
Figure.2 Low Noise Amplifier Design
D. Transmission Line Effects
After the layout is prepared, there is still one effect that is
not yet taken into consideration; effect of transmission line
segments in the RF path. What this means is that, even though
none of the conductors was designed to be a transmission line
segment, when RF signals pass through the copper conductor,
the losses of copper conductor affect the results (effect is
directly proportional to the length of the transmission line
segment) have to be taken into account. Although simulation
results don’t show significant change in gain but losses of
copper conductor have a little affect on Noise figure. In the
schematic, replace all copper conductors joining two
components in the RF path with transmission line segments of
length equal to the distance between the components and width
equal to the width of the copper conductor. The width and
length information can be obtained from the layout by placing
a SCALE at any conductor that is to be measured. Once all
such copper conductor segments in the RF path were replaced
with their transmission line equivalents, the LNA was
simulated again and then tune the passive components again
for maximum gain. It is not possible to completely model all
transmission line effects. The schematic after inserting
transmission lines is shown in Figure.3.
Figure.3 Transmission line effects
III. HARDWARE IMPLEMENTATION
After the completion of design stage of LNA, second phase
is hardware implementation. In this phase the layout design is
the first step for hardware implementation of LNA. Following
are the steps for layout design and hardware implementation of
LNA: Make a list of all passive components that required on a
piece of paper. Now, include ‘SMT-PAD’ from the library of
simulation software in the schematic and in the properties for
this ‘SMT-PAD’ object specify the size of the various
dimensions by checking for the same component in their
respective MuRata datasheets. If more than one size
components are needed, include one ‘SMT-PAD’ object for
every size and once again fill all dimension data. For every
passive component, in its properties, include one of these PAD
objects according to the size available in the lab. Now once all
components are assigned their respective size PADs, generate
the layout in simulation software. Straighten out the layout and
keep distance between components as small as possible so that
overall size of LNA is optimum. However, do not keep
components too close otherwise their pads will merge during
etching. Assign proper width to the RF path and DC signal
paths. RF paths from input RF connector to the first
component and from the last component to the output RF
connector should be a 50 ohm transmission line (for FR4 the
width come to about 2.96mm). Once the layout is done, create
the artwork which will create a plan showing just the copper
area and non-copper area. Print this artwork on a transparency.
Layout is shown in figure.4:
EE Dept CIIT Islamabad 4
Figure.4 Layout Design
Take a small piece of PCB board. Cut the PCB board of size
that can fit the layout and remove the blue plastic covering
from only one side. Now place the artwork transparency on the
exposed copper and photo-process the copper in the photo
etching machine. Then wear all the protective gear to protect
from harmful acids and other chemicals. The PCB has to be
‘washed’ in two liquid solutions: one, the developer and
second, a mix of water, hydrochloric acid (HCL) and hydrogen
peroxide. First, place the photo-processed PCB in the
developer and wait until the purple layer is completely
removed. The outline of the layout will now appear on the
PCB. Place this in the second solution and shake the container
to speed the chemical reaction between HCL and copper on
the PCB. Only that portion which was exposed to light is
removed by the acid, thus keeping the copper tracts of the
circuit schematic unharmed. Now that the PCB is ready, it is
roughened on both sides with sandpaper and holes are drilled
in the ground pads. Now all that is left is to solder the
components in their respective places.
After soldering the components final hardware is shown in
figure.5:
Figure.5 Low Noise Amplifier hardware implementation
IV. SIMULATION RESULTS
Given below are the simulation results for the LNA
designed.
A. Gain
Simulation results show that small signal gain of the LNA is
12.043dB at 900MHz(Figure.6)
Figure.6 Gain of LNA
Noise Figure
Simulation results show that noise figure for the LNA
designed is 3.93 (Figure.7)
Figure.7 Noise figure of LNA
Stability factor(”)
Stability factor measured for biasing circuit is show in
figure.8. Results show that ‘”’ is greater than 1 for almost
complete frequency range but below 348MHz frequency the
value of stability factor(”) is less than one which shows that
network is not unconditionally stable so we need to apply a
stability sub circuit.
After applying stability sub circuit the results are shown in
Figure.9. Results show that the stability factor(”) is greater
than 1 for complete frequency range which is the condition for
unconditional stability.
After applying the matching circuit the stability measure was
enhanced because of less value of return loss, results are
shown in Figure.10
EE Dept CIIT Islamabad 5
Figure.8 Stability factor ‘”’ of LNA for biasing nework
Figure.9 Stability factor ‘”’ of LNA After applying
stability sub circuit
Figure.10 Stability factor ‘”’ of LNA after applying
matching network
B. Reflection coefficients
Value of input and output reflection coefficients before
applying matching circuit are shown on smith chart in
Figure.11 and Figure.12
Figure.11 Input reflection coefficient before applying
matching network
Figure.12 output reflection coefficient before applying
matching network
Results shows that input and output is not 50℩ matched
so we need to apply appropriate LC circuit for impedance
matching.
After applying matching network the value of input and
output reflection coefficients on smith chart and linear scale
(Figure.13, 14, 15, 16). Smith chart results show that input
is exactly matched to 50℩ and output is also matched but not
exactly matched to 50℩. Linear scale results show that value
of reflection coefficient at 900MHz is -38.56dB and the
frequency range for which value of reflection coefficient is
less than -10dB is bandwidth of LNA designed which is
305MHz from 782MHz to 1.087GHz.
Figure.13 Input reflection coefficient after applying
matching network
EE Dept CIIT Islamabad 6
Figure.14 output reflection coefficient after applying
matching network
Figure.15 Input reflection coefficient after applying
matching network
Figure.16 Output reflection coefficient after applying
matching network
C. Non-linear simulation results
Active RF devices are ultimately non-linear in operation
When driven with a large enough RF signal the device will
generate undesirable signals. If an amplifier is driven hard
enough the output power will begin to roll off resulting in a
drop of gain known as gain compression. The point at which
gain of LNA drops 1dB from its linear Gain is called 1dB
compression point and Output power at which 3rd
order
intermodulation distortion products become equal in amplitude
to the main signal power is called third order intercept point
OIP3.
Figure.17 Shows the gain compression point of LNA and
input power which corresponds to 1dB compression point is
15.55dB. Figure.18 Shows the results for two tone test for
third order intercept point and the value of 3rd order intercept
point is 46.44dBm.
Figure.17 1dB Compression point
Figure.18 OIP3
V. CONCLUSION
In conclusion, an RF LNA at 900MHz was designed,
simulated, and built. The LNA specifications are shown in
Table.. However, there is a fitting explanation for high
Noise figure; the amplifier has a relatively high gain – to
achieve this gain and yet keep the amplifier inherently stable
over all frequencies is a difficult requirement. The only
suitable method for satisfying both these divergent
specifications simultaneously was to use a series resistor in the
input of the transistor. This series resistance has its own
undesirable side-effects, notably increase in the noise figure of
the entire LNA.
However, this research work has taught a great deal about RF
circuit design and implementation. It taught about the
EE Dept CIIT Islamabad 7
dynamics and relations between the different constituent
blocks of an RF system and how each component affects (or
does not affect!) the overall output.
Another learning is that, simulation software are mainly for
understanding these inter-block dynamics and not for
calculating the final values of the components unless ALL
parasitic and other similar RF effects are accounted for. Trial
and error in the final implementation stage is just as important
for obtaining optimum results; where the simulation software
predicts in which direction (greater or lower) should the next
trial component be
chosen.
ACKNOWLEDGMENT
First of all, we thank Allah All-Mighty for giving us the
strength and paving new ways for us. We would like to express
our deepest of gratitude to Mr. Haider Ali for his constant
encouragement and belief in us. He has been everything that a
group could wish for in a supervisor.
We are thankful to Mr. Safwan Khalid who has been extremely
helpful to us both inside and outside the institute premises. Our
classmate Mr. Waseem Ali deserves our thanks for going
through the theoretical work, research work and assisting us in
simulation phase of our project. We also appreciate the help of
our senior course mates who were helping us during the
hardware implementation of the project. Thanks to Dr. Syed
Irfan Ahmed for reviewing our thesis and providing us with
valuable suggestions. Finally, we would like to thank our
parents for their unconditional love and the faith which they
posses in us.
REFERENCES
[1] Microwave engineering 3rd
Ed by David M.pozar
[2] http://en.wikipedia.org/wiki/Low_noise_amplifier
[3] http://en.wikipedia.org/wiki/OIP3
[4] http://en.wikipedia.org/wiki/Gain_compression
[5] http://www.downeastmicrowave.com/PDF/IP3.PDF
[6] http://comsec.com/usrp/microtune/NF_tutorial.pdf
[7] Aleksandar Tasić. "PERFORMANCE PARAMETERS
OF RF CIRCUITS", Analog Circuits and Signal Processing
Series, 2006
[8] Domine Leenaerts, Jos Bergervoet, Jan-Willem Lobeek,
Marek Schmidt-Szalowski“900MHz/1800MHz GSM Base
Station LNA with Sub-1dB Noise Figure and +36dBm OIP3”
NXP Semiconductors, Eindhoven, 5656AE, the Netherlands

More Related Content

What's hot

A novel cmos model design for 2 6 g hz wideband lna input matching using resi...
A novel cmos model design for 2 6 g hz wideband lna input matching using resi...A novel cmos model design for 2 6 g hz wideband lna input matching using resi...
A novel cmos model design for 2 6 g hz wideband lna input matching using resi...IAEME Publication
 
Ultra-low power 0.45 mW 2.4 GHz CMOS low noise amplifier for wireless sensor ...
Ultra-low power 0.45 mW 2.4 GHz CMOS low noise amplifier for wireless sensor ...Ultra-low power 0.45 mW 2.4 GHz CMOS low noise amplifier for wireless sensor ...
Ultra-low power 0.45 mW 2.4 GHz CMOS low noise amplifier for wireless sensor ...journalBEEI
 
Design and Implementation of a Low Noise Amplifier for Ultra Wideband Applica...
Design and Implementation of a Low Noise Amplifier for Ultra Wideband Applica...Design and Implementation of a Low Noise Amplifier for Ultra Wideband Applica...
Design and Implementation of a Low Noise Amplifier for Ultra Wideband Applica...IOSRJVSP
 
An Ultra-Low Voltage, Wideband Low Noise Amplifier Design Technique
An Ultra-Low Voltage, Wideband Low Noise Amplifier Design TechniqueAn Ultra-Low Voltage, Wideband Low Noise Amplifier Design Technique
An Ultra-Low Voltage, Wideband Low Noise Amplifier Design TechniqueIRJET Journal
 
E05322730
E05322730E05322730
E05322730IOSR-JEN
 
Poster_140320705506
Poster_140320705506Poster_140320705506
Poster_140320705506Patel Neel
 
Power Efficiency Improvement in CE-OFDM System With 0 dB IBO for Transmission...
Power Efficiency Improvement in CE-OFDM System With 0 dB IBO for Transmission...Power Efficiency Improvement in CE-OFDM System With 0 dB IBO for Transmission...
Power Efficiency Improvement in CE-OFDM System With 0 dB IBO for Transmission...CSCJournals
 
Paper id 312201516
Paper id 312201516Paper id 312201516
Paper id 312201516IJRAT
 
Review on Design and Performance Analysis of Low Power Transceiver Circuit in...
Review on Design and Performance Analysis of Low Power Transceiver Circuit in...Review on Design and Performance Analysis of Low Power Transceiver Circuit in...
Review on Design and Performance Analysis of Low Power Transceiver Circuit in...iosrjce
 
Frequency Shit Keying(FSK) modulation project report
Frequency Shit Keying(FSK) modulation project reportFrequency Shit Keying(FSK) modulation project report
Frequency Shit Keying(FSK) modulation project reportMd. Rayid Hasan Mojumder
 
Linear CMOS LNA
Linear CMOS LNALinear CMOS LNA
Linear CMOS LNAijtsrd
 
Mk2420552059
Mk2420552059Mk2420552059
Mk2420552059IJERA Editor
 
DESIGN AND NOISE OPTIMIZATION OF RF LOW NOISE AMPLIFIER FOR IEEE STANDARD 802...
DESIGN AND NOISE OPTIMIZATION OF RF LOW NOISE AMPLIFIER FOR IEEE STANDARD 802...DESIGN AND NOISE OPTIMIZATION OF RF LOW NOISE AMPLIFIER FOR IEEE STANDARD 802...
DESIGN AND NOISE OPTIMIZATION OF RF LOW NOISE AMPLIFIER FOR IEEE STANDARD 802...VLSICS Design
 
LOW POWER, LOW NOISE AMPLIFIERS DESIGN AND ANALYSIS FOR RF RECEIVER FRONT END...
LOW POWER, LOW NOISE AMPLIFIERS DESIGN AND ANALYSIS FOR RF RECEIVER FRONT END...LOW POWER, LOW NOISE AMPLIFIERS DESIGN AND ANALYSIS FOR RF RECEIVER FRONT END...
LOW POWER, LOW NOISE AMPLIFIERS DESIGN AND ANALYSIS FOR RF RECEIVER FRONT END...VLSICS Design
 
Design and Realization of 2.4GHz Branch-line Coupler
Design and Realization of 2.4GHz Branch-line CouplerDesign and Realization of 2.4GHz Branch-line Coupler
Design and Realization of 2.4GHz Branch-line CouplerQuang Binh Pham
 
A Novel Configuration of a Microstrip Microwave Wideband Power Amplifier for ...
A Novel Configuration of a Microstrip Microwave Wideband Power Amplifier for ...A Novel Configuration of a Microstrip Microwave Wideband Power Amplifier for ...
A Novel Configuration of a Microstrip Microwave Wideband Power Amplifier for ...TELKOMNIKA JOURNAL
 
DESIGN OF 2.4 GHZ MMIC FEED FORWARD AMPLIFIER FOR WIRELESS APPLICATIONS
DESIGN OF 2.4 GHZ MMIC FEED FORWARD AMPLIFIER FOR WIRELESS APPLICATIONS DESIGN OF 2.4 GHZ MMIC FEED FORWARD AMPLIFIER FOR WIRELESS APPLICATIONS
DESIGN OF 2.4 GHZ MMIC FEED FORWARD AMPLIFIER FOR WIRELESS APPLICATIONS jmicro
 
DESIGN OF 2.4 GHZ MMIC FEED FORWARD AMPLIFIER FOR WIRELESS APPLICATIONS
DESIGN OF 2.4 GHZ MMIC FEED FORWARD AMPLIFIER FOR WIRELESS APPLICATIONSDESIGN OF 2.4 GHZ MMIC FEED FORWARD AMPLIFIER FOR WIRELESS APPLICATIONS
DESIGN OF 2.4 GHZ MMIC FEED FORWARD AMPLIFIER FOR WIRELESS APPLICATIONSjmicro
 

What's hot (20)

A novel cmos model design for 2 6 g hz wideband lna input matching using resi...
A novel cmos model design for 2 6 g hz wideband lna input matching using resi...A novel cmos model design for 2 6 g hz wideband lna input matching using resi...
A novel cmos model design for 2 6 g hz wideband lna input matching using resi...
 
Ultra-low power 0.45 mW 2.4 GHz CMOS low noise amplifier for wireless sensor ...
Ultra-low power 0.45 mW 2.4 GHz CMOS low noise amplifier for wireless sensor ...Ultra-low power 0.45 mW 2.4 GHz CMOS low noise amplifier for wireless sensor ...
Ultra-low power 0.45 mW 2.4 GHz CMOS low noise amplifier for wireless sensor ...
 
T044069296
T044069296T044069296
T044069296
 
Design and Implementation of a Low Noise Amplifier for Ultra Wideband Applica...
Design and Implementation of a Low Noise Amplifier for Ultra Wideband Applica...Design and Implementation of a Low Noise Amplifier for Ultra Wideband Applica...
Design and Implementation of a Low Noise Amplifier for Ultra Wideband Applica...
 
An Ultra-Low Voltage, Wideband Low Noise Amplifier Design Technique
An Ultra-Low Voltage, Wideband Low Noise Amplifier Design TechniqueAn Ultra-Low Voltage, Wideband Low Noise Amplifier Design Technique
An Ultra-Low Voltage, Wideband Low Noise Amplifier Design Technique
 
E05322730
E05322730E05322730
E05322730
 
Poster_140320705506
Poster_140320705506Poster_140320705506
Poster_140320705506
 
Power Efficiency Improvement in CE-OFDM System With 0 dB IBO for Transmission...
Power Efficiency Improvement in CE-OFDM System With 0 dB IBO for Transmission...Power Efficiency Improvement in CE-OFDM System With 0 dB IBO for Transmission...
Power Efficiency Improvement in CE-OFDM System With 0 dB IBO for Transmission...
 
O01052126130
O01052126130O01052126130
O01052126130
 
Paper id 312201516
Paper id 312201516Paper id 312201516
Paper id 312201516
 
Review on Design and Performance Analysis of Low Power Transceiver Circuit in...
Review on Design and Performance Analysis of Low Power Transceiver Circuit in...Review on Design and Performance Analysis of Low Power Transceiver Circuit in...
Review on Design and Performance Analysis of Low Power Transceiver Circuit in...
 
Frequency Shit Keying(FSK) modulation project report
Frequency Shit Keying(FSK) modulation project reportFrequency Shit Keying(FSK) modulation project report
Frequency Shit Keying(FSK) modulation project report
 
Linear CMOS LNA
Linear CMOS LNALinear CMOS LNA
Linear CMOS LNA
 
Mk2420552059
Mk2420552059Mk2420552059
Mk2420552059
 
DESIGN AND NOISE OPTIMIZATION OF RF LOW NOISE AMPLIFIER FOR IEEE STANDARD 802...
DESIGN AND NOISE OPTIMIZATION OF RF LOW NOISE AMPLIFIER FOR IEEE STANDARD 802...DESIGN AND NOISE OPTIMIZATION OF RF LOW NOISE AMPLIFIER FOR IEEE STANDARD 802...
DESIGN AND NOISE OPTIMIZATION OF RF LOW NOISE AMPLIFIER FOR IEEE STANDARD 802...
 
LOW POWER, LOW NOISE AMPLIFIERS DESIGN AND ANALYSIS FOR RF RECEIVER FRONT END...
LOW POWER, LOW NOISE AMPLIFIERS DESIGN AND ANALYSIS FOR RF RECEIVER FRONT END...LOW POWER, LOW NOISE AMPLIFIERS DESIGN AND ANALYSIS FOR RF RECEIVER FRONT END...
LOW POWER, LOW NOISE AMPLIFIERS DESIGN AND ANALYSIS FOR RF RECEIVER FRONT END...
 
Design and Realization of 2.4GHz Branch-line Coupler
Design and Realization of 2.4GHz Branch-line CouplerDesign and Realization of 2.4GHz Branch-line Coupler
Design and Realization of 2.4GHz Branch-line Coupler
 
A Novel Configuration of a Microstrip Microwave Wideband Power Amplifier for ...
A Novel Configuration of a Microstrip Microwave Wideband Power Amplifier for ...A Novel Configuration of a Microstrip Microwave Wideband Power Amplifier for ...
A Novel Configuration of a Microstrip Microwave Wideband Power Amplifier for ...
 
DESIGN OF 2.4 GHZ MMIC FEED FORWARD AMPLIFIER FOR WIRELESS APPLICATIONS
DESIGN OF 2.4 GHZ MMIC FEED FORWARD AMPLIFIER FOR WIRELESS APPLICATIONS DESIGN OF 2.4 GHZ MMIC FEED FORWARD AMPLIFIER FOR WIRELESS APPLICATIONS
DESIGN OF 2.4 GHZ MMIC FEED FORWARD AMPLIFIER FOR WIRELESS APPLICATIONS
 
DESIGN OF 2.4 GHZ MMIC FEED FORWARD AMPLIFIER FOR WIRELESS APPLICATIONS
DESIGN OF 2.4 GHZ MMIC FEED FORWARD AMPLIFIER FOR WIRELESS APPLICATIONSDESIGN OF 2.4 GHZ MMIC FEED FORWARD AMPLIFIER FOR WIRELESS APPLICATIONS
DESIGN OF 2.4 GHZ MMIC FEED FORWARD AMPLIFIER FOR WIRELESS APPLICATIONS
 

Similar to Design and Implementation of LNA at 900MHz for GSM applications

Building impedance matching network based on s parameter from manufacturer
Building impedance matching network based on s parameter from manufacturerBuilding impedance matching network based on s parameter from manufacturer
Building impedance matching network based on s parameter from manufacturerJournal Papers
 
Building impedance matching network based on s parameter from manufacturer
Building impedance matching network based on s parameter from manufacturerBuilding impedance matching network based on s parameter from manufacturer
Building impedance matching network based on s parameter from manufacturerConference Papers
 
LowNoiseAmplifierReport
LowNoiseAmplifierReportLowNoiseAmplifierReport
LowNoiseAmplifierReportSyed Kazmi
 
Neel patel paper
Neel patel paperNeel patel paper
Neel patel paperBECME
 
Multisim design and simulation of 2.2 g hz lna for wireless communication
Multisim design and simulation of 2.2 g hz lna for wireless communicationMultisim design and simulation of 2.2 g hz lna for wireless communication
Multisim design and simulation of 2.2 g hz lna for wireless communicationVLSICS Design
 
Low Noise Amplifier using Darlington Pair At 90nm Technology
Low Noise Amplifier using Darlington Pair At 90nm Technology Low Noise Amplifier using Darlington Pair At 90nm Technology
Low Noise Amplifier using Darlington Pair At 90nm Technology IJECEIAES
 
Welcome to International Journal of Engineering Research and Development (IJERD)
Welcome to International Journal of Engineering Research and Development (IJERD)Welcome to International Journal of Engineering Research and Development (IJERD)
Welcome to International Journal of Engineering Research and Development (IJERD)IJERD Editor
 
0.5GHz - 1.5GHz Bandwidth 10W GaN HEMT RF Power Amplifier Design
0.5GHz - 1.5GHz Bandwidth 10W GaN HEMT RF Power Amplifier Design  0.5GHz - 1.5GHz Bandwidth 10W GaN HEMT RF Power Amplifier Design
0.5GHz - 1.5GHz Bandwidth 10W GaN HEMT RF Power Amplifier Design IJECEIAES
 
Design of a two stage differential low noise amplifier for uwb applications
Design of a two stage differential low noise amplifier for uwb applicationsDesign of a two stage differential low noise amplifier for uwb applications
Design of a two stage differential low noise amplifier for uwb applicationsIAEME Publication
 
Negative image amplifier technique for performance enhancement of ultra wideb...
Negative image amplifier technique for performance enhancement of ultra wideb...Negative image amplifier technique for performance enhancement of ultra wideb...
Negative image amplifier technique for performance enhancement of ultra wideb...IJECEIAES
 
A Design of Sigma-Delta ADC Using OTA
A Design of Sigma-Delta ADC Using OTAA Design of Sigma-Delta ADC Using OTA
A Design of Sigma-Delta ADC Using OTAIJERA Editor
 
IRJET- Design and Testing of 10W SSPA based S Band Transmitting Module
IRJET- 	  Design and Testing of 10W SSPA based S Band Transmitting ModuleIRJET- 	  Design and Testing of 10W SSPA based S Band Transmitting Module
IRJET- Design and Testing of 10W SSPA based S Band Transmitting ModuleIRJET Journal
 
A 10 d bm 25 dbm, 0.363 mm2 two stage 130 nm rf cmos power amplifier
A 10 d bm 25 dbm, 0.363 mm2 two stage 130 nm rf cmos power amplifierA 10 d bm 25 dbm, 0.363 mm2 two stage 130 nm rf cmos power amplifier
A 10 d bm 25 dbm, 0.363 mm2 two stage 130 nm rf cmos power amplifierVLSICS Design
 
Design of Low Noise Amplifier for Wimax Application
Design of Low Noise Amplifier for Wimax ApplicationDesign of Low Noise Amplifier for Wimax Application
Design of Low Noise Amplifier for Wimax ApplicationIOSR Journals
 
MULTISIM DESIGN AND SIMULATION OF 2.2GHz LNA FOR WIRELESS COMMUNICATION
MULTISIM DESIGN AND SIMULATION OF 2.2GHz LNA FOR WIRELESS COMMUNICATIONMULTISIM DESIGN AND SIMULATION OF 2.2GHz LNA FOR WIRELESS COMMUNICATION
MULTISIM DESIGN AND SIMULATION OF 2.2GHz LNA FOR WIRELESS COMMUNICATIONVLSICS Design
 
First order sigma delta modulator with low-power consumption implemented in a...
First order sigma delta modulator with low-power consumption implemented in a...First order sigma delta modulator with low-power consumption implemented in a...
First order sigma delta modulator with low-power consumption implemented in a...eSAT Journals
 
First order sigma delta modulator with low-power
First order sigma delta modulator with low-powerFirst order sigma delta modulator with low-power
First order sigma delta modulator with low-powereSAT Publishing House
 

Similar to Design and Implementation of LNA at 900MHz for GSM applications (20)

Building impedance matching network based on s parameter from manufacturer
Building impedance matching network based on s parameter from manufacturerBuilding impedance matching network based on s parameter from manufacturer
Building impedance matching network based on s parameter from manufacturer
 
Building impedance matching network based on s parameter from manufacturer
Building impedance matching network based on s parameter from manufacturerBuilding impedance matching network based on s parameter from manufacturer
Building impedance matching network based on s parameter from manufacturer
 
LowNoiseAmplifierReport
LowNoiseAmplifierReportLowNoiseAmplifierReport
LowNoiseAmplifierReport
 
A011110105
A011110105A011110105
A011110105
 
Neel patel paper
Neel patel paperNeel patel paper
Neel patel paper
 
Multisim design and simulation of 2.2 g hz lna for wireless communication
Multisim design and simulation of 2.2 g hz lna for wireless communicationMultisim design and simulation of 2.2 g hz lna for wireless communication
Multisim design and simulation of 2.2 g hz lna for wireless communication
 
Low Noise Amplifier using Darlington Pair At 90nm Technology
Low Noise Amplifier using Darlington Pair At 90nm Technology Low Noise Amplifier using Darlington Pair At 90nm Technology
Low Noise Amplifier using Darlington Pair At 90nm Technology
 
Bh31403408
Bh31403408Bh31403408
Bh31403408
 
Welcome to International Journal of Engineering Research and Development (IJERD)
Welcome to International Journal of Engineering Research and Development (IJERD)Welcome to International Journal of Engineering Research and Development (IJERD)
Welcome to International Journal of Engineering Research and Development (IJERD)
 
0.5GHz - 1.5GHz Bandwidth 10W GaN HEMT RF Power Amplifier Design
0.5GHz - 1.5GHz Bandwidth 10W GaN HEMT RF Power Amplifier Design  0.5GHz - 1.5GHz Bandwidth 10W GaN HEMT RF Power Amplifier Design
0.5GHz - 1.5GHz Bandwidth 10W GaN HEMT RF Power Amplifier Design
 
Design of a two stage differential low noise amplifier for uwb applications
Design of a two stage differential low noise amplifier for uwb applicationsDesign of a two stage differential low noise amplifier for uwb applications
Design of a two stage differential low noise amplifier for uwb applications
 
Negative image amplifier technique for performance enhancement of ultra wideb...
Negative image amplifier technique for performance enhancement of ultra wideb...Negative image amplifier technique for performance enhancement of ultra wideb...
Negative image amplifier technique for performance enhancement of ultra wideb...
 
A Design of Sigma-Delta ADC Using OTA
A Design of Sigma-Delta ADC Using OTAA Design of Sigma-Delta ADC Using OTA
A Design of Sigma-Delta ADC Using OTA
 
IRJET- Design and Testing of 10W SSPA based S Band Transmitting Module
IRJET- 	  Design and Testing of 10W SSPA based S Band Transmitting ModuleIRJET- 	  Design and Testing of 10W SSPA based S Band Transmitting Module
IRJET- Design and Testing of 10W SSPA based S Band Transmitting Module
 
A 10 d bm 25 dbm, 0.363 mm2 two stage 130 nm rf cmos power amplifier
A 10 d bm 25 dbm, 0.363 mm2 two stage 130 nm rf cmos power amplifierA 10 d bm 25 dbm, 0.363 mm2 two stage 130 nm rf cmos power amplifier
A 10 d bm 25 dbm, 0.363 mm2 two stage 130 nm rf cmos power amplifier
 
Design of Low Noise Amplifier for Wimax Application
Design of Low Noise Amplifier for Wimax ApplicationDesign of Low Noise Amplifier for Wimax Application
Design of Low Noise Amplifier for Wimax Application
 
MULTISIM DESIGN AND SIMULATION OF 2.2GHz LNA FOR WIRELESS COMMUNICATION
MULTISIM DESIGN AND SIMULATION OF 2.2GHz LNA FOR WIRELESS COMMUNICATIONMULTISIM DESIGN AND SIMULATION OF 2.2GHz LNA FOR WIRELESS COMMUNICATION
MULTISIM DESIGN AND SIMULATION OF 2.2GHz LNA FOR WIRELESS COMMUNICATION
 
B0160709
B0160709B0160709
B0160709
 
First order sigma delta modulator with low-power consumption implemented in a...
First order sigma delta modulator with low-power consumption implemented in a...First order sigma delta modulator with low-power consumption implemented in a...
First order sigma delta modulator with low-power consumption implemented in a...
 
First order sigma delta modulator with low-power
First order sigma delta modulator with low-powerFirst order sigma delta modulator with low-power
First order sigma delta modulator with low-power
 

Design and Implementation of LNA at 900MHz for GSM applications

  • 1. EE Dept CIIT Islamabad 1 Abstract—This report presents the design methodology, simulation results and implementation details of an LNA at 900MHz RF frequency. The LNA is designed to work on bandwidth of GSM system. Destined to be unconditionally stable and work over a considerable bandwidth of about 300MHz with gain of over 10dB and Noise Figure of less than 4, the achieved results conformed quite well to the specifications. Final results include a gain of 12 dB at the center frequency with a nominal variation of ±1.3dB over the desired bandwidth. The Noise Figure obtained was 3.9dB, evidence of a compromise between Noise Figure and unconditional stability. Very high degree of linearity was achieved with output one-dB compression at +15dB and output third order intercept at +46dB. The report contains extensive graphical and tabular representation of results at every stage of design, simulation and implementation along with an explanation of increased Noise Figure in exchange for unconditional stability Index Terms—Amplifier, noise figure, Low noise, Stability, Impedance matching I. INTRODUCTION Low noise amplifiers (LNAs) are used in wide range in wireless communications. RF receivers have a LNA at their front-end. It is a special type of electronic amplifier which is used in communication systems. A low noise amplifier is a device that amplifies incoming electronic signal while introducing little noise of its own. Because of this property (high amplification but low noise injection). It is usually placed as the first component in a receiver chain. Low noise amplifier (LNA) is also used in both commercial and military applications such as cellular phones, WLANs, Doppler radars and signal interceptors. Depending upon the system in which they are used, LNAs can be implemented using different design topologies. The systems deployed in commercial applications aim toward high integration, and low voltage and bias currents. Before going through, the title of this project define word by word, Low noise amplifiers (LNAs) is that amplifying the signal plus bring minimal amount of noise to the signal. The aim of this project is to achieve maximum gain while minimizing the noise and distortion as possible. Gain of the amplifier is expressed as: Stability, Noise figure, Impedance matching are some important elements in Low noise amplifier design. Although these elements are not much dependant on each other but tradeoff between these elements must be understood while designing a Low noise amplifier. Noise figure of two port amplifier is expressed as The scope of this project is to design a low noise amplifier for GSM application. The LNA is designed to operate at a frequency of 900MHz. The report presents the simulation, test results and analysis for the designed of LNA. The performance of the LNA is analyzed on the advance simulators. II. LOW NOISE AMPLIFIER CIRCUIT DESIGN Design and simulation of the LNA is accomplished by using advance simulators. Use the transistor BFG135 and simulate the S parameter file only. The simulation process consists of 4 stages. In each stage a single design is being implemented. Whereas in every next stage, the previously designed LNA is being customized to achieve the best results. The results, such as gain, noise figure at each stage are also compared. Coming up with different software models for the transistor, which would also include searching for manufacturer datasheets and s-parameter files with noise data on the internet. For the Design and Implementation of Low Noise Amplifier at 900MHz Abdus Sami(samihundal@gmail.com), Nauman Azeem, Shabir Ahmad COMSATS Institute of Information and Technology Islamabad, Pakistan
  • 2. EE Dept CIIT Islamabad 2 Design of a biasing network include the DC blocking capacitors and RF chokes. A. Biasing circuit Design The supply voltage was standardized at 12 VDC. With proper design of biasing resistors, desired operating voltage and current (Vce = 10Vdc and Ic =100mA DC) were achieved. In Figure.2 the values of resistors R1 and R2 are 20℩ and 12.09K℩. DC blocking capacitors (C2 and C4) ensure that none of the DC current flows away from the transistor in the RF path. C7 is a filtering capacitor that grounds any high frequency ripple from the DC power supply (VCC). The values of C2, C4 and C7 are 10uF, 10uF and 18pF respectively. The RF chokes (L1 and L2) ensure that no RF signal flows into the DC biasing circuit. The RF chokes should be designed to keep out our center frequency from the DC biasing network. The values of RF Chokes are calculated from the formula: XL = 2πf(L) (3) According to this formula the value of RF Chokes is 45nH; however, during simulation it was observed that it is possible to tune all the reactive components simultaneously for maximum gain. B. Stability sub circuit Design The LNA should be unconditionally stable from 0Hz to . Here is equal to the maximum frequency of oscillation of our transistor, BFG135. The maximum limit of frequency range up to 3GHz (It is safe to assume that if the LNA is stable up to 3GHz, at higher frequencies. The losses of the components and transmission line segments are so high that the reduced gain will negate any possibility of instability). There are two types of tests to check the stability of LNA (K-Δ test and ” test). The test used for the measurement of the stability of LNA is derived stability factor ”. (4) The simulation results of LNA show that the LNA is unstable below 500MHz frequency (”<1) (Fig.8). One idea is to add a shunt resistance in the output circuit and tune all component values again to achieve best gain, noise figure and unconditional stability. C. Matching Circuit Design The amplifier should be impedance matched perfectly to 50 ohms at input and output around 900MHz. However, there are usually two methods by which impedance matching can be done, each with its unique advantage. It is possible to either match for maximum gain, using technique of simultaneous conjugate matching, or minimum noise figure using noise and available gain circles. In this project, it was decided to match the LNA for maximum gain using the principle of simultaneous conjugate matching (even though some designers may recommend using noise matching at input and gain matching at output). For this ‘matched’ source and load reflection co-efficient (Γms and Γml) should be plotted on Smith-Chart. Once these are plotted, it is possible to find their value at the center frequency and match 50Ω input and output terminations to complex conjugates of these reflection co- efficient. In this design we can note that we used only input matching network and output impedance was automatically matched to 50Ohms so we don’t need an output matching network. For input impedance matching, the input impedance was plotted on smith chart and by using appropriate LC circuit input impedance was matched to 50Ohms as shown in figure.1 : Figure.1 Matching Circuit design using Smith chart However, after continuous tuning of all parameters to achieve best noise figure and gain, the matching components no longer retained their designed values. Once the passive matching components are derived, they are inserted in the correct order starting from source and load impedances. Then the schematic components are again tuned for best gain, noise figure and stability. The values of inductor and capacitor for the matching circuit are calculated from smith chart and the values for inductor and capacitor are 5.6nH and 6.24pF respectively. The schematic obtained after inserting the matching components is shown in Figure.2:
  • 3. EE Dept CIIT Islamabad 3 Figure.2 Low Noise Amplifier Design D. Transmission Line Effects After the layout is prepared, there is still one effect that is not yet taken into consideration; effect of transmission line segments in the RF path. What this means is that, even though none of the conductors was designed to be a transmission line segment, when RF signals pass through the copper conductor, the losses of copper conductor affect the results (effect is directly proportional to the length of the transmission line segment) have to be taken into account. Although simulation results don’t show significant change in gain but losses of copper conductor have a little affect on Noise figure. In the schematic, replace all copper conductors joining two components in the RF path with transmission line segments of length equal to the distance between the components and width equal to the width of the copper conductor. The width and length information can be obtained from the layout by placing a SCALE at any conductor that is to be measured. Once all such copper conductor segments in the RF path were replaced with their transmission line equivalents, the LNA was simulated again and then tune the passive components again for maximum gain. It is not possible to completely model all transmission line effects. The schematic after inserting transmission lines is shown in Figure.3. Figure.3 Transmission line effects III. HARDWARE IMPLEMENTATION After the completion of design stage of LNA, second phase is hardware implementation. In this phase the layout design is the first step for hardware implementation of LNA. Following are the steps for layout design and hardware implementation of LNA: Make a list of all passive components that required on a piece of paper. Now, include ‘SMT-PAD’ from the library of simulation software in the schematic and in the properties for this ‘SMT-PAD’ object specify the size of the various dimensions by checking for the same component in their respective MuRata datasheets. If more than one size components are needed, include one ‘SMT-PAD’ object for every size and once again fill all dimension data. For every passive component, in its properties, include one of these PAD objects according to the size available in the lab. Now once all components are assigned their respective size PADs, generate the layout in simulation software. Straighten out the layout and keep distance between components as small as possible so that overall size of LNA is optimum. However, do not keep components too close otherwise their pads will merge during etching. Assign proper width to the RF path and DC signal paths. RF paths from input RF connector to the first component and from the last component to the output RF connector should be a 50 ohm transmission line (for FR4 the width come to about 2.96mm). Once the layout is done, create the artwork which will create a plan showing just the copper area and non-copper area. Print this artwork on a transparency. Layout is shown in figure.4:
  • 4. EE Dept CIIT Islamabad 4 Figure.4 Layout Design Take a small piece of PCB board. Cut the PCB board of size that can fit the layout and remove the blue plastic covering from only one side. Now place the artwork transparency on the exposed copper and photo-process the copper in the photo etching machine. Then wear all the protective gear to protect from harmful acids and other chemicals. The PCB has to be ‘washed’ in two liquid solutions: one, the developer and second, a mix of water, hydrochloric acid (HCL) and hydrogen peroxide. First, place the photo-processed PCB in the developer and wait until the purple layer is completely removed. The outline of the layout will now appear on the PCB. Place this in the second solution and shake the container to speed the chemical reaction between HCL and copper on the PCB. Only that portion which was exposed to light is removed by the acid, thus keeping the copper tracts of the circuit schematic unharmed. Now that the PCB is ready, it is roughened on both sides with sandpaper and holes are drilled in the ground pads. Now all that is left is to solder the components in their respective places. After soldering the components final hardware is shown in figure.5: Figure.5 Low Noise Amplifier hardware implementation IV. SIMULATION RESULTS Given below are the simulation results for the LNA designed. A. Gain Simulation results show that small signal gain of the LNA is 12.043dB at 900MHz(Figure.6) Figure.6 Gain of LNA Noise Figure Simulation results show that noise figure for the LNA designed is 3.93 (Figure.7) Figure.7 Noise figure of LNA Stability factor(”) Stability factor measured for biasing circuit is show in figure.8. Results show that ‘”’ is greater than 1 for almost complete frequency range but below 348MHz frequency the value of stability factor(”) is less than one which shows that network is not unconditionally stable so we need to apply a stability sub circuit. After applying stability sub circuit the results are shown in Figure.9. Results show that the stability factor(”) is greater than 1 for complete frequency range which is the condition for unconditional stability. After applying the matching circuit the stability measure was enhanced because of less value of return loss, results are shown in Figure.10
  • 5. EE Dept CIIT Islamabad 5 Figure.8 Stability factor ‘”’ of LNA for biasing nework Figure.9 Stability factor ‘”’ of LNA After applying stability sub circuit Figure.10 Stability factor ‘”’ of LNA after applying matching network B. Reflection coefficients Value of input and output reflection coefficients before applying matching circuit are shown on smith chart in Figure.11 and Figure.12 Figure.11 Input reflection coefficient before applying matching network Figure.12 output reflection coefficient before applying matching network Results shows that input and output is not 50℩ matched so we need to apply appropriate LC circuit for impedance matching. After applying matching network the value of input and output reflection coefficients on smith chart and linear scale (Figure.13, 14, 15, 16). Smith chart results show that input is exactly matched to 50℩ and output is also matched but not exactly matched to 50℩. Linear scale results show that value of reflection coefficient at 900MHz is -38.56dB and the frequency range for which value of reflection coefficient is less than -10dB is bandwidth of LNA designed which is 305MHz from 782MHz to 1.087GHz. Figure.13 Input reflection coefficient after applying matching network
  • 6. EE Dept CIIT Islamabad 6 Figure.14 output reflection coefficient after applying matching network Figure.15 Input reflection coefficient after applying matching network Figure.16 Output reflection coefficient after applying matching network C. Non-linear simulation results Active RF devices are ultimately non-linear in operation When driven with a large enough RF signal the device will generate undesirable signals. If an amplifier is driven hard enough the output power will begin to roll off resulting in a drop of gain known as gain compression. The point at which gain of LNA drops 1dB from its linear Gain is called 1dB compression point and Output power at which 3rd order intermodulation distortion products become equal in amplitude to the main signal power is called third order intercept point OIP3. Figure.17 Shows the gain compression point of LNA and input power which corresponds to 1dB compression point is 15.55dB. Figure.18 Shows the results for two tone test for third order intercept point and the value of 3rd order intercept point is 46.44dBm. Figure.17 1dB Compression point Figure.18 OIP3 V. CONCLUSION In conclusion, an RF LNA at 900MHz was designed, simulated, and built. The LNA specifications are shown in Table.. However, there is a fitting explanation for high Noise figure; the amplifier has a relatively high gain – to achieve this gain and yet keep the amplifier inherently stable over all frequencies is a difficult requirement. The only suitable method for satisfying both these divergent specifications simultaneously was to use a series resistor in the input of the transistor. This series resistance has its own undesirable side-effects, notably increase in the noise figure of the entire LNA. However, this research work has taught a great deal about RF circuit design and implementation. It taught about the
  • 7. EE Dept CIIT Islamabad 7 dynamics and relations between the different constituent blocks of an RF system and how each component affects (or does not affect!) the overall output. Another learning is that, simulation software are mainly for understanding these inter-block dynamics and not for calculating the final values of the components unless ALL parasitic and other similar RF effects are accounted for. Trial and error in the final implementation stage is just as important for obtaining optimum results; where the simulation software predicts in which direction (greater or lower) should the next trial component be chosen. ACKNOWLEDGMENT First of all, we thank Allah All-Mighty for giving us the strength and paving new ways for us. We would like to express our deepest of gratitude to Mr. Haider Ali for his constant encouragement and belief in us. He has been everything that a group could wish for in a supervisor. We are thankful to Mr. Safwan Khalid who has been extremely helpful to us both inside and outside the institute premises. Our classmate Mr. Waseem Ali deserves our thanks for going through the theoretical work, research work and assisting us in simulation phase of our project. We also appreciate the help of our senior course mates who were helping us during the hardware implementation of the project. Thanks to Dr. Syed Irfan Ahmed for reviewing our thesis and providing us with valuable suggestions. Finally, we would like to thank our parents for their unconditional love and the faith which they posses in us. REFERENCES [1] Microwave engineering 3rd Ed by David M.pozar [2] http://en.wikipedia.org/wiki/Low_noise_amplifier [3] http://en.wikipedia.org/wiki/OIP3 [4] http://en.wikipedia.org/wiki/Gain_compression [5] http://www.downeastmicrowave.com/PDF/IP3.PDF [6] http://comsec.com/usrp/microtune/NF_tutorial.pdf [7] Aleksandar Tasić. "PERFORMANCE PARAMETERS OF RF CIRCUITS", Analog Circuits and Signal Processing Series, 2006 [8] Domine Leenaerts, Jos Bergervoet, Jan-Willem Lobeek, Marek Schmidt-Szalowski“900MHz/1800MHz GSM Base Station LNA with Sub-1dB Noise Figure and +36dBm OIP3” NXP Semiconductors, Eindhoven, 5656AE, the Netherlands