This document provides guidelines for system board design at TGP Technology Application Co.,ltd. It outlines the general requirements, process flow, and contents that should be included in system board designs. The contents section describes the key parts of the design process, including mechanical design, schematic design, PCB design, bill of materials, firmware development, lab testing, and board debug. The goal is to establish a standardized process for board design groups to follow.

1. Rev 1.0 – November 2014 System Board Design Guideline
http://tgpcorp.com/
System Board Design Guideline
Revision : 1.0
TGP Technology Application Co.,ltd
Page 1 of 12

2. Rev 1.0 – November 2014 System Board Design Guideline
http://tgpcorp.com/
Table of Contents
1 Introduction........................................................................................................................................................ 3
1.1 Purpose..................................................................................................................................................... 3
1.2 Scope........................................................................................................................................................ 3
1.3 Responsibility............................................................................................................................................. 3
1.4 Definition.................................................................................................................................................... 3
1.5 Acronyms................................................................................................................................................... 3
1.6 References................................................................................................................................................ 3
1.7 Templates/Forms.......................................................................................................................................3
2 General Requirements.......................................................................................................................................4
3 Process Flow..................................................................................................................................................... 5
4 Contents............................................................................................................................................................ 6
4.1 System Board Design Request Form........................................................................................................6
4.2 Mechanical Design....................................................................................................................................6
4.3 Parts Selection........................................................................................................................................... 6
4.4 SCH Design............................................................................................................................................... 6
4.5 PCB Design............................................................................................................................................... 8
4.6 Checklist.................................................................................................................................................... 8
4.7 BOM.......................................................................................................................................................... 9
4.8 CPLD Glue Logic Design...........................................................................................................................9
4.9 FPGA Image Diagnostic Physiscal............................................................................................................9
4.10 Lab Ass ................................................................................................................................................... 9
4.11 Board Debug.......................................................................................................................................... 10
4.12 Software Board Support Package..........................................................................................................12
TGP Technology Application Co.,ltd
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3. Rev 1.0 – November 2014 System Board Design Guideline
http://tgpcorp.com/
1 Introduction
1.1 Purpose
To establish System Board Design Process for Board Design Group in TGP.
1.2 Scope
The process will apply for Board Design Group in TGP.
1.3 Responsibility
Board Level Manager and Engineering Employee
1.4 Definition
Not required
1.5 Acronyms
TGP: TGP Technology Application Co.,ltd
BD: Board Design
MEC: Mechanical
ASS: Assembly
SCH: Schematic
PCB: Printed Circuit Board
1.6 References
Not required
1.7 Templates/Forms
TGP Technology Application Co.,ltd
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4. Rev 1.0 – November 2014 System Board Design Guideline
http://tgpcorp.com/
2 General Requirements
Each release contains:
 Schematic & Layout
 BOM
 Checklist
 Gerber
 Netlist
 Version history
 Schematic PDF
 CPLD code
 FPGA code
 Software Board Support Package
 Each release must be identified by: Product Name and a Version Number
 The version number is formed: [XY]
 Which X: is the main Code Version of Board design, for the initial release (default is 1) or major
change.
 Which Y: is the Sub-code Version of Board design, for the initial release (default is 0) or minor
change.
TGP Technology Application Co.,ltd
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5. Rev 1.0 – November 2014 System Board Design Guideline
http://tgpcorp.com/
3 Process Flow
The work flows for design, releasing and delivering are depicted as the following:
Review
SOF Diag
User Manual
Diagnosis
User
Diagnosis
NG
G
NG: Not Good
G: Good
NG
NG
NG
NG
NG
NG
NG
G
G
G
G
G
G
G
EP Design Request Form
SCH Design
Interface Design
Store Check
Mec Design
Block Diagam
Parts Select
Review
Parts Selection
PCB Design
Board Debug
Mec Design
Review
OrderingDraw SCH Create Symbol
Cost,Leadtime
BOMPlacement Netlist
CPLD Code
Memory Map
Drawing
Checklist
Order PCB
ASS House
Review
Order Box
Review
Silk Name
Review
Receive Boards
Check Power
Lab Ass
Board Debug
EP Box
Ship to Assembly
TGP Technology Application Co.,ltd
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6. Rev 1.0 – November 2014 System Board Design Guideline
http://tgpcorp.com/
4 Contents
4.1 System Board Design Request Form
 Mechanical standard information
 All interface selected
 Main chip selected
4.2 Mechanical Design
 From EP Design Request Form get the information of mechanical standard
 PCB file exports the .dxf file
 Acad tool imports .dxf file to create mechanical file
4.3 Parts Selection
 Checking the store. If yes please select, if no please go to distributor or manufacture
 Information need to check when buy parts: quantity, cost and leadtime.
Some of the distributors:
http://www.digikey.com/
http://www.mouser.com/
http://www.avnet.com/
http://www.arrow.com/
Some of the manufacturers
http://www.altera.com/
http://www.exar.com/
http://www.maxim-ic.com/
4.4 SCH Design
 From EP Design Request Form, draws the block diagram
 The block diagram must be review before drawing SCH and according the principles below:
 maintain visibility
 proper functionality
 reduce complexity
 good looking and easily understandable
 indicate current ratings, matching requirements and sensitive nodes
TGP Technology Application Co.,ltd
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7. Rev 1.0 – November 2014 System Board Design Guideline
http://tgpcorp.com/
 use informative names for components
 all input ports put left side and output ports are right side
 all components should have respective values like width, length, devices name etc.
 put spares and dummys in above/below power rails or put in dotted box
 minimize virtual connections as much as possible.
 SCH drawing need according the principles below:
 put net name of signal must be on standard
 All signal name have direction (input, output, bidirectional)
 All parts drawing must be set load and no load
 File name on each sheet
 Minimum number of characters in values
 Consistent character size for readability
 Schematics printed at a readable scale
 All components have reference designators
 Every component has a value
 Every component has a part name (except resistors, capacitors etc.)
 Every net has a name
 Special information for a component
 Polarized components connections checked
 Power and ground pins shown (preferred) or listed for each component
 Check hidden power and ground connections (they are the source for many troubles)
 Title block completed for each sheet
 All test points and jumpers are marked clearly and have reference designator
 Check that all required options appear clearly on the drawing
 Check connectors and on-board elements pin out
 Ensure socket pins are marked if in use
 Electronic design consideration:
 Connect spare gates inputs or unused inputs to GND or Vcc
 Outside world I/O lines filtered for RFI
 All outside world I/O lines protected against electro static discharge
 Bypass capacitor(s) for each IC
 Voltage ratings of components checked
TGP Technology Application Co.,ltd
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8. Rev 1.0 – November 2014 System Board Design Guideline
http://tgpcorp.com/
 Ensure 3.3 volt parts are 5 volt tolerant where they interface
 Verify power sequencing requirements on 5 volt and 3.3 volt rails
 Each IC has known or controlled power-up state
 Electrolytic and tantalum capacitors checked for no reverse voltage
 Ground makes first and breaks last for hot insertion
 Check for input voltages applied with power off and CMOS latch-up possibilities
 Reset circuit design tested with fast and slow power supply rise and fall time
 Check reset behavior in power cycles before the circuit is fully operational
 Check all resets for possible reset loops, especially for hot swap operations
 Enable halting watchdog timer for testing and diagnostics
 Sufficient capacitance on low dropout voltage regulators
 Capacitance and fan out limits checked for busses
 Check maximum power dissipation at worst-case operating temperatures
 Estimate total worst case power supply current
 Avoid reverse base-emitter current/voltage on bipolar transistors
Note: for more detail read the Schematic Design Guideline
4.5 PCB Design
 Import the net list from SCH to PCB file
 Get mechanical symbol to PCB file
 Place the main parts match with block diagram
 Place all parts remain according the main parts
 Routing according the principles below:
 following group
 from important to less important
 horizontal and vertical by alternating layer
 optimization of each line routing
 when deadlock you must remove all line each group and restart routing
Note: for more detail read the PCB Design Guideline
4.6 Checklist
Using Schematic and PCB checklist form checking the schematic and PCB.
Note: for more detail read the Checklist Design Form
TGP Technology Application Co.,ltd
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9. Rev 1.0 – November 2014 System Board Design Guideline
http://tgpcorp.com/
4.7 BOM
BOM must be created automatic from SCH tool and correct with standard form.
Note: for more detail read the BOM Design Form
4.8 CPLD Glue Logic Design
 Create new project
 Make Pin assignment: import net list form SCH to .qsf file and top file
 Drawing the block diagram and partition the cpld according SCH block diagram
 Coding verilog HDL according block diagram
 Review
 Synthesis using Quartus II of Altera or Vivado of Xilinx
 Simulation by ModeSim
 Create the Memory Map
 On board testing
Note: for more detail read the Verilog HDL Design Guideline
4.9 FPGA Image Diagnostic Physiscal
 Create new project
 Make Pin assignment: import net list form SCH to .qsf file and top file
 Drawing the block diagram and partition the FPGA according SCH block diagram
 Coding verilog HDL according block diagram
 Review
 Synthesis using Quartus II of Altera or Vivado of Xilinx
 Simulation by ModeSim
 Create the Memory Map
 On board testing
Note: for more detail read the Verilog HDL Design Guideline
4.10 Lab Ass
Using Lab Ass form
TGP Technology Application Co.,ltd
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10. Rev 1.0 – November 2014 System Board Design Guideline
http://tgpcorp.com/
4.11 Board Debug
 Before Power-Up
 Check for short circuit all on power rails. Use DMM to measure resistance between Power rails
to GND and between one Power rail to another then fill the reading into following resistance
matrix:
 Check NL (No Load) components (optional components are not populated on the board)
 Check configure jumper
 Hardware environment set up
 RJ45 cable
 UART cable
 OCD cable
 Power up
 Do not turn on the power supply at immediately. Make sure the power supply is connected to a
power strip has a switch, or it's had better if it connected to a programmable AC source.
 Use DMM to probe at +1.2V
 Power up board. Once Voltage reading is stable, check if it's in range from 1.14V-1.26V. If
reading out of that range, immediately power off, and then investigate for problem. If it's OK, go
to next step
TGP Technology Application Co.,ltd
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Power Rails +3.3V +2.5V +1.8V +1.5V +1.2V +1.1V +0.9V +0.75V
GND
+3.3V
+2.5V
+1.8V
+1.5V
+1.2V
+1.1V
+0.9V
+0.75V
No. Parts Name Description Assembly Date Assembly By Check Date Check By Note
1 PT13 RJ11, top, (x = 96 mil,y = 75 mil) 12/12/09 Engineer 12/12/09
2 PT11 RJ45, top, (x = 110 mil, y = 1228mil) 12/12/09 Engineer 12/12/09
3 UT57 OPT, top, (x = 1380 mil, y = 2010 mil) 12/12/09 Engineer 12/12/09
4 RB251 R, Bot, (x = 2548 mil, y = 7056 mil) 12/12/09 Engineer 12/12/09
TGPCorp
TGPCorp
TGPCorp
TGPCorp

11. Rev 1.0 – November 2014 System Board Design Guideline
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 After Power up
 Measure all power rails (see board_test_point.pdf for probe points), fill reading to below table
and make sure that all value in range set by lower and upper limits.
 Measures the voltage ripple on power rails, then fill the reading to below table, verify that all of
them are in specified range
 Refer to board_test_points_for_ripple_measurement.pdf for probe points
 Wrong selected probing points may causes inaccurate reading
 Do not use probes with the long grounding wire or tip, noise pickup will be added to measured
result
 The bandwidth setting for ripple measurement is 20Mhz and ripple amplitude is in term of peak-
peak value
 Measure all clocks signals (see board_test_points.pdf for probe points)
TGP Technology Application Co.,ltd
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Power Rails Tolerance Lower Limit Upper Limit Reading G/NG
+3.3V +/- 5% 3.14 3.47
+2.5V +/- 5% 2.38 2.63
+1.8V +/- 5% 1.71 1.89
+1.5V +/- 5% 1.43 1.58
+1.2V +/- 5% 1.14 1.26
+1.1V +/- 5% 1.05 1.16
+0.9V +/- 5% 0.86 0.95
+0.75V +/- 5% 0.71 0.79
Power Rails G/NG
+3.3V +/- 2% 66
+2.5V +/- 2% 50
+1.8V +/- 2% 36
+1.5V +/- 2% 30
+1.2V +/- 2% 24
+1.1V +/- 2% 22
+0.9V +/- 2% 18
+0.75V +/- 2% 15
Tolerance
Max(%)
Limit
(mVp-p)
Reading
(mVp-p)

12. Rev 1.0 – November 2014 System Board Design Guideline
http://tgpcorp.com/
 DDR clock speed depends on configuration
 These steps could be eliminated to save time when working on large amount of board.
 It need to be performed on the first board, when having bug or need data for statistics purposes
4.12 Software Board Support Package
 Download the BSP from Manufacture's CPU
 Change some interface match with new board design
 CPU loading: please use the CPU Loading Guideline
TGP Technology Application Co.,ltd
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Clock Name Value Reading G/NG
CLK_SYS_38M88 38.88MHZ
CLK_GBE_125M 125MHZ
CLK_OCN_38M88 38.88MHZ
CLK_CPU_66M66 66.66MHZ
CLK_DS1_2M048 2.048MHZ
CLK_DS3_12M288 12.288MHZ
CLK_DDRTOP_155M52 155.52MHZ
CLK_DDRBOT_155M52 155.52MHZ