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EE101: Basics
KCL, KVL, power, Thevenin’s theorem
M. B. Patil
mbpatil@ee.iitb.ac.in
Department of Electrical Engineering
Indian Institute of Technology Bombay
M. B. Patil, IIT Bombay
Kirchhoff’s laws
4
vα
v6
v3
v2
i5
V0
I0v5
i4R3i6
i3
v4
i2
R2
R1
v1
i1
A B C
DE
M. B. Patil, IIT Bombay
Kirchhoff’s laws
4
vα
v6
v3
v2
i5
V0
I0v5
i4R3i6
i3
v4
i2
R2
R1
v1
i1
A B C
DE
* Kirchhoff’s current law (KCL):P
ik = 0 at each node.
M. B. Patil, IIT Bombay
Kirchhoff’s laws
4
vα
v6
v3
v2
i5
V0
I0v5
i4R3i6
i3
v4
i2
R2
R1
v1
i1
A B C
DE
* Kirchhoff’s current law (KCL):P
ik = 0 at each node.
e.g., at node B, −i3 + i6 + i4 = 0.
M. B. Patil, IIT Bombay
Kirchhoff’s laws
4
vα
v6
v3
v2
i5
V0
I0v5
i4R3i6
i3
v4
i2
R2
R1
v1
i1
A B C
DE
* Kirchhoff’s current law (KCL):P
ik = 0 at each node.
e.g., at node B, −i3 + i6 + i4 = 0.
(We have followed the convention that current leaving a node is positive.)
M. B. Patil, IIT Bombay
Kirchhoff’s laws
4
vα
v6
v3
v2
i5
V0
I0v5
i4R3i6
i3
v4
i2
R2
R1
v1
i1
A B C
DE
* Kirchhoff’s current law (KCL):P
ik = 0 at each node.
e.g., at node B, −i3 + i6 + i4 = 0.
(We have followed the convention that current leaving a node is positive.)
* Kirchhoff’s voltage law (KVL):P
vk = 0 for each loop.
M. B. Patil, IIT Bombay
Kirchhoff’s laws
4
vα
v6
v3
v2
i5
V0
I0v5
i4R3i6
i3
v4
i2
R2
R1
v1
i1
A B C
DE
* Kirchhoff’s current law (KCL):P
ik = 0 at each node.
e.g., at node B, −i3 + i6 + i4 = 0.
(We have followed the convention that current leaving a node is positive.)
* Kirchhoff’s voltage law (KVL):P
vk = 0 for each loop.
e.g., v3 + v6 − v1 − v2 = 0.
M. B. Patil, IIT Bombay
Kirchhoff’s laws
4
vα
v6
v3
v2
i5
V0
I0v5
i4R3i6
i3
v4
i2
R2
R1
v1
i1
A B C
DE
* Kirchhoff’s current law (KCL):P
ik = 0 at each node.
e.g., at node B, −i3 + i6 + i4 = 0.
(We have followed the convention that current leaving a node is positive.)
* Kirchhoff’s voltage law (KVL):P
vk = 0 for each loop.
e.g., v3 + v6 − v1 − v2 = 0.
(We have followed the convention that voltage drop across a branch is positive.)
M. B. Patil, IIT Bombay
Circuit elements
Element Symbol Equation
Resistor
v
i
v = R i
Inductor
v
i
v = L
di
dt
Capacitor
v
i
i = C
dv
dt
Diode
v
i
to be discussed
BJT
C
E
B to be discussed
M. B. Patil, IIT Bombay
Sources
Element Symbol Equation
Independent Voltage source
v
i
v(t) = vs (t)
Current source
v
i
i(t) = is (t)
Dependent VCVS
v
i
v(t) = α vc (t)
VCCS
v
i
i(t) = g vc (t)
CCVS
v
i
v(t) = r ic (t)
CCCS
v
i
i(t) = β ic (t)
* α, β: dimensionless, r: Ω, g: Ω−1
or (“mho”)
* The subscript ‘c’ denotes the controlling voltage or current.
M. B. Patil, IIT Bombay
Instantaneous power absorbed by an element
i2
iN
i3
i1
V1
VN
V2
V3
P(t) = V1(t) i1(t) + V2(t) i2(t) + · · · + VN (t) iN (t) ,
where V1, V2, etc. are “node voltages” (measured
with respect to a reference node).
M. B. Patil, IIT Bombay
Instantaneous power absorbed by an element
i2
iN
i3
i1
V1
VN
V2
V3
P(t) = V1(t) i1(t) + V2(t) i2(t) + · · · + VN (t) iN (t) ,
where V1, V2, etc. are “node voltages” (measured
with respect to a reference node).
* two-terminal element:
V1 i1
V2
v
i2
P = V1 i1 + V2 i2
= V1 i1 + V2 (−i1)
= [V1 − V2] i1 = v i1
M. B. Patil, IIT Bombay
Instantaneous power absorbed by an element
i2
iN
i3
i1
V1
VN
V2
V3
P(t) = V1(t) i1(t) + V2(t) i2(t) + · · · + VN (t) iN (t) ,
where V1, V2, etc. are “node voltages” (measured
with respect to a reference node).
* two-terminal element:
V1 i1
V2
v
i2
P = V1 i1 + V2 i2
= V1 i1 + V2 (−i1)
= [V1 − V2] i1 = v i1
* three-terminal element:
iB
iE
iC
VC
VB
VE
P = VB iB + VC iC + VE (−iE )
= VB iB + VC iC − VE (iB + iC )
= (VB − VE ) iB + (VC − VE ) iC
= VBE iB + VCE iE
M. B. Patil, IIT Bombay
Instantaneous power
* A resistor can only absorb power (from the circuit) since v and i have the same
sign, making P > 0. The energy “absorbed” by a resistor goes in heating the
resistor and the rest of the world.
M. B. Patil, IIT Bombay
Instantaneous power
* A resistor can only absorb power (from the circuit) since v and i have the same
sign, making P > 0. The energy “absorbed” by a resistor goes in heating the
resistor and the rest of the world.
* Often, a “heat sink” is provided to dissipate the thermal energy effectively so
that the device temperature does not become too high.
M. B. Patil, IIT Bombay
Instantaneous power
* A resistor can only absorb power (from the circuit) since v and i have the same
sign, making P > 0. The energy “absorbed” by a resistor goes in heating the
resistor and the rest of the world.
* Often, a “heat sink” is provided to dissipate the thermal energy effectively so
that the device temperature does not become too high.
* A source (e.g., a DC voltage source) can absorb or deliver power since the signs
of v and i are independent. For example, when a battery is charged, it absorbs
energy which gets stored within.
M. B. Patil, IIT Bombay
Instantaneous power
* A resistor can only absorb power (from the circuit) since v and i have the same
sign, making P > 0. The energy “absorbed” by a resistor goes in heating the
resistor and the rest of the world.
* Often, a “heat sink” is provided to dissipate the thermal energy effectively so
that the device temperature does not become too high.
* A source (e.g., a DC voltage source) can absorb or deliver power since the signs
of v and i are independent. For example, when a battery is charged, it absorbs
energy which gets stored within.
* A capacitor can absorb or deliver power. When it is absorbing power, its charge
builds up. Similarly, an inductor can store energy (in the form of magnetic flux).
M. B. Patil, IIT Bombay
Resistors in series
A B A B
R2R1
i R
v3
R3
v2
i
v1 v
M. B. Patil, IIT Bombay
Resistors in series
A B A B
R2R1
i R
v3
R3
v2
i
v1 v
v1 = i R1, v2 = i R2, v3 = i R3, ⇒ v = v1 + v2 + v3 = i (R1 + R2 + R3)
M. B. Patil, IIT Bombay
Resistors in series
A B A B
R2R1
i R
v3
R3
v2
i
v1 v
v1 = i R1, v2 = i R2, v3 = i R3, ⇒ v = v1 + v2 + v3 = i (R1 + R2 + R3)
* The equivalent resistance is Req = R1 + R2 + R3.
M. B. Patil, IIT Bombay
Resistors in series
A B A B
R2R1
i R
v3
R3
v2
i
v1 v
v1 = i R1, v2 = i R2, v3 = i R3, ⇒ v = v1 + v2 + v3 = i (R1 + R2 + R3)
* The equivalent resistance is Req = R1 + R2 + R3.
* The voltage drop across Rk is v ×
Rk
Req
.
M. B. Patil, IIT Bombay
Resistors in parallel
A AB B
R2
R1
i R
R3
v
i1
i2
i3
i
v
M. B. Patil, IIT Bombay
Resistors in parallel
A AB B
R2
R1
i R
R3
v
i1
i2
i3
i
v
i1 = G1 v, i2 = G2 v, i3 = G3 v, where G1 = 1/R1, etc.
⇒ i = i1 + i2 + i3 = (G1 + G2 + G3) v .
M. B. Patil, IIT Bombay
Resistors in parallel
A AB B
R2
R1
i R
R3
v
i1
i2
i3
i
v
i1 = G1 v, i2 = G2 v, i3 = G3 v, where G1 = 1/R1, etc.
⇒ i = i1 + i2 + i3 = (G1 + G2 + G3) v .
* The equivalent conductance is Geq = G1 + G2 + G3, and the equivalent
resistance is Req = 1/Geq.
M. B. Patil, IIT Bombay
Resistors in parallel
A AB B
R2
R1
i R
R3
v
i1
i2
i3
i
v
i1 = G1 v, i2 = G2 v, i3 = G3 v, where G1 = 1/R1, etc.
⇒ i = i1 + i2 + i3 = (G1 + G2 + G3) v .
* The equivalent conductance is Geq = G1 + G2 + G3, and the equivalent
resistance is Req = 1/Geq.
* The current through Rk is i ×
Gk
Geq
.
M. B. Patil, IIT Bombay
Resistors in parallel
A AB B
R2
R1
i R
R3
v
i1
i2
i3
i
v
i1 = G1 v, i2 = G2 v, i3 = G3 v, where G1 = 1/R1, etc.
⇒ i = i1 + i2 + i3 = (G1 + G2 + G3) v .
* The equivalent conductance is Geq = G1 + G2 + G3, and the equivalent
resistance is Req = 1/Geq.
* The current through Rk is i ×
Gk
Geq
.
* If N = 2, we have
Req =
R1 R2
R1 + R2
, i1 = i ×
R2
R1 + R2
, i2 = i ×
R1
R1 + R2
.
M. B. Patil, IIT Bombay
Resistors in parallel
A AB B
R2
R1
i R
R3
v
i1
i2
i3
i
v
i1 = G1 v, i2 = G2 v, i3 = G3 v, where G1 = 1/R1, etc.
⇒ i = i1 + i2 + i3 = (G1 + G2 + G3) v .
* The equivalent conductance is Geq = G1 + G2 + G3, and the equivalent
resistance is Req = 1/Geq.
* The current through Rk is i ×
Gk
Geq
.
* If N = 2, we have
Req =
R1 R2
R1 + R2
, i1 = i ×
R2
R1 + R2
, i2 = i ×
R1
R1 + R2
.
* If Rk = 0, all of the current will go through Rk .
M. B. Patil, IIT Bombay
Example
(a) 3 Ω
i1
4 Ω
3 Ω
2 Ω
2.52.55
6 V
i2
Example
(a) 3 Ω
i1
4 Ω
3 Ω
2 Ω
2.52.55
6 V
i2
Example
(a) 3 Ω
i1
4 Ω
3 Ω
2 Ω
2.52.55
6 V
i2
(b)
2 Ω4 Ω i2
i1
3 Ω
3 Ω
1 Ω
6 V
Example
(a) 3 Ω
i1
4 Ω
3 Ω
2 Ω
2.52.55
6 V
i2
(b)
2 Ω4 Ω i2
i1
3 Ω
3 Ω
1 Ω
6 V
Example
(a) 3 Ω
i1
4 Ω
3 Ω
2 Ω
2.52.55
6 V
i2
(b)
2 Ω4 Ω i2
i1
3 Ω
3 Ω
1 Ω
6 V
(c)
4 Ω
i1
6 V
i2
3
6
Example
(a) 3 Ω
i1
4 Ω
3 Ω
2 Ω
2.52.55
6 V
i2
(b)
2 Ω4 Ω i2
i1
3 Ω
3 Ω
1 Ω
6 V
(c)
4 Ω
i1
6 V
i2
3
6
Example
(a) 3 Ω
i1
4 Ω
3 Ω
2 Ω
2.52.55
6 V
i2
(b)
2 Ω4 Ω i2
i1
3 Ω
3 Ω
1 Ω
6 V
(c)
4 Ω
i1
6 V
i2
3
6
(d)
i1
6 V
2 Ω
4 Ω
Example
(a) 3 Ω
i1
4 Ω
3 Ω
2 Ω
2.52.55
6 V
i2
(b)
2 Ω4 Ω i2
i1
3 Ω
3 Ω
1 Ω
6 V
(c)
4 Ω
i1
6 V
i2
3
6
(d)
i1
6 V
2 Ω
4 Ω
i1 =
6 V
4 Ω + 2 Ω
= 1 A .
Example
(a) 3 Ω
i1
4 Ω
3 Ω
2 Ω
2.52.55
6 V
i2
(b)
2 Ω4 Ω i2
i1
3 Ω
3 Ω
1 Ω
6 V
(c)
4 Ω
i1
6 V
i2
3
6
(d)
i1
6 V
2 Ω
4 Ω
i1 =
6 V
4 Ω + 2 Ω
= 1 A .
i2 = i1 ×
6 Ω
6 Ω + 3 Ω
=
2
3
A .
M. B. Patil, IIT Bombay
Example
(a) 3 Ω
i1
4 Ω
3 Ω
2 Ω
2.52.55
6 V
i2
(b)
2 Ω4 Ω i2
i1
3 Ω
3 Ω
1 Ω
6 V
(c)
4 Ω
i1
6 V
i2
3
6
(d)
i1
6 V
2 Ω
4 Ω
i1 =
6 V
4 Ω + 2 Ω
= 1 A .
i2 = i1 ×
6 Ω
6 Ω + 3 Ω
=
2
3
A .
Home work:
* Verify that KCL and KVL are satisfied for each node/loop.
M. B. Patil, IIT Bombay
Example
(a) 3 Ω
i1
4 Ω
3 Ω
2 Ω
2.52.55
6 V
i2
(b)
2 Ω4 Ω i2
i1
3 Ω
3 Ω
1 Ω
6 V
(c)
4 Ω
i1
6 V
i2
3
6
(d)
i1
6 V
2 Ω
4 Ω
i1 =
6 V
4 Ω + 2 Ω
= 1 A .
i2 = i1 ×
6 Ω
6 Ω + 3 Ω
=
2
3
A .
Home work:
* Verify that KCL and KVL are satisfied for each node/loop.
* Verify that the total power absorbed by the resistors is equal to the power
supplied by the source.
M. B. Patil, IIT Bombay
Nodal analysis
I
k v3
R2
V2
v3
0
R1
3R
4R
0
V
1
V3
M. B. Patil, IIT Bombay
Nodal analysis
I
k v3
R2
V2
v3
0
R1
3R
4R
0
V
1
V3
* Take some node as the “reference node” and denote
the node voltages of the remaining nodes by V1, V2,
etc.
M. B. Patil, IIT Bombay
Nodal analysis
I
k v3
R2
V2
v3
0
R1
3R
4R
0
V
1
V3
* Take some node as the “reference node” and denote
the node voltages of the remaining nodes by V1, V2,
etc.
* Write KCL at each node in terms of the node
voltages. Follow a fixed convention, e.g., current
leaving a node is positive.
M. B. Patil, IIT Bombay
Nodal analysis
I
k v3
R2
V2
v3
0
R1
3R
4R
0
V
1
V3
* Take some node as the “reference node” and denote
the node voltages of the remaining nodes by V1, V2,
etc.
* Write KCL at each node in terms of the node
voltages. Follow a fixed convention, e.g., current
leaving a node is positive.
1
R1
(V1 − V2) − I0 − k (V2 − V3) = 0 ,
1
R1
(V2 − V1) +
1
R3
(V2 − V3) +
1
R2
(V2) = 0 ,
k (V2 − V3) +
1
R3
(V3 − V2) +
1
R4
(V3) = 0 .
M. B. Patil, IIT Bombay
Nodal analysis
I
k v3
R2
V2
v3
0
R1
3R
4R
0
V
1
V3
* Take some node as the “reference node” and denote
the node voltages of the remaining nodes by V1, V2,
etc.
* Write KCL at each node in terms of the node
voltages. Follow a fixed convention, e.g., current
leaving a node is positive.
1
R1
(V1 − V2) − I0 − k (V2 − V3) = 0 ,
1
R1
(V2 − V1) +
1
R3
(V2 − V3) +
1
R2
(V2) = 0 ,
k (V2 − V3) +
1
R3
(V3 − V2) +
1
R4
(V3) = 0 .
* Solve for the node voltages → branch voltages and
currents.
M. B. Patil, IIT Bombay
Nodal analysis
I
k v3
R2
V2
v3
0
R1
3R
4R
0
V
1
V3
* Take some node as the “reference node” and denote
the node voltages of the remaining nodes by V1, V2,
etc.
* Write KCL at each node in terms of the node
voltages. Follow a fixed convention, e.g., current
leaving a node is positive.
1
R1
(V1 − V2) − I0 − k (V2 − V3) = 0 ,
1
R1
(V2 − V1) +
1
R3
(V2 − V3) +
1
R2
(V2) = 0 ,
k (V2 − V3) +
1
R3
(V3 − V2) +
1
R4
(V3) = 0 .
* Solve for the node voltages → branch voltages and
currents.
* Remark: Nodal analysis needs to be modified if there
are voltage sources.
M. B. Patil, IIT Bombay
Mesh analysis
R1 R2
R3Vs
is
i1 i2
r1 is
M. B. Patil, IIT Bombay
Mesh analysis
R1 R2
R3Vs
is
i1 i2
r1 is
* Write KVL for each loop in terms of the “mesh currents” i1 and i2. Use a fixed
convention, e.g., voltage drop is positive. (Note that is = i1 − i2.)
M. B. Patil, IIT Bombay
Mesh analysis
R1 R2
R3Vs
is
i1 i2
r1 is
* Write KVL for each loop in terms of the “mesh currents” i1 and i2. Use a fixed
convention, e.g., voltage drop is positive. (Note that is = i1 − i2.)
−Vs + i1 R1 + (i1 − i2) R3 = 0 ,
R2 i2 + r1 (i1 − i2) + (i2 − i1) R3 = 0 .
M. B. Patil, IIT Bombay
Mesh analysis
R1 R2
R3Vs
is
i1 i2
r1 is
* Write KVL for each loop in terms of the “mesh currents” i1 and i2. Use a fixed
convention, e.g., voltage drop is positive. (Note that is = i1 − i2.)
−Vs + i1 R1 + (i1 − i2) R3 = 0 ,
R2 i2 + r1 (i1 − i2) + (i2 − i1) R3 = 0 .
* Solve for i1 and i2 → compute other quantities of interest (branch currents and
branch voltages).
M. B. Patil, IIT Bombay
Linearity and superposition
* A circuit containing independent sources, dependent sources, and resistors is
linear, i.e., the system of equations describing the circuit is linear.
M. B. Patil, IIT Bombay
Linearity and superposition
* A circuit containing independent sources, dependent sources, and resistors is
linear, i.e., the system of equations describing the circuit is linear.
* The dependent sources are assumed to be linear, e.g., if we have a CCVS with
v = a i2
c + b, the resulting system will be no longer linear.
M. B. Patil, IIT Bombay
Linearity and superposition
* A circuit containing independent sources, dependent sources, and resistors is
linear, i.e., the system of equations describing the circuit is linear.
* The dependent sources are assumed to be linear, e.g., if we have a CCVS with
v = a i2
c + b, the resulting system will be no longer linear.
* For a linear system, we can apply the principle of superposition.
M. B. Patil, IIT Bombay
Linearity and superposition
* A circuit containing independent sources, dependent sources, and resistors is
linear, i.e., the system of equations describing the circuit is linear.
* The dependent sources are assumed to be linear, e.g., if we have a CCVS with
v = a i2
c + b, the resulting system will be no longer linear.
* For a linear system, we can apply the principle of superposition.
* In the context of circuits, superposition enables us to consider the independent
sources one at a time, compute the desired quantity of interest in each case, and
get the net result by adding the individual contributions.
M. B. Patil, IIT Bombay
Linearity and superposition
* A circuit containing independent sources, dependent sources, and resistors is
linear, i.e., the system of equations describing the circuit is linear.
* The dependent sources are assumed to be linear, e.g., if we have a CCVS with
v = a i2
c + b, the resulting system will be no longer linear.
* For a linear system, we can apply the principle of superposition.
* In the context of circuits, superposition enables us to consider the independent
sources one at a time, compute the desired quantity of interest in each case, and
get the net result by adding the individual contributions.
* Caution: Superposition cannot be applied to dependent sources.
M. B. Patil, IIT Bombay
Superposition
* Superposition refers to superposition of response due to independent sources.
M. B. Patil, IIT Bombay
Superposition
* Superposition refers to superposition of response due to independent sources.
* We can consider one independent source at a time, deactivate all other
independent sources.
M. B. Patil, IIT Bombay
Superposition
* Superposition refers to superposition of response due to independent sources.
* We can consider one independent source at a time, deactivate all other
independent sources.
* Deactivating a current source ⇒ is = 0, i.e., replace the current source with an
open circuit.
M. B. Patil, IIT Bombay
Superposition
* Superposition refers to superposition of response due to independent sources.
* We can consider one independent source at a time, deactivate all other
independent sources.
* Deactivating a current source ⇒ is = 0, i.e., replace the current source with an
open circuit.
* Deactivating a voltage source ⇒ vs = 0, i.e., replace the voltage source with a
short circuit.
M. B. Patil, IIT Bombay
Example
2 Ω
4 Ω
i1
18 V
3 A
Example
2 Ω
4 Ω
i1
18 V
3 A
2 Ω
4 Ω
i1
18 V
Case 1: Keep Vs, deactivate Is.
Example
2 Ω
4 Ω
i1
18 V
3 A
2 Ω
4 Ω
i1
18 V
Case 1: Keep Vs, deactivate Is.
i
(1)
1 = 3 A
Example
2 Ω
4 Ω
i1
18 V
3 A
2 Ω
4 Ω
i1
18 V
Case 1: Keep Vs, deactivate Is.
i
(1)
1 = 3 A
2 Ω
4 Ω
i1
3 A
Case 2: Keep Is, deactivate Vs.
Example
2 Ω
4 Ω
i1
18 V
3 A
2 Ω
4 Ω
i1
18 V
Case 1: Keep Vs, deactivate Is.
i
(1)
1 = 3 A
2 Ω
4 Ω
i1
3 A
Case 2: Keep Is, deactivate Vs.
i
(2)
1 = 3 A ×
2 Ω
2 Ω + 4 Ω
= 1 A
Example
2 Ω
4 Ω
i1
18 V
3 A
2 Ω
4 Ω
i1
18 V
Case 1: Keep Vs, deactivate Is.
i
(1)
1 = 3 A
2 Ω
4 Ω
i1
3 A
Case 2: Keep Is, deactivate Vs.
i
(2)
1 = 3 A ×
2 Ω
2 Ω + 4 Ω
= 1 A
inet
1 = i
(1)
1 + i
(2)
1 = 3 + 1 = 4 A
M. B. Patil, IIT Bombay
Example
v
2 i
i
1 Ω
3 Ω
6 A
12 V
Example
v
2 i
i
1 Ω
3 Ω
6 A
12 V
v
2 i
i
1 Ω
3 Ω12 V
Case 1: Keep Vs, deactivate Is.
Example
v
2 i
i
1 Ω
3 Ω
6 A
12 V
v
2 i
i
1 Ω
3 Ω12 V
Case 1: Keep Vs, deactivate Is.
⇒ i = 2 A , v(1)
= 6 V .
KVL: − 12 + 3 i + 2 i + i = 0
Example
v
2 i
i
1 Ω
3 Ω
6 A
12 V
v
2 i
i
1 Ω
3 Ω12 V
Case 1: Keep Vs, deactivate Is.
⇒ i = 2 A , v(1)
= 6 V .
KVL: − 12 + 3 i + 2 i + i = 0
v
2 i
i
1 Ω
3 Ω
6 A
Case 2: Keep Is, deactivate Vs.
Example
v
2 i
i
1 Ω
3 Ω
6 A
12 V
v
2 i
i
1 Ω
3 Ω12 V
Case 1: Keep Vs, deactivate Is.
⇒ i = 2 A , v(1)
= 6 V .
KVL: − 12 + 3 i + 2 i + i = 0
v
2 i
i
1 Ω
3 Ω
6 A
Case 2: Keep Is, deactivate Vs.
KVL: i + (6 + i) 3 + 2 i = 0
⇒ i = −3 A , v(2)
= (−3 + 6) × 3 = 9 V .
Example
v
2 i
i
1 Ω
3 Ω
6 A
12 V
v
2 i
i
1 Ω
3 Ω12 V
Case 1: Keep Vs, deactivate Is.
⇒ i = 2 A , v(1)
= 6 V .
KVL: − 12 + 3 i + 2 i + i = 0
v
2 i
i
1 Ω
3 Ω
6 A
Case 2: Keep Is, deactivate Vs.
KVL: i + (6 + i) 3 + 2 i = 0
⇒ i = −3 A , v(2)
= (−3 + 6) × 3 = 9 V .
vnet = v(1) + v(2) = 6 + 9 = 15 V
M. B. Patil, IIT Bombay
Superposition: Why does it work?
R1 R3
Vs Is
V1 V2
R2
A B
0
M. B. Patil, IIT Bombay
Superposition: Why does it work?
R1 R3
Vs Is
V1 V2
R2
A B
0
KCL at nodes A and B:
1
R1
(V1 − Vs ) +
1
R2
V1 +
1
R3
(V1 − V2) = 0 ,
−Is +
1
R3
(V2 − V1) = 0 .
M. B. Patil, IIT Bombay
Superposition: Why does it work?
R1 R3
Vs Is
V1 V2
R2
A B
0
KCL at nodes A and B:
1
R1
(V1 − Vs ) +
1
R2
V1 +
1
R3
(V1 − V2) = 0 ,
−Is +
1
R3
(V2 − V1) = 0 .
Writing in a matrix form, we get (using G1 = 1/R1, etc.),
»
G1 + G2 + G3 −G3
−G3 G3
– »
V1
V2
–
=
»
G1Vs
Is
–
M. B. Patil, IIT Bombay
Superposition: Why does it work?
R1 R3
Vs Is
V1 V2
R2
A B
0
KCL at nodes A and B:
1
R1
(V1 − Vs ) +
1
R2
V1 +
1
R3
(V1 − V2) = 0 ,
−Is +
1
R3
(V2 − V1) = 0 .
Writing in a matrix form, we get (using G1 = 1/R1, etc.),
»
G1 + G2 + G3 −G3
−G3 G3
– »
V1
V2
–
=
»
G1Vs
Is
–
i.e., A
»
V1
V2
–
=
»
G1Vs
Is
–
→
»
V1
V2
–
= A
−1
»
G1Vs
Is
–
.
M. B. Patil, IIT Bombay
Superposition: Why does it work?
R1 R3
Vs Is
V1 V2
R2
A B
0
»
V1
V2
–
= A
−1
»
G1Vs
Is
–
≡
»
m11 m12
m21 m22
– »
G1Vs
Is
–
.
M. B. Patil, IIT Bombay
Superposition: Why does it work?
R1 R3
Vs Is
V1 V2
R2
A B
0
»
V1
V2
–
= A
−1
»
G1Vs
Is
–
≡
»
m11 m12
m21 m22
– »
G1Vs
Is
–
.
We are now in a position to see why superposition works.
»
V1
V2
–
=
»
m11G1 m12
m21G1 m22
– »
Vs
0
–
+
»
m11G1 m12
m21G1 m22
– »
0
Is
–
≡
"
V
(1)
1
V
(1)
2
#
+
"
V
(2)
1
V
(2)
2
#
.
M. B. Patil, IIT Bombay
Superposition: Why does it work?
R1 R3
Vs Is
V1 V2
R2
A B
0
»
V1
V2
–
= A
−1
»
G1Vs
Is
–
≡
»
m11 m12
m21 m22
– »
G1Vs
Is
–
.
We are now in a position to see why superposition works.
»
V1
V2
–
=
»
m11G1 m12
m21G1 m22
– »
Vs
0
–
+
»
m11G1 m12
m21G1 m22
– »
0
Is
–
≡
"
V
(1)
1
V
(1)
2
#
+
"
V
(2)
1
V
(2)
2
#
.
The first vector is the response due to Vs alone (and Is deactivated).
The second vector is the response due to Is alone (and Vs deactivated).
M. B. Patil, IIT Bombay
Superposition: Why does it work?
R1 R3
Vs Is
V1 V2
R2
A B
0
»
V1
V2
–
= A
−1
»
G1Vs
Is
–
≡
»
m11 m12
m21 m22
– »
G1Vs
Is
–
.
We are now in a position to see why superposition works.
»
V1
V2
–
=
»
m11G1 m12
m21G1 m22
– »
Vs
0
–
+
»
m11G1 m12
m21G1 m22
– »
0
Is
–
≡
"
V
(1)
1
V
(1)
2
#
+
"
V
(2)
1
V
(2)
2
#
.
The first vector is the response due to Vs alone (and Is deactivated).
The second vector is the response due to Is alone (and Vs deactivated).
All other currents and voltages are linearly related to V1 and V2
⇒ Any voltage (node voltage or branch voltage) or current can also be computed using
superposition.
M. B. Patil, IIT Bombay
Thevenin’s theorem
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
A
B
Thevenin’s theorem
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
A
B
A
B
RTh
VTh
M. B. Patil, IIT Bombay
Thevenin’s theorem
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
A
B
A
B
RTh
VTh
* VTh is simply VAB when nothing is connected on the other side, i.e., VTh = Voc .
M. B. Patil, IIT Bombay
Thevenin’s theorem
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
A
B
A
B
RTh
VTh
* VTh is simply VAB when nothing is connected on the other side, i.e., VTh = Voc .
* RTh can be found by different methods.
M. B. Patil, IIT Bombay
Thevenin’s theorem: RTh
Method 1:
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
A
B
A
B
RTh
VTh
* Deactivate all independent sources.
Thevenin’s theorem: RTh
Method 1:
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
A
B
A
B
RTh
VTh
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
A
B
A
B
RTh
* Deactivate all independent sources.
Thevenin’s theorem: RTh
Method 1:
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
A
B
A
B
RTh
VTh
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
A
B
A
B
RTh
* Deactivate all independent sources.
* RTh can often be found by inspection.
Thevenin’s theorem: RTh
Method 1:
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
A
B
A
B
RTh
VTh
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
A
B
A
B
RTh
A
B
Is
Vs
* Deactivate all independent sources.
* RTh can often be found by inspection.
* RTh may be found by connecting a test source.
Thevenin’s theorem: RTh
Method 1:
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
A
B
A
B
RTh
VTh
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
A
B
A
B
RTh
A
B
Is
Vs
A
B
Is
Vs
* Deactivate all independent sources.
* RTh can often be found by inspection.
* RTh may be found by connecting a test source.
Thevenin’s theorem: RTh
Method 1:
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
A
B
A
B
RTh
VTh
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
A
B
A
B
RTh
A
B
Is
Vs
A
B
Is
Vs
A
B
Is
Vs
* Deactivate all independent sources.
* RTh can often be found by inspection.
* RTh may be found by connecting a test source.
M. B. Patil, IIT Bombay
Thevenin’s theorem: RTh
Method 2:
A
B
Voc
* Find Voc .
Thevenin’s theorem: RTh
Method 2:
A
B
Voc
A
B
Isc
* Find Voc .
* Find Isc .
M. B. Patil, IIT Bombay
Thevenin’s theorem: RTh
Method 2:
A
B
Voc
A
B
Isc
* Find Voc .
* Find Isc .
* RTh =
Voc
Isc
.
M. B. Patil, IIT Bombay
Thevenin’s theorem: RTh
Method 2:
A
B
Voc
A
B
Isc
* Find Voc .
* Find Isc .
* RTh =
Voc
Isc
.
* Note: Sources are not deactivated.
M. B. Patil, IIT Bombay
Thevenin’s theorem: example
A
B
R3
RL
R1
R2
3 Ω
2 Ω
9 V
6 Ω
Thevenin’s theorem: example
A
B
R3
RL
R1
R2
3 Ω
2 Ω
9 V
6 Ω A
B
RL≡
RTh
VTh
Thevenin’s theorem: example
A
B
R3
RL
R1
R2
3 Ω
2 Ω
9 V
6 Ω A
B
RL≡
RTh
VTh
A
B
3 Ω
2 Ω
9 V
6 Ω
Voc
VTh :
Thevenin’s theorem: example
A
B
R3
RL
R1
R2
3 Ω
2 Ω
9 V
6 Ω A
B
RL≡
RTh
VTh
A
B
3 Ω
2 Ω
9 V
6 Ω
Voc
VTh :
Voc = 9 V ×
3 Ω
6 Ω + 3 Ω
= 9 V ×
1
3
= 3 V
Thevenin’s theorem: example
A
B
R3
RL
R1
R2
3 Ω
2 Ω
9 V
6 Ω A
B
RL≡
RTh
VTh
A
B
3 Ω
2 Ω
9 V
6 Ω
Voc
VTh :
Voc = 9 V ×
3 Ω
6 Ω + 3 Ω
= 9 V ×
1
3
= 3 V
A
B
3 Ω
2 Ω6 ΩRTh :
Thevenin’s theorem: example
A
B
R3
RL
R1
R2
3 Ω
2 Ω
9 V
6 Ω A
B
RL≡
RTh
VTh
A
B
3 Ω
2 Ω
9 V
6 Ω
Voc
VTh :
Voc = 9 V ×
3 Ω
6 Ω + 3 Ω
= 9 V ×
1
3
= 3 V
A
B
3 Ω
2 Ω6 ΩRTh :
RTh = (R1 R2) + R3 = (3 6) + 2
= 3 ×
1 × 2
1 + 2
+ 2 = 4 Ω
Thevenin’s theorem: example
A
B
R3
RL
R1
R2
3 Ω
2 Ω
9 V
6 Ω A
B
RL≡
RTh
VTh
A
B
3 Ω
2 Ω
9 V
6 Ω
Voc
VTh :
Voc = 9 V ×
3 Ω
6 Ω + 3 Ω
= 9 V ×
1
3
= 3 V
A
B
3 Ω
2 Ω6 ΩRTh :
RTh = (R1 R2) + R3 = (3 6) + 2
= 3 ×
1 × 2
1 + 2
+ 2 = 4 Ω
A
B
RL 3 V≡ RL
4 Ω
M. B. Patil, IIT Bombay
Maximum power transfer
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
A
B
RL
iL
Maximum power transfer
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
A
B
RL
iL * Power “transferred” to load is,
PL = i2
L RL .
Maximum power transfer
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
A
B
RL
iL * Power “transferred” to load is,
PL = i2
L RL .
* For a given black box, what is the
value of RL for which PL is
maximum?
Maximum power transfer
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
A
B
RL
iL * Power “transferred” to load is,
PL = i2
L RL .
* For a given black box, what is the
value of RL for which PL is
maximum?
* Replace the black box with its
Thevenin equivalent.
Maximum power transfer
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
A
B
RL
iL
A
B
iL
RL
RTh
VTh
* Power “transferred” to load is,
PL = i2
L RL .
* For a given black box, what is the
value of RL for which PL is
maximum?
* Replace the black box with its
Thevenin equivalent.
Maximum power transfer
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
A
B
RL
iL
A
B
iL
RL
RTh
VTh
* Power “transferred” to load is,
PL = i2
L RL .
* For a given black box, what is the
value of RL for which PL is
maximum?
* Replace the black box with its
Thevenin equivalent.
* iL =
VTh
RTh + RL
,
PL = V 2
Th ×
RL
(RTh + RL)2
.
Maximum power transfer
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
A
B
RL
iL
A
B
iL
RL
RTh
VTh
* Power “transferred” to load is,
PL = i2
L RL .
* For a given black box, what is the
value of RL for which PL is
maximum?
* Replace the black box with its
Thevenin equivalent.
* iL =
VTh
RTh + RL
,
PL = V 2
Th ×
RL
(RTh + RL)2
.
* For
dPL
dRL
= 0 , we need
(RTh + RL)2 − RL × 2 (RTh + RL)
(RTh + RL)4
= 0 ,
i.e., RTh + RL = 2 RL ⇒ RL = RTh .
Maximum power transfer
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
A
B
RL
iL
A
B
iL
RL
RTh
VTh
PL
Pmax
L
RL
RL = RTh
* Power “transferred” to load is,
PL = i2
L RL .
* For a given black box, what is the
value of RL for which PL is
maximum?
* Replace the black box with its
Thevenin equivalent.
* iL =
VTh
RTh + RL
,
PL = V 2
Th ×
RL
(RTh + RL)2
.
* For
dPL
dRL
= 0 , we need
(RTh + RL)2 − RL × 2 (RTh + RL)
(RTh + RL)4
= 0 ,
i.e., RTh + RL = 2 RL ⇒ RL = RTh .
M. B. Patil, IIT Bombay
Maximum power transfer: example
A
B
Find RL for which PL is maximum.
R3
RL
R2
R1
2 Ω3 Ω
12 V 2 A
6 Ω
Maximum power transfer: example
A
B
Find RL for which PL is maximum.
R3
RL
R2
R1
2 Ω3 Ω
12 V 2 A
6 Ω
A
B
RTh:
R3
R2
R1
2 Ω3 Ω
6 Ω
Maximum power transfer: example
A
B
Find RL for which PL is maximum.
R3
RL
R2
R1
2 Ω3 Ω
12 V 2 A
6 Ω
A
B
RTh:
R3
R2
R1
2 Ω3 Ω
6 Ω
RTh = (R1 R2) + R3 = (3 6) + 2
= 3 ×
1 × 2
1 + 2
+ 2 = 4 Ω
Maximum power transfer: example
A
B
Find RL for which PL is maximum.
R3
RL
R2
R1
2 Ω3 Ω
12 V 2 A
6 Ω
A
B
RTh:
R3
R2
R1
2 Ω3 Ω
6 Ω
RTh = (R1 R2) + R3 = (3 6) + 2
= 3 ×
1 × 2
1 + 2
+ 2 = 4 Ω
A
B
Voc:
R3
R2
R1
2 Ω3 Ω
12 V 2 A
6 Ω
Maximum power transfer: example
A
B
Find RL for which PL is maximum.
R3
RL
R2
R1
2 Ω3 Ω
12 V 2 A
6 Ω
A
B
RTh:
R3
R2
R1
2 Ω3 Ω
6 Ω
RTh = (R1 R2) + R3 = (3 6) + 2
= 3 ×
1 × 2
1 + 2
+ 2 = 4 Ω
A
B
Voc:
R3
R2
R1
2 Ω3 Ω
12 V 2 A
6 Ω
A
B
A
B
R3R3
R2 R2
R1 R1
2 Ω 2 Ω3 Ω
12 V
6 Ω
3 Ω
2 A
6 Ω
Use superposition to find Voc:
Maximum power transfer: example
A
B
Find RL for which PL is maximum.
R3
RL
R2
R1
2 Ω3 Ω
12 V 2 A
6 Ω
A
B
RTh:
R3
R2
R1
2 Ω3 Ω
6 Ω
RTh = (R1 R2) + R3 = (3 6) + 2
= 3 ×
1 × 2
1 + 2
+ 2 = 4 Ω
A
B
Voc:
R3
R2
R1
2 Ω3 Ω
12 V 2 A
6 Ω
A
B
A
B
R3R3
R2 R2
R1 R1
2 Ω 2 Ω3 Ω
12 V
6 Ω
3 Ω
2 A
6 Ω
Use superposition to find Voc:
V
(1)
oc = 12 ×
6
9
= 8 V
Maximum power transfer: example
A
B
Find RL for which PL is maximum.
R3
RL
R2
R1
2 Ω3 Ω
12 V 2 A
6 Ω
A
B
RTh:
R3
R2
R1
2 Ω3 Ω
6 Ω
RTh = (R1 R2) + R3 = (3 6) + 2
= 3 ×
1 × 2
1 + 2
+ 2 = 4 Ω
A
B
Voc:
R3
R2
R1
2 Ω3 Ω
12 V 2 A
6 Ω
A
B
A
B
R3R3
R2 R2
R1 R1
2 Ω 2 Ω3 Ω
12 V
6 Ω
3 Ω
2 A
6 Ω
Use superposition to find Voc:
V
(1)
oc = 12 ×
6
9
= 8 V V
(2)
oc = 4 Ω × 2 A = 8 V
Maximum power transfer: example
A
B
Find RL for which PL is maximum.
R3
RL
R2
R1
2 Ω3 Ω
12 V 2 A
6 Ω
A
B
RTh:
R3
R2
R1
2 Ω3 Ω
6 Ω
RTh = (R1 R2) + R3 = (3 6) + 2
= 3 ×
1 × 2
1 + 2
+ 2 = 4 Ω
A
B
Voc:
R3
R2
R1
2 Ω3 Ω
12 V 2 A
6 Ω
A
B
A
B
R3R3
R2 R2
R1 R1
2 Ω 2 Ω3 Ω
12 V
6 Ω
3 Ω
2 A
6 Ω
Use superposition to find Voc:
V
(1)
oc = 12 ×
6
9
= 8 V V
(2)
oc = 4 Ω × 2 A = 8 V
Voc = V
(1)
oc + V
(2)
oc = 8 + 8 = 16 V
Maximum power transfer: example
A
B
Find RL for which PL is maximum.
R3
RL
R2
R1
2 Ω3 Ω
12 V 2 A
6 Ω
A
B
RTh:
R3
R2
R1
2 Ω3 Ω
6 Ω
RTh = (R1 R2) + R3 = (3 6) + 2
= 3 ×
1 × 2
1 + 2
+ 2 = 4 Ω
A
B
Voc:
R3
R2
R1
2 Ω3 Ω
12 V 2 A
6 Ω
A
B
A
B
R3R3
R2 R2
R1 R1
2 Ω 2 Ω3 Ω
12 V
6 Ω
3 Ω
2 A
6 Ω
Use superposition to find Voc:
V
(1)
oc = 12 ×
6
9
= 8 V V
(2)
oc = 4 Ω × 2 A = 8 V
Voc = V
(1)
oc + V
(2)
oc = 8 + 8 = 16 V
A
B
iL
RL
Pmax
L = 22 × 4 = 16 W .
PL is maximum when RL = RTh = 4 Ω
⇒ iL = VTh/(2 RTh) = 2 A
RTh
VTh
M. B. Patil, IIT Bombay
Thevenin’s theorem: example
A B
2 Ω
6 A
12 Ω
48 V
4 Ω
12 Ω
4 Ω
Thevenin’s theorem: example
A B
2 Ω
6 A
12 Ω
48 V
4 Ω
12 Ω
4 Ω
C
A B
RTh:
2 Ω 12 Ω
4 Ω 4 Ω
12 Ω
Thevenin’s theorem: example
A B
2 Ω
6 A
12 Ω
48 V
4 Ω
12 Ω
4 Ω
C
A B
RTh:
2 Ω 12 Ω
4 Ω 4 Ω
12 Ω
C
A B
≡
4 Ω
3 Ω
Thevenin’s theorem: example
A B
2 Ω
6 A
12 Ω
48 V
4 Ω
12 Ω
4 Ω
C
A B
RTh:
2 Ω 12 Ω
4 Ω 4 Ω
12 Ω
C
A B
≡
4 Ω
3 Ω
RTh = 7 Ω⇒
Thevenin’s theorem: example
A B
2 Ω
6 A
12 Ω
48 V
4 Ω
12 Ω
4 Ω
C
A B
RTh:
2 Ω 12 Ω
4 Ω 4 Ω
12 Ω
C
A B
≡
4 Ω
3 Ω
RTh = 7 Ω⇒
A B
C
Voc
Voc:
2 Ω 12 Ω
48 V
4 Ω 4 Ω
12 Ω
6 A
i
Thevenin’s theorem: example
A B
2 Ω
6 A
12 Ω
48 V
4 Ω
12 Ω
4 Ω
C
A B
RTh:
2 Ω 12 Ω
4 Ω 4 Ω
12 Ω
C
A B
≡
4 Ω
3 Ω
RTh = 7 Ω⇒
A B
C
Voc
Voc:
2 Ω 12 Ω
48 V
4 Ω 4 Ω
12 Ω
6 A
i
VAB = VA − VB
= 24 V + 36 V = 60 V
= VAC + VCB
= (VA − VC) + (VC − VB)
Note: i = 0 (since there is no return path).
Thevenin’s theorem: example
A B
2 Ω
6 A
12 Ω
48 V
4 Ω
12 Ω
4 Ω
C
A B
RTh:
2 Ω 12 Ω
4 Ω 4 Ω
12 Ω
C
A B
≡
4 Ω
3 Ω
RTh = 7 Ω⇒
A B
C
Voc
Voc:
2 Ω 12 Ω
48 V
4 Ω 4 Ω
12 Ω
6 A
i
VAB = VA − VB
= 24 V + 36 V = 60 V
= VAC + VCB
= (VA − VC) + (VC − VB)
Note: i = 0 (since there is no return path).
VTh = 60 V
RTh = 7 Ω
Thevenin’s theorem: example
A B
2 Ω
6 A
12 Ω
48 V
4 Ω
12 Ω
4 Ω
C
A B
RTh:
2 Ω 12 Ω
4 Ω 4 Ω
12 Ω
C
A B
≡
4 Ω
3 Ω
RTh = 7 Ω⇒
A B
C
Voc
Voc:
2 Ω 12 Ω
48 V
4 Ω 4 Ω
12 Ω
6 A
i
VAB = VA − VB
= 24 V + 36 V = 60 V
= VAC + VCB
= (VA − VC) + (VC − VB)
Note: i = 0 (since there is no return path).
VTh = 60 V
RTh = 7 Ω
A B
7 Ω
60 V
M. B. Patil, IIT Bombay
Graphical method for finding VTh and RTh
SEQUEL file: ee101 thevenin 1.sqproj
A B
2 Ω
6 A
12 Ω
48 V
4 Ω 4 Ω
12 Ω
Graphical method for finding VTh and RTh
SEQUEL file: ee101 thevenin 1.sqproj
A B
2 Ω
6 A
12 Ω
48 V
4 Ω 4 Ω
12 Ω
i
v
A B
2 Ω
4 Ω
48 V6 A
12 Ω
4 Ω
12 Ω
Connect a voltage source between A and B.
Plot i versus v.
Voc = intercept on the v-axis.
Isc = intercept on the i-axis.
Graphical method for finding VTh and RTh
SEQUEL file: ee101 thevenin 1.sqproj
A B
2 Ω
6 A
12 Ω
48 V
4 Ω 4 Ω
12 Ω
i
v
A B
2 Ω
4 Ω
48 V6 A
12 Ω
4 Ω
12 Ω
Connect a voltage source between A and B.
Plot i versus v.
Voc = intercept on the v-axis.
Isc = intercept on the i-axis.
0
2
4
6
8
10
v (Volt)
0 20 40 60
i(Amp)
Graphical method for finding VTh and RTh
SEQUEL file: ee101 thevenin 1.sqproj
A B
2 Ω
6 A
12 Ω
48 V
4 Ω 4 Ω
12 Ω
i
v
A B
2 Ω
4 Ω
48 V6 A
12 Ω
4 Ω
12 Ω
Connect a voltage source between A and B.
Plot i versus v.
Voc = intercept on the v-axis.
Isc = intercept on the i-axis.
0
2
4
6
8
10
v (Volt)
0 20 40 60
i(Amp)
Voc = 60 V, Isc = 8.5714 A
RTh = Vsc/Isc = 7 Ω
Graphical method for finding VTh and RTh
SEQUEL file: ee101 thevenin 1.sqproj
A B
2 Ω
6 A
12 Ω
48 V
4 Ω 4 Ω
12 Ω
i
v
A B
2 Ω
4 Ω
48 V6 A
12 Ω
4 Ω
12 Ω
Connect a voltage source between A and B.
Plot i versus v.
Voc = intercept on the v-axis.
Isc = intercept on the i-axis.
0
2
4
6
8
10
v (Volt)
0 20 40 60
i(Amp)
Voc = 60 V, Isc = 8.5714 A
RTh = Vsc/Isc = 7 Ω
A B
7 Ω
VTh = 60 V
RTh = 7 Ω
60 V
M. B. Patil, IIT Bombay
Norton equivalent circuit
A
B
RTh
VTh
Norton equivalent circuit
A
B
RTh
VTh
A
B
IN
RN
Norton equivalent circuit
A
B
RTh
VTh
A
B
IN
RN
* Consider the open circuit case.
Norton equivalent circuit
A
B
RTh
VTh
A
B
IN
RN
* Consider the open circuit case.
Thevenin circuit: VAB = VTh .
Norton equivalent circuit
A
B
RTh
VTh
A
B
IN
RN
* Consider the open circuit case.
Thevenin circuit: VAB = VTh .
Norton circuit: VAB = IN RN .
Norton equivalent circuit
A
B
RTh
VTh
A
B
IN
RN
* Consider the open circuit case.
Thevenin circuit: VAB = VTh .
Norton circuit: VAB = IN RN .
⇒ VTh = IN RN .
Norton equivalent circuit
A
B
RTh
VTh
A
B
IN
RN
A
B
A
B
Isc IscVTh
IN
RN
RTh
* Consider the open circuit case.
Thevenin circuit: VAB = VTh .
Norton circuit: VAB = IN RN .
⇒ VTh = IN RN .
* Consider the short circuit case.
Norton equivalent circuit
A
B
RTh
VTh
A
B
IN
RN
A
B
A
B
Isc IscVTh
IN
RN
RTh
* Consider the open circuit case.
Thevenin circuit: VAB = VTh .
Norton circuit: VAB = IN RN .
⇒ VTh = IN RN .
* Consider the short circuit case.
Thevenin circuit: Isc = VTh/RTh .
Norton equivalent circuit
A
B
RTh
VTh
A
B
IN
RN
A
B
A
B
Isc IscVTh
IN
RN
RTh
* Consider the open circuit case.
Thevenin circuit: VAB = VTh .
Norton circuit: VAB = IN RN .
⇒ VTh = IN RN .
* Consider the short circuit case.
Thevenin circuit: Isc = VTh/RTh .
Norton circuit: Isc = IN .
Norton equivalent circuit
A
B
RTh
VTh
A
B
IN
RN
A
B
A
B
Isc IscVTh
IN
RN
RTh
* Consider the open circuit case.
Thevenin circuit: VAB = VTh .
Norton circuit: VAB = IN RN .
⇒ VTh = IN RN .
* Consider the short circuit case.
Thevenin circuit: Isc = VTh/RTh .
Norton circuit: Isc = IN .
⇒ RTh = RN .
M. B. Patil, IIT Bombay
Example
20 V
1 Ai5 Ω
10 Ω
Example
20 V
1 Ai5 Ω
10 Ω
A
B
Example
20 V
1 Ai5 Ω
10 Ω
A
B
RN = 5 Ω
IN =
20 V
5 Ω
= 4 A
Example
20 V
1 Ai5 Ω
10 Ω
A
B
RN = 5 Ω
IN =
20 V
5 Ω
= 4 A
A
B
1 Ai
10 Ω5 Ω
4 A
Example
20 V
1 Ai5 Ω
10 Ω
A
B
RN = 5 Ω
IN =
20 V
5 Ω
= 4 A
A
B
1 Ai
10 Ω5 Ω
4 A
i
10 Ω5 Ω
3 A
Example
20 V
1 Ai5 Ω
10 Ω
A
B
RN = 5 Ω
IN =
20 V
5 Ω
= 4 A
A
B
1 Ai
10 Ω5 Ω
4 A
i
10 Ω5 Ω
3 A
= 1 A
i = 3 A ×
5
5 + 10
M. B. Patil, IIT Bombay
Example
20 V
1 Ai5 Ω
10 Ω
A
B
RN = 5 Ω
IN =
20 V
5 Ω
= 4 A
A
B
1 Ai
10 Ω5 Ω
4 A
i
10 Ω5 Ω
3 A
= 1 A
i = 3 A ×
5
5 + 10
Home work:
* Find i by superposition and compare.
M. B. Patil, IIT Bombay
Example
20 V
1 Ai5 Ω
10 Ω
A
B
RN = 5 Ω
IN =
20 V
5 Ω
= 4 A
A
B
1 Ai
10 Ω5 Ω
4 A
i
10 Ω5 Ω
3 A
= 1 A
i = 3 A ×
5
5 + 10
Home work:
* Find i by superposition and compare.
* Compute the power absorbed by each element and verify that
P
Pi = 0 .
M. B. Patil, IIT Bombay

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EE101: Basics - Kirchhoff's Laws, Circuit Elements, and Resistor Combinations

  • 1. EE101: Basics KCL, KVL, power, Thevenin’s theorem M. B. Patil mbpatil@ee.iitb.ac.in Department of Electrical Engineering Indian Institute of Technology Bombay M. B. Patil, IIT Bombay
  • 3. Kirchhoff’s laws 4 vα v6 v3 v2 i5 V0 I0v5 i4R3i6 i3 v4 i2 R2 R1 v1 i1 A B C DE * Kirchhoff’s current law (KCL):P ik = 0 at each node. M. B. Patil, IIT Bombay
  • 4. Kirchhoff’s laws 4 vα v6 v3 v2 i5 V0 I0v5 i4R3i6 i3 v4 i2 R2 R1 v1 i1 A B C DE * Kirchhoff’s current law (KCL):P ik = 0 at each node. e.g., at node B, −i3 + i6 + i4 = 0. M. B. Patil, IIT Bombay
  • 5. Kirchhoff’s laws 4 vα v6 v3 v2 i5 V0 I0v5 i4R3i6 i3 v4 i2 R2 R1 v1 i1 A B C DE * Kirchhoff’s current law (KCL):P ik = 0 at each node. e.g., at node B, −i3 + i6 + i4 = 0. (We have followed the convention that current leaving a node is positive.) M. B. Patil, IIT Bombay
  • 6. Kirchhoff’s laws 4 vα v6 v3 v2 i5 V0 I0v5 i4R3i6 i3 v4 i2 R2 R1 v1 i1 A B C DE * Kirchhoff’s current law (KCL):P ik = 0 at each node. e.g., at node B, −i3 + i6 + i4 = 0. (We have followed the convention that current leaving a node is positive.) * Kirchhoff’s voltage law (KVL):P vk = 0 for each loop. M. B. Patil, IIT Bombay
  • 7. Kirchhoff’s laws 4 vα v6 v3 v2 i5 V0 I0v5 i4R3i6 i3 v4 i2 R2 R1 v1 i1 A B C DE * Kirchhoff’s current law (KCL):P ik = 0 at each node. e.g., at node B, −i3 + i6 + i4 = 0. (We have followed the convention that current leaving a node is positive.) * Kirchhoff’s voltage law (KVL):P vk = 0 for each loop. e.g., v3 + v6 − v1 − v2 = 0. M. B. Patil, IIT Bombay
  • 8. Kirchhoff’s laws 4 vα v6 v3 v2 i5 V0 I0v5 i4R3i6 i3 v4 i2 R2 R1 v1 i1 A B C DE * Kirchhoff’s current law (KCL):P ik = 0 at each node. e.g., at node B, −i3 + i6 + i4 = 0. (We have followed the convention that current leaving a node is positive.) * Kirchhoff’s voltage law (KVL):P vk = 0 for each loop. e.g., v3 + v6 − v1 − v2 = 0. (We have followed the convention that voltage drop across a branch is positive.) M. B. Patil, IIT Bombay
  • 9. Circuit elements Element Symbol Equation Resistor v i v = R i Inductor v i v = L di dt Capacitor v i i = C dv dt Diode v i to be discussed BJT C E B to be discussed M. B. Patil, IIT Bombay
  • 10. Sources Element Symbol Equation Independent Voltage source v i v(t) = vs (t) Current source v i i(t) = is (t) Dependent VCVS v i v(t) = α vc (t) VCCS v i i(t) = g vc (t) CCVS v i v(t) = r ic (t) CCCS v i i(t) = β ic (t) * α, β: dimensionless, r: Ω, g: Ω−1 or (“mho”) * The subscript ‘c’ denotes the controlling voltage or current. M. B. Patil, IIT Bombay
  • 11. Instantaneous power absorbed by an element i2 iN i3 i1 V1 VN V2 V3 P(t) = V1(t) i1(t) + V2(t) i2(t) + · · · + VN (t) iN (t) , where V1, V2, etc. are “node voltages” (measured with respect to a reference node). M. B. Patil, IIT Bombay
  • 12. Instantaneous power absorbed by an element i2 iN i3 i1 V1 VN V2 V3 P(t) = V1(t) i1(t) + V2(t) i2(t) + · · · + VN (t) iN (t) , where V1, V2, etc. are “node voltages” (measured with respect to a reference node). * two-terminal element: V1 i1 V2 v i2 P = V1 i1 + V2 i2 = V1 i1 + V2 (−i1) = [V1 − V2] i1 = v i1 M. B. Patil, IIT Bombay
  • 13. Instantaneous power absorbed by an element i2 iN i3 i1 V1 VN V2 V3 P(t) = V1(t) i1(t) + V2(t) i2(t) + · · · + VN (t) iN (t) , where V1, V2, etc. are “node voltages” (measured with respect to a reference node). * two-terminal element: V1 i1 V2 v i2 P = V1 i1 + V2 i2 = V1 i1 + V2 (−i1) = [V1 − V2] i1 = v i1 * three-terminal element: iB iE iC VC VB VE P = VB iB + VC iC + VE (−iE ) = VB iB + VC iC − VE (iB + iC ) = (VB − VE ) iB + (VC − VE ) iC = VBE iB + VCE iE M. B. Patil, IIT Bombay
  • 14. Instantaneous power * A resistor can only absorb power (from the circuit) since v and i have the same sign, making P > 0. The energy “absorbed” by a resistor goes in heating the resistor and the rest of the world. M. B. Patil, IIT Bombay
  • 15. Instantaneous power * A resistor can only absorb power (from the circuit) since v and i have the same sign, making P > 0. The energy “absorbed” by a resistor goes in heating the resistor and the rest of the world. * Often, a “heat sink” is provided to dissipate the thermal energy effectively so that the device temperature does not become too high. M. B. Patil, IIT Bombay
  • 16. Instantaneous power * A resistor can only absorb power (from the circuit) since v and i have the same sign, making P > 0. The energy “absorbed” by a resistor goes in heating the resistor and the rest of the world. * Often, a “heat sink” is provided to dissipate the thermal energy effectively so that the device temperature does not become too high. * A source (e.g., a DC voltage source) can absorb or deliver power since the signs of v and i are independent. For example, when a battery is charged, it absorbs energy which gets stored within. M. B. Patil, IIT Bombay
  • 17. Instantaneous power * A resistor can only absorb power (from the circuit) since v and i have the same sign, making P > 0. The energy “absorbed” by a resistor goes in heating the resistor and the rest of the world. * Often, a “heat sink” is provided to dissipate the thermal energy effectively so that the device temperature does not become too high. * A source (e.g., a DC voltage source) can absorb or deliver power since the signs of v and i are independent. For example, when a battery is charged, it absorbs energy which gets stored within. * A capacitor can absorb or deliver power. When it is absorbing power, its charge builds up. Similarly, an inductor can store energy (in the form of magnetic flux). M. B. Patil, IIT Bombay
  • 18. Resistors in series A B A B R2R1 i R v3 R3 v2 i v1 v M. B. Patil, IIT Bombay
  • 19. Resistors in series A B A B R2R1 i R v3 R3 v2 i v1 v v1 = i R1, v2 = i R2, v3 = i R3, ⇒ v = v1 + v2 + v3 = i (R1 + R2 + R3) M. B. Patil, IIT Bombay
  • 20. Resistors in series A B A B R2R1 i R v3 R3 v2 i v1 v v1 = i R1, v2 = i R2, v3 = i R3, ⇒ v = v1 + v2 + v3 = i (R1 + R2 + R3) * The equivalent resistance is Req = R1 + R2 + R3. M. B. Patil, IIT Bombay
  • 21. Resistors in series A B A B R2R1 i R v3 R3 v2 i v1 v v1 = i R1, v2 = i R2, v3 = i R3, ⇒ v = v1 + v2 + v3 = i (R1 + R2 + R3) * The equivalent resistance is Req = R1 + R2 + R3. * The voltage drop across Rk is v × Rk Req . M. B. Patil, IIT Bombay
  • 22. Resistors in parallel A AB B R2 R1 i R R3 v i1 i2 i3 i v M. B. Patil, IIT Bombay
  • 23. Resistors in parallel A AB B R2 R1 i R R3 v i1 i2 i3 i v i1 = G1 v, i2 = G2 v, i3 = G3 v, where G1 = 1/R1, etc. ⇒ i = i1 + i2 + i3 = (G1 + G2 + G3) v . M. B. Patil, IIT Bombay
  • 24. Resistors in parallel A AB B R2 R1 i R R3 v i1 i2 i3 i v i1 = G1 v, i2 = G2 v, i3 = G3 v, where G1 = 1/R1, etc. ⇒ i = i1 + i2 + i3 = (G1 + G2 + G3) v . * The equivalent conductance is Geq = G1 + G2 + G3, and the equivalent resistance is Req = 1/Geq. M. B. Patil, IIT Bombay
  • 25. Resistors in parallel A AB B R2 R1 i R R3 v i1 i2 i3 i v i1 = G1 v, i2 = G2 v, i3 = G3 v, where G1 = 1/R1, etc. ⇒ i = i1 + i2 + i3 = (G1 + G2 + G3) v . * The equivalent conductance is Geq = G1 + G2 + G3, and the equivalent resistance is Req = 1/Geq. * The current through Rk is i × Gk Geq . M. B. Patil, IIT Bombay
  • 26. Resistors in parallel A AB B R2 R1 i R R3 v i1 i2 i3 i v i1 = G1 v, i2 = G2 v, i3 = G3 v, where G1 = 1/R1, etc. ⇒ i = i1 + i2 + i3 = (G1 + G2 + G3) v . * The equivalent conductance is Geq = G1 + G2 + G3, and the equivalent resistance is Req = 1/Geq. * The current through Rk is i × Gk Geq . * If N = 2, we have Req = R1 R2 R1 + R2 , i1 = i × R2 R1 + R2 , i2 = i × R1 R1 + R2 . M. B. Patil, IIT Bombay
  • 27. Resistors in parallel A AB B R2 R1 i R R3 v i1 i2 i3 i v i1 = G1 v, i2 = G2 v, i3 = G3 v, where G1 = 1/R1, etc. ⇒ i = i1 + i2 + i3 = (G1 + G2 + G3) v . * The equivalent conductance is Geq = G1 + G2 + G3, and the equivalent resistance is Req = 1/Geq. * The current through Rk is i × Gk Geq . * If N = 2, we have Req = R1 R2 R1 + R2 , i1 = i × R2 R1 + R2 , i2 = i × R1 R1 + R2 . * If Rk = 0, all of the current will go through Rk . M. B. Patil, IIT Bombay
  • 28. Example (a) 3 Ω i1 4 Ω 3 Ω 2 Ω 2.52.55 6 V i2
  • 29. Example (a) 3 Ω i1 4 Ω 3 Ω 2 Ω 2.52.55 6 V i2
  • 30. Example (a) 3 Ω i1 4 Ω 3 Ω 2 Ω 2.52.55 6 V i2 (b) 2 Ω4 Ω i2 i1 3 Ω 3 Ω 1 Ω 6 V
  • 31. Example (a) 3 Ω i1 4 Ω 3 Ω 2 Ω 2.52.55 6 V i2 (b) 2 Ω4 Ω i2 i1 3 Ω 3 Ω 1 Ω 6 V
  • 32. Example (a) 3 Ω i1 4 Ω 3 Ω 2 Ω 2.52.55 6 V i2 (b) 2 Ω4 Ω i2 i1 3 Ω 3 Ω 1 Ω 6 V (c) 4 Ω i1 6 V i2 3 6
  • 33. Example (a) 3 Ω i1 4 Ω 3 Ω 2 Ω 2.52.55 6 V i2 (b) 2 Ω4 Ω i2 i1 3 Ω 3 Ω 1 Ω 6 V (c) 4 Ω i1 6 V i2 3 6
  • 34. Example (a) 3 Ω i1 4 Ω 3 Ω 2 Ω 2.52.55 6 V i2 (b) 2 Ω4 Ω i2 i1 3 Ω 3 Ω 1 Ω 6 V (c) 4 Ω i1 6 V i2 3 6 (d) i1 6 V 2 Ω 4 Ω
  • 35. Example (a) 3 Ω i1 4 Ω 3 Ω 2 Ω 2.52.55 6 V i2 (b) 2 Ω4 Ω i2 i1 3 Ω 3 Ω 1 Ω 6 V (c) 4 Ω i1 6 V i2 3 6 (d) i1 6 V 2 Ω 4 Ω i1 = 6 V 4 Ω + 2 Ω = 1 A .
  • 36. Example (a) 3 Ω i1 4 Ω 3 Ω 2 Ω 2.52.55 6 V i2 (b) 2 Ω4 Ω i2 i1 3 Ω 3 Ω 1 Ω 6 V (c) 4 Ω i1 6 V i2 3 6 (d) i1 6 V 2 Ω 4 Ω i1 = 6 V 4 Ω + 2 Ω = 1 A . i2 = i1 × 6 Ω 6 Ω + 3 Ω = 2 3 A . M. B. Patil, IIT Bombay
  • 37. Example (a) 3 Ω i1 4 Ω 3 Ω 2 Ω 2.52.55 6 V i2 (b) 2 Ω4 Ω i2 i1 3 Ω 3 Ω 1 Ω 6 V (c) 4 Ω i1 6 V i2 3 6 (d) i1 6 V 2 Ω 4 Ω i1 = 6 V 4 Ω + 2 Ω = 1 A . i2 = i1 × 6 Ω 6 Ω + 3 Ω = 2 3 A . Home work: * Verify that KCL and KVL are satisfied for each node/loop. M. B. Patil, IIT Bombay
  • 38. Example (a) 3 Ω i1 4 Ω 3 Ω 2 Ω 2.52.55 6 V i2 (b) 2 Ω4 Ω i2 i1 3 Ω 3 Ω 1 Ω 6 V (c) 4 Ω i1 6 V i2 3 6 (d) i1 6 V 2 Ω 4 Ω i1 = 6 V 4 Ω + 2 Ω = 1 A . i2 = i1 × 6 Ω 6 Ω + 3 Ω = 2 3 A . Home work: * Verify that KCL and KVL are satisfied for each node/loop. * Verify that the total power absorbed by the resistors is equal to the power supplied by the source. M. B. Patil, IIT Bombay
  • 40. Nodal analysis I k v3 R2 V2 v3 0 R1 3R 4R 0 V 1 V3 * Take some node as the “reference node” and denote the node voltages of the remaining nodes by V1, V2, etc. M. B. Patil, IIT Bombay
  • 41. Nodal analysis I k v3 R2 V2 v3 0 R1 3R 4R 0 V 1 V3 * Take some node as the “reference node” and denote the node voltages of the remaining nodes by V1, V2, etc. * Write KCL at each node in terms of the node voltages. Follow a fixed convention, e.g., current leaving a node is positive. M. B. Patil, IIT Bombay
  • 42. Nodal analysis I k v3 R2 V2 v3 0 R1 3R 4R 0 V 1 V3 * Take some node as the “reference node” and denote the node voltages of the remaining nodes by V1, V2, etc. * Write KCL at each node in terms of the node voltages. Follow a fixed convention, e.g., current leaving a node is positive. 1 R1 (V1 − V2) − I0 − k (V2 − V3) = 0 , 1 R1 (V2 − V1) + 1 R3 (V2 − V3) + 1 R2 (V2) = 0 , k (V2 − V3) + 1 R3 (V3 − V2) + 1 R4 (V3) = 0 . M. B. Patil, IIT Bombay
  • 43. Nodal analysis I k v3 R2 V2 v3 0 R1 3R 4R 0 V 1 V3 * Take some node as the “reference node” and denote the node voltages of the remaining nodes by V1, V2, etc. * Write KCL at each node in terms of the node voltages. Follow a fixed convention, e.g., current leaving a node is positive. 1 R1 (V1 − V2) − I0 − k (V2 − V3) = 0 , 1 R1 (V2 − V1) + 1 R3 (V2 − V3) + 1 R2 (V2) = 0 , k (V2 − V3) + 1 R3 (V3 − V2) + 1 R4 (V3) = 0 . * Solve for the node voltages → branch voltages and currents. M. B. Patil, IIT Bombay
  • 44. Nodal analysis I k v3 R2 V2 v3 0 R1 3R 4R 0 V 1 V3 * Take some node as the “reference node” and denote the node voltages of the remaining nodes by V1, V2, etc. * Write KCL at each node in terms of the node voltages. Follow a fixed convention, e.g., current leaving a node is positive. 1 R1 (V1 − V2) − I0 − k (V2 − V3) = 0 , 1 R1 (V2 − V1) + 1 R3 (V2 − V3) + 1 R2 (V2) = 0 , k (V2 − V3) + 1 R3 (V3 − V2) + 1 R4 (V3) = 0 . * Solve for the node voltages → branch voltages and currents. * Remark: Nodal analysis needs to be modified if there are voltage sources. M. B. Patil, IIT Bombay
  • 45. Mesh analysis R1 R2 R3Vs is i1 i2 r1 is M. B. Patil, IIT Bombay
  • 46. Mesh analysis R1 R2 R3Vs is i1 i2 r1 is * Write KVL for each loop in terms of the “mesh currents” i1 and i2. Use a fixed convention, e.g., voltage drop is positive. (Note that is = i1 − i2.) M. B. Patil, IIT Bombay
  • 47. Mesh analysis R1 R2 R3Vs is i1 i2 r1 is * Write KVL for each loop in terms of the “mesh currents” i1 and i2. Use a fixed convention, e.g., voltage drop is positive. (Note that is = i1 − i2.) −Vs + i1 R1 + (i1 − i2) R3 = 0 , R2 i2 + r1 (i1 − i2) + (i2 − i1) R3 = 0 . M. B. Patil, IIT Bombay
  • 48. Mesh analysis R1 R2 R3Vs is i1 i2 r1 is * Write KVL for each loop in terms of the “mesh currents” i1 and i2. Use a fixed convention, e.g., voltage drop is positive. (Note that is = i1 − i2.) −Vs + i1 R1 + (i1 − i2) R3 = 0 , R2 i2 + r1 (i1 − i2) + (i2 − i1) R3 = 0 . * Solve for i1 and i2 → compute other quantities of interest (branch currents and branch voltages). M. B. Patil, IIT Bombay
  • 49. Linearity and superposition * A circuit containing independent sources, dependent sources, and resistors is linear, i.e., the system of equations describing the circuit is linear. M. B. Patil, IIT Bombay
  • 50. Linearity and superposition * A circuit containing independent sources, dependent sources, and resistors is linear, i.e., the system of equations describing the circuit is linear. * The dependent sources are assumed to be linear, e.g., if we have a CCVS with v = a i2 c + b, the resulting system will be no longer linear. M. B. Patil, IIT Bombay
  • 51. Linearity and superposition * A circuit containing independent sources, dependent sources, and resistors is linear, i.e., the system of equations describing the circuit is linear. * The dependent sources are assumed to be linear, e.g., if we have a CCVS with v = a i2 c + b, the resulting system will be no longer linear. * For a linear system, we can apply the principle of superposition. M. B. Patil, IIT Bombay
  • 52. Linearity and superposition * A circuit containing independent sources, dependent sources, and resistors is linear, i.e., the system of equations describing the circuit is linear. * The dependent sources are assumed to be linear, e.g., if we have a CCVS with v = a i2 c + b, the resulting system will be no longer linear. * For a linear system, we can apply the principle of superposition. * In the context of circuits, superposition enables us to consider the independent sources one at a time, compute the desired quantity of interest in each case, and get the net result by adding the individual contributions. M. B. Patil, IIT Bombay
  • 53. Linearity and superposition * A circuit containing independent sources, dependent sources, and resistors is linear, i.e., the system of equations describing the circuit is linear. * The dependent sources are assumed to be linear, e.g., if we have a CCVS with v = a i2 c + b, the resulting system will be no longer linear. * For a linear system, we can apply the principle of superposition. * In the context of circuits, superposition enables us to consider the independent sources one at a time, compute the desired quantity of interest in each case, and get the net result by adding the individual contributions. * Caution: Superposition cannot be applied to dependent sources. M. B. Patil, IIT Bombay
  • 54. Superposition * Superposition refers to superposition of response due to independent sources. M. B. Patil, IIT Bombay
  • 55. Superposition * Superposition refers to superposition of response due to independent sources. * We can consider one independent source at a time, deactivate all other independent sources. M. B. Patil, IIT Bombay
  • 56. Superposition * Superposition refers to superposition of response due to independent sources. * We can consider one independent source at a time, deactivate all other independent sources. * Deactivating a current source ⇒ is = 0, i.e., replace the current source with an open circuit. M. B. Patil, IIT Bombay
  • 57. Superposition * Superposition refers to superposition of response due to independent sources. * We can consider one independent source at a time, deactivate all other independent sources. * Deactivating a current source ⇒ is = 0, i.e., replace the current source with an open circuit. * Deactivating a voltage source ⇒ vs = 0, i.e., replace the voltage source with a short circuit. M. B. Patil, IIT Bombay
  • 59. Example 2 Ω 4 Ω i1 18 V 3 A 2 Ω 4 Ω i1 18 V Case 1: Keep Vs, deactivate Is.
  • 60. Example 2 Ω 4 Ω i1 18 V 3 A 2 Ω 4 Ω i1 18 V Case 1: Keep Vs, deactivate Is. i (1) 1 = 3 A
  • 61. Example 2 Ω 4 Ω i1 18 V 3 A 2 Ω 4 Ω i1 18 V Case 1: Keep Vs, deactivate Is. i (1) 1 = 3 A 2 Ω 4 Ω i1 3 A Case 2: Keep Is, deactivate Vs.
  • 62. Example 2 Ω 4 Ω i1 18 V 3 A 2 Ω 4 Ω i1 18 V Case 1: Keep Vs, deactivate Is. i (1) 1 = 3 A 2 Ω 4 Ω i1 3 A Case 2: Keep Is, deactivate Vs. i (2) 1 = 3 A × 2 Ω 2 Ω + 4 Ω = 1 A
  • 63. Example 2 Ω 4 Ω i1 18 V 3 A 2 Ω 4 Ω i1 18 V Case 1: Keep Vs, deactivate Is. i (1) 1 = 3 A 2 Ω 4 Ω i1 3 A Case 2: Keep Is, deactivate Vs. i (2) 1 = 3 A × 2 Ω 2 Ω + 4 Ω = 1 A inet 1 = i (1) 1 + i (2) 1 = 3 + 1 = 4 A M. B. Patil, IIT Bombay
  • 64. Example v 2 i i 1 Ω 3 Ω 6 A 12 V
  • 65. Example v 2 i i 1 Ω 3 Ω 6 A 12 V v 2 i i 1 Ω 3 Ω12 V Case 1: Keep Vs, deactivate Is.
  • 66. Example v 2 i i 1 Ω 3 Ω 6 A 12 V v 2 i i 1 Ω 3 Ω12 V Case 1: Keep Vs, deactivate Is. ⇒ i = 2 A , v(1) = 6 V . KVL: − 12 + 3 i + 2 i + i = 0
  • 67. Example v 2 i i 1 Ω 3 Ω 6 A 12 V v 2 i i 1 Ω 3 Ω12 V Case 1: Keep Vs, deactivate Is. ⇒ i = 2 A , v(1) = 6 V . KVL: − 12 + 3 i + 2 i + i = 0 v 2 i i 1 Ω 3 Ω 6 A Case 2: Keep Is, deactivate Vs.
  • 68. Example v 2 i i 1 Ω 3 Ω 6 A 12 V v 2 i i 1 Ω 3 Ω12 V Case 1: Keep Vs, deactivate Is. ⇒ i = 2 A , v(1) = 6 V . KVL: − 12 + 3 i + 2 i + i = 0 v 2 i i 1 Ω 3 Ω 6 A Case 2: Keep Is, deactivate Vs. KVL: i + (6 + i) 3 + 2 i = 0 ⇒ i = −3 A , v(2) = (−3 + 6) × 3 = 9 V .
  • 69. Example v 2 i i 1 Ω 3 Ω 6 A 12 V v 2 i i 1 Ω 3 Ω12 V Case 1: Keep Vs, deactivate Is. ⇒ i = 2 A , v(1) = 6 V . KVL: − 12 + 3 i + 2 i + i = 0 v 2 i i 1 Ω 3 Ω 6 A Case 2: Keep Is, deactivate Vs. KVL: i + (6 + i) 3 + 2 i = 0 ⇒ i = −3 A , v(2) = (−3 + 6) × 3 = 9 V . vnet = v(1) + v(2) = 6 + 9 = 15 V M. B. Patil, IIT Bombay
  • 70. Superposition: Why does it work? R1 R3 Vs Is V1 V2 R2 A B 0 M. B. Patil, IIT Bombay
  • 71. Superposition: Why does it work? R1 R3 Vs Is V1 V2 R2 A B 0 KCL at nodes A and B: 1 R1 (V1 − Vs ) + 1 R2 V1 + 1 R3 (V1 − V2) = 0 , −Is + 1 R3 (V2 − V1) = 0 . M. B. Patil, IIT Bombay
  • 72. Superposition: Why does it work? R1 R3 Vs Is V1 V2 R2 A B 0 KCL at nodes A and B: 1 R1 (V1 − Vs ) + 1 R2 V1 + 1 R3 (V1 − V2) = 0 , −Is + 1 R3 (V2 − V1) = 0 . Writing in a matrix form, we get (using G1 = 1/R1, etc.), » G1 + G2 + G3 −G3 −G3 G3 – » V1 V2 – = » G1Vs Is – M. B. Patil, IIT Bombay
  • 73. Superposition: Why does it work? R1 R3 Vs Is V1 V2 R2 A B 0 KCL at nodes A and B: 1 R1 (V1 − Vs ) + 1 R2 V1 + 1 R3 (V1 − V2) = 0 , −Is + 1 R3 (V2 − V1) = 0 . Writing in a matrix form, we get (using G1 = 1/R1, etc.), » G1 + G2 + G3 −G3 −G3 G3 – » V1 V2 – = » G1Vs Is – i.e., A » V1 V2 – = » G1Vs Is – → » V1 V2 – = A −1 » G1Vs Is – . M. B. Patil, IIT Bombay
  • 74. Superposition: Why does it work? R1 R3 Vs Is V1 V2 R2 A B 0 » V1 V2 – = A −1 » G1Vs Is – ≡ » m11 m12 m21 m22 – » G1Vs Is – . M. B. Patil, IIT Bombay
  • 75. Superposition: Why does it work? R1 R3 Vs Is V1 V2 R2 A B 0 » V1 V2 – = A −1 » G1Vs Is – ≡ » m11 m12 m21 m22 – » G1Vs Is – . We are now in a position to see why superposition works. » V1 V2 – = » m11G1 m12 m21G1 m22 – » Vs 0 – + » m11G1 m12 m21G1 m22 – » 0 Is – ≡ " V (1) 1 V (1) 2 # + " V (2) 1 V (2) 2 # . M. B. Patil, IIT Bombay
  • 76. Superposition: Why does it work? R1 R3 Vs Is V1 V2 R2 A B 0 » V1 V2 – = A −1 » G1Vs Is – ≡ » m11 m12 m21 m22 – » G1Vs Is – . We are now in a position to see why superposition works. » V1 V2 – = » m11G1 m12 m21G1 m22 – » Vs 0 – + » m11G1 m12 m21G1 m22 – » 0 Is – ≡ " V (1) 1 V (1) 2 # + " V (2) 1 V (2) 2 # . The first vector is the response due to Vs alone (and Is deactivated). The second vector is the response due to Is alone (and Vs deactivated). M. B. Patil, IIT Bombay
  • 77. Superposition: Why does it work? R1 R3 Vs Is V1 V2 R2 A B 0 » V1 V2 – = A −1 » G1Vs Is – ≡ » m11 m12 m21 m22 – » G1Vs Is – . We are now in a position to see why superposition works. » V1 V2 – = » m11G1 m12 m21G1 m22 – » Vs 0 – + » m11G1 m12 m21G1 m22 – » 0 Is – ≡ " V (1) 1 V (1) 2 # + " V (2) 1 V (2) 2 # . The first vector is the response due to Vs alone (and Is deactivated). The second vector is the response due to Is alone (and Vs deactivated). All other currents and voltages are linearly related to V1 and V2 ⇒ Any voltage (node voltage or branch voltage) or current can also be computed using superposition. M. B. Patil, IIT Bombay
  • 79. Thevenin’s theorem Circuit (resistors, voltage sources, current sources, CCVS, CCCS, VCVS, VCCS) A B A B RTh VTh M. B. Patil, IIT Bombay
  • 80. Thevenin’s theorem Circuit (resistors, voltage sources, current sources, CCVS, CCCS, VCVS, VCCS) A B A B RTh VTh * VTh is simply VAB when nothing is connected on the other side, i.e., VTh = Voc . M. B. Patil, IIT Bombay
  • 81. Thevenin’s theorem Circuit (resistors, voltage sources, current sources, CCVS, CCCS, VCVS, VCCS) A B A B RTh VTh * VTh is simply VAB when nothing is connected on the other side, i.e., VTh = Voc . * RTh can be found by different methods. M. B. Patil, IIT Bombay
  • 82. Thevenin’s theorem: RTh Method 1: Circuit (resistors, voltage sources, current sources, CCVS, CCCS, VCVS, VCCS) A B A B RTh VTh * Deactivate all independent sources.
  • 83. Thevenin’s theorem: RTh Method 1: Circuit (resistors, voltage sources, current sources, CCVS, CCCS, VCVS, VCCS) A B A B RTh VTh Circuit (resistors, voltage sources, current sources, CCVS, CCCS, VCVS, VCCS) A B A B RTh * Deactivate all independent sources.
  • 84. Thevenin’s theorem: RTh Method 1: Circuit (resistors, voltage sources, current sources, CCVS, CCCS, VCVS, VCCS) A B A B RTh VTh Circuit (resistors, voltage sources, current sources, CCVS, CCCS, VCVS, VCCS) A B A B RTh * Deactivate all independent sources. * RTh can often be found by inspection.
  • 85. Thevenin’s theorem: RTh Method 1: Circuit (resistors, voltage sources, current sources, CCVS, CCCS, VCVS, VCCS) A B A B RTh VTh Circuit (resistors, voltage sources, current sources, CCVS, CCCS, VCVS, VCCS) A B A B RTh A B Is Vs * Deactivate all independent sources. * RTh can often be found by inspection. * RTh may be found by connecting a test source.
  • 86. Thevenin’s theorem: RTh Method 1: Circuit (resistors, voltage sources, current sources, CCVS, CCCS, VCVS, VCCS) A B A B RTh VTh Circuit (resistors, voltage sources, current sources, CCVS, CCCS, VCVS, VCCS) A B A B RTh A B Is Vs A B Is Vs * Deactivate all independent sources. * RTh can often be found by inspection. * RTh may be found by connecting a test source.
  • 87. Thevenin’s theorem: RTh Method 1: Circuit (resistors, voltage sources, current sources, CCVS, CCCS, VCVS, VCCS) A B A B RTh VTh Circuit (resistors, voltage sources, current sources, CCVS, CCCS, VCVS, VCCS) A B A B RTh A B Is Vs A B Is Vs A B Is Vs * Deactivate all independent sources. * RTh can often be found by inspection. * RTh may be found by connecting a test source. M. B. Patil, IIT Bombay
  • 88. Thevenin’s theorem: RTh Method 2: A B Voc * Find Voc .
  • 89. Thevenin’s theorem: RTh Method 2: A B Voc A B Isc * Find Voc . * Find Isc . M. B. Patil, IIT Bombay
  • 90. Thevenin’s theorem: RTh Method 2: A B Voc A B Isc * Find Voc . * Find Isc . * RTh = Voc Isc . M. B. Patil, IIT Bombay
  • 91. Thevenin’s theorem: RTh Method 2: A B Voc A B Isc * Find Voc . * Find Isc . * RTh = Voc Isc . * Note: Sources are not deactivated. M. B. Patil, IIT Bombay
  • 93. Thevenin’s theorem: example A B R3 RL R1 R2 3 Ω 2 Ω 9 V 6 Ω A B RL≡ RTh VTh
  • 94. Thevenin’s theorem: example A B R3 RL R1 R2 3 Ω 2 Ω 9 V 6 Ω A B RL≡ RTh VTh A B 3 Ω 2 Ω 9 V 6 Ω Voc VTh :
  • 95. Thevenin’s theorem: example A B R3 RL R1 R2 3 Ω 2 Ω 9 V 6 Ω A B RL≡ RTh VTh A B 3 Ω 2 Ω 9 V 6 Ω Voc VTh : Voc = 9 V × 3 Ω 6 Ω + 3 Ω = 9 V × 1 3 = 3 V
  • 96. Thevenin’s theorem: example A B R3 RL R1 R2 3 Ω 2 Ω 9 V 6 Ω A B RL≡ RTh VTh A B 3 Ω 2 Ω 9 V 6 Ω Voc VTh : Voc = 9 V × 3 Ω 6 Ω + 3 Ω = 9 V × 1 3 = 3 V A B 3 Ω 2 Ω6 ΩRTh :
  • 97. Thevenin’s theorem: example A B R3 RL R1 R2 3 Ω 2 Ω 9 V 6 Ω A B RL≡ RTh VTh A B 3 Ω 2 Ω 9 V 6 Ω Voc VTh : Voc = 9 V × 3 Ω 6 Ω + 3 Ω = 9 V × 1 3 = 3 V A B 3 Ω 2 Ω6 ΩRTh : RTh = (R1 R2) + R3 = (3 6) + 2 = 3 × 1 × 2 1 + 2 + 2 = 4 Ω
  • 98. Thevenin’s theorem: example A B R3 RL R1 R2 3 Ω 2 Ω 9 V 6 Ω A B RL≡ RTh VTh A B 3 Ω 2 Ω 9 V 6 Ω Voc VTh : Voc = 9 V × 3 Ω 6 Ω + 3 Ω = 9 V × 1 3 = 3 V A B 3 Ω 2 Ω6 ΩRTh : RTh = (R1 R2) + R3 = (3 6) + 2 = 3 × 1 × 2 1 + 2 + 2 = 4 Ω A B RL 3 V≡ RL 4 Ω M. B. Patil, IIT Bombay
  • 99. Maximum power transfer Circuit (resistors, voltage sources, current sources, CCVS, CCCS, VCVS, VCCS) A B RL iL
  • 100. Maximum power transfer Circuit (resistors, voltage sources, current sources, CCVS, CCCS, VCVS, VCCS) A B RL iL * Power “transferred” to load is, PL = i2 L RL .
  • 101. Maximum power transfer Circuit (resistors, voltage sources, current sources, CCVS, CCCS, VCVS, VCCS) A B RL iL * Power “transferred” to load is, PL = i2 L RL . * For a given black box, what is the value of RL for which PL is maximum?
  • 102. Maximum power transfer Circuit (resistors, voltage sources, current sources, CCVS, CCCS, VCVS, VCCS) A B RL iL * Power “transferred” to load is, PL = i2 L RL . * For a given black box, what is the value of RL for which PL is maximum? * Replace the black box with its Thevenin equivalent.
  • 103. Maximum power transfer Circuit (resistors, voltage sources, current sources, CCVS, CCCS, VCVS, VCCS) A B RL iL A B iL RL RTh VTh * Power “transferred” to load is, PL = i2 L RL . * For a given black box, what is the value of RL for which PL is maximum? * Replace the black box with its Thevenin equivalent.
  • 104. Maximum power transfer Circuit (resistors, voltage sources, current sources, CCVS, CCCS, VCVS, VCCS) A B RL iL A B iL RL RTh VTh * Power “transferred” to load is, PL = i2 L RL . * For a given black box, what is the value of RL for which PL is maximum? * Replace the black box with its Thevenin equivalent. * iL = VTh RTh + RL , PL = V 2 Th × RL (RTh + RL)2 .
  • 105. Maximum power transfer Circuit (resistors, voltage sources, current sources, CCVS, CCCS, VCVS, VCCS) A B RL iL A B iL RL RTh VTh * Power “transferred” to load is, PL = i2 L RL . * For a given black box, what is the value of RL for which PL is maximum? * Replace the black box with its Thevenin equivalent. * iL = VTh RTh + RL , PL = V 2 Th × RL (RTh + RL)2 . * For dPL dRL = 0 , we need (RTh + RL)2 − RL × 2 (RTh + RL) (RTh + RL)4 = 0 , i.e., RTh + RL = 2 RL ⇒ RL = RTh .
  • 106. Maximum power transfer Circuit (resistors, voltage sources, current sources, CCVS, CCCS, VCVS, VCCS) A B RL iL A B iL RL RTh VTh PL Pmax L RL RL = RTh * Power “transferred” to load is, PL = i2 L RL . * For a given black box, what is the value of RL for which PL is maximum? * Replace the black box with its Thevenin equivalent. * iL = VTh RTh + RL , PL = V 2 Th × RL (RTh + RL)2 . * For dPL dRL = 0 , we need (RTh + RL)2 − RL × 2 (RTh + RL) (RTh + RL)4 = 0 , i.e., RTh + RL = 2 RL ⇒ RL = RTh . M. B. Patil, IIT Bombay
  • 107. Maximum power transfer: example A B Find RL for which PL is maximum. R3 RL R2 R1 2 Ω3 Ω 12 V 2 A 6 Ω
  • 108. Maximum power transfer: example A B Find RL for which PL is maximum. R3 RL R2 R1 2 Ω3 Ω 12 V 2 A 6 Ω A B RTh: R3 R2 R1 2 Ω3 Ω 6 Ω
  • 109. Maximum power transfer: example A B Find RL for which PL is maximum. R3 RL R2 R1 2 Ω3 Ω 12 V 2 A 6 Ω A B RTh: R3 R2 R1 2 Ω3 Ω 6 Ω RTh = (R1 R2) + R3 = (3 6) + 2 = 3 × 1 × 2 1 + 2 + 2 = 4 Ω
  • 110. Maximum power transfer: example A B Find RL for which PL is maximum. R3 RL R2 R1 2 Ω3 Ω 12 V 2 A 6 Ω A B RTh: R3 R2 R1 2 Ω3 Ω 6 Ω RTh = (R1 R2) + R3 = (3 6) + 2 = 3 × 1 × 2 1 + 2 + 2 = 4 Ω A B Voc: R3 R2 R1 2 Ω3 Ω 12 V 2 A 6 Ω
  • 111. Maximum power transfer: example A B Find RL for which PL is maximum. R3 RL R2 R1 2 Ω3 Ω 12 V 2 A 6 Ω A B RTh: R3 R2 R1 2 Ω3 Ω 6 Ω RTh = (R1 R2) + R3 = (3 6) + 2 = 3 × 1 × 2 1 + 2 + 2 = 4 Ω A B Voc: R3 R2 R1 2 Ω3 Ω 12 V 2 A 6 Ω A B A B R3R3 R2 R2 R1 R1 2 Ω 2 Ω3 Ω 12 V 6 Ω 3 Ω 2 A 6 Ω Use superposition to find Voc:
  • 112. Maximum power transfer: example A B Find RL for which PL is maximum. R3 RL R2 R1 2 Ω3 Ω 12 V 2 A 6 Ω A B RTh: R3 R2 R1 2 Ω3 Ω 6 Ω RTh = (R1 R2) + R3 = (3 6) + 2 = 3 × 1 × 2 1 + 2 + 2 = 4 Ω A B Voc: R3 R2 R1 2 Ω3 Ω 12 V 2 A 6 Ω A B A B R3R3 R2 R2 R1 R1 2 Ω 2 Ω3 Ω 12 V 6 Ω 3 Ω 2 A 6 Ω Use superposition to find Voc: V (1) oc = 12 × 6 9 = 8 V
  • 113. Maximum power transfer: example A B Find RL for which PL is maximum. R3 RL R2 R1 2 Ω3 Ω 12 V 2 A 6 Ω A B RTh: R3 R2 R1 2 Ω3 Ω 6 Ω RTh = (R1 R2) + R3 = (3 6) + 2 = 3 × 1 × 2 1 + 2 + 2 = 4 Ω A B Voc: R3 R2 R1 2 Ω3 Ω 12 V 2 A 6 Ω A B A B R3R3 R2 R2 R1 R1 2 Ω 2 Ω3 Ω 12 V 6 Ω 3 Ω 2 A 6 Ω Use superposition to find Voc: V (1) oc = 12 × 6 9 = 8 V V (2) oc = 4 Ω × 2 A = 8 V
  • 114. Maximum power transfer: example A B Find RL for which PL is maximum. R3 RL R2 R1 2 Ω3 Ω 12 V 2 A 6 Ω A B RTh: R3 R2 R1 2 Ω3 Ω 6 Ω RTh = (R1 R2) + R3 = (3 6) + 2 = 3 × 1 × 2 1 + 2 + 2 = 4 Ω A B Voc: R3 R2 R1 2 Ω3 Ω 12 V 2 A 6 Ω A B A B R3R3 R2 R2 R1 R1 2 Ω 2 Ω3 Ω 12 V 6 Ω 3 Ω 2 A 6 Ω Use superposition to find Voc: V (1) oc = 12 × 6 9 = 8 V V (2) oc = 4 Ω × 2 A = 8 V Voc = V (1) oc + V (2) oc = 8 + 8 = 16 V
  • 115. Maximum power transfer: example A B Find RL for which PL is maximum. R3 RL R2 R1 2 Ω3 Ω 12 V 2 A 6 Ω A B RTh: R3 R2 R1 2 Ω3 Ω 6 Ω RTh = (R1 R2) + R3 = (3 6) + 2 = 3 × 1 × 2 1 + 2 + 2 = 4 Ω A B Voc: R3 R2 R1 2 Ω3 Ω 12 V 2 A 6 Ω A B A B R3R3 R2 R2 R1 R1 2 Ω 2 Ω3 Ω 12 V 6 Ω 3 Ω 2 A 6 Ω Use superposition to find Voc: V (1) oc = 12 × 6 9 = 8 V V (2) oc = 4 Ω × 2 A = 8 V Voc = V (1) oc + V (2) oc = 8 + 8 = 16 V A B iL RL Pmax L = 22 × 4 = 16 W . PL is maximum when RL = RTh = 4 Ω ⇒ iL = VTh/(2 RTh) = 2 A RTh VTh M. B. Patil, IIT Bombay
  • 116. Thevenin’s theorem: example A B 2 Ω 6 A 12 Ω 48 V 4 Ω 12 Ω 4 Ω
  • 117. Thevenin’s theorem: example A B 2 Ω 6 A 12 Ω 48 V 4 Ω 12 Ω 4 Ω C A B RTh: 2 Ω 12 Ω 4 Ω 4 Ω 12 Ω
  • 118. Thevenin’s theorem: example A B 2 Ω 6 A 12 Ω 48 V 4 Ω 12 Ω 4 Ω C A B RTh: 2 Ω 12 Ω 4 Ω 4 Ω 12 Ω C A B ≡ 4 Ω 3 Ω
  • 119. Thevenin’s theorem: example A B 2 Ω 6 A 12 Ω 48 V 4 Ω 12 Ω 4 Ω C A B RTh: 2 Ω 12 Ω 4 Ω 4 Ω 12 Ω C A B ≡ 4 Ω 3 Ω RTh = 7 Ω⇒
  • 120. Thevenin’s theorem: example A B 2 Ω 6 A 12 Ω 48 V 4 Ω 12 Ω 4 Ω C A B RTh: 2 Ω 12 Ω 4 Ω 4 Ω 12 Ω C A B ≡ 4 Ω 3 Ω RTh = 7 Ω⇒ A B C Voc Voc: 2 Ω 12 Ω 48 V 4 Ω 4 Ω 12 Ω 6 A i
  • 121. Thevenin’s theorem: example A B 2 Ω 6 A 12 Ω 48 V 4 Ω 12 Ω 4 Ω C A B RTh: 2 Ω 12 Ω 4 Ω 4 Ω 12 Ω C A B ≡ 4 Ω 3 Ω RTh = 7 Ω⇒ A B C Voc Voc: 2 Ω 12 Ω 48 V 4 Ω 4 Ω 12 Ω 6 A i VAB = VA − VB = 24 V + 36 V = 60 V = VAC + VCB = (VA − VC) + (VC − VB) Note: i = 0 (since there is no return path).
  • 122. Thevenin’s theorem: example A B 2 Ω 6 A 12 Ω 48 V 4 Ω 12 Ω 4 Ω C A B RTh: 2 Ω 12 Ω 4 Ω 4 Ω 12 Ω C A B ≡ 4 Ω 3 Ω RTh = 7 Ω⇒ A B C Voc Voc: 2 Ω 12 Ω 48 V 4 Ω 4 Ω 12 Ω 6 A i VAB = VA − VB = 24 V + 36 V = 60 V = VAC + VCB = (VA − VC) + (VC − VB) Note: i = 0 (since there is no return path). VTh = 60 V RTh = 7 Ω
  • 123. Thevenin’s theorem: example A B 2 Ω 6 A 12 Ω 48 V 4 Ω 12 Ω 4 Ω C A B RTh: 2 Ω 12 Ω 4 Ω 4 Ω 12 Ω C A B ≡ 4 Ω 3 Ω RTh = 7 Ω⇒ A B C Voc Voc: 2 Ω 12 Ω 48 V 4 Ω 4 Ω 12 Ω 6 A i VAB = VA − VB = 24 V + 36 V = 60 V = VAC + VCB = (VA − VC) + (VC − VB) Note: i = 0 (since there is no return path). VTh = 60 V RTh = 7 Ω A B 7 Ω 60 V M. B. Patil, IIT Bombay
  • 124. Graphical method for finding VTh and RTh SEQUEL file: ee101 thevenin 1.sqproj A B 2 Ω 6 A 12 Ω 48 V 4 Ω 4 Ω 12 Ω
  • 125. Graphical method for finding VTh and RTh SEQUEL file: ee101 thevenin 1.sqproj A B 2 Ω 6 A 12 Ω 48 V 4 Ω 4 Ω 12 Ω i v A B 2 Ω 4 Ω 48 V6 A 12 Ω 4 Ω 12 Ω Connect a voltage source between A and B. Plot i versus v. Voc = intercept on the v-axis. Isc = intercept on the i-axis.
  • 126. Graphical method for finding VTh and RTh SEQUEL file: ee101 thevenin 1.sqproj A B 2 Ω 6 A 12 Ω 48 V 4 Ω 4 Ω 12 Ω i v A B 2 Ω 4 Ω 48 V6 A 12 Ω 4 Ω 12 Ω Connect a voltage source between A and B. Plot i versus v. Voc = intercept on the v-axis. Isc = intercept on the i-axis. 0 2 4 6 8 10 v (Volt) 0 20 40 60 i(Amp)
  • 127. Graphical method for finding VTh and RTh SEQUEL file: ee101 thevenin 1.sqproj A B 2 Ω 6 A 12 Ω 48 V 4 Ω 4 Ω 12 Ω i v A B 2 Ω 4 Ω 48 V6 A 12 Ω 4 Ω 12 Ω Connect a voltage source between A and B. Plot i versus v. Voc = intercept on the v-axis. Isc = intercept on the i-axis. 0 2 4 6 8 10 v (Volt) 0 20 40 60 i(Amp) Voc = 60 V, Isc = 8.5714 A RTh = Vsc/Isc = 7 Ω
  • 128. Graphical method for finding VTh and RTh SEQUEL file: ee101 thevenin 1.sqproj A B 2 Ω 6 A 12 Ω 48 V 4 Ω 4 Ω 12 Ω i v A B 2 Ω 4 Ω 48 V6 A 12 Ω 4 Ω 12 Ω Connect a voltage source between A and B. Plot i versus v. Voc = intercept on the v-axis. Isc = intercept on the i-axis. 0 2 4 6 8 10 v (Volt) 0 20 40 60 i(Amp) Voc = 60 V, Isc = 8.5714 A RTh = Vsc/Isc = 7 Ω A B 7 Ω VTh = 60 V RTh = 7 Ω 60 V M. B. Patil, IIT Bombay
  • 131. Norton equivalent circuit A B RTh VTh A B IN RN * Consider the open circuit case.
  • 132. Norton equivalent circuit A B RTh VTh A B IN RN * Consider the open circuit case. Thevenin circuit: VAB = VTh .
  • 133. Norton equivalent circuit A B RTh VTh A B IN RN * Consider the open circuit case. Thevenin circuit: VAB = VTh . Norton circuit: VAB = IN RN .
  • 134. Norton equivalent circuit A B RTh VTh A B IN RN * Consider the open circuit case. Thevenin circuit: VAB = VTh . Norton circuit: VAB = IN RN . ⇒ VTh = IN RN .
  • 135. Norton equivalent circuit A B RTh VTh A B IN RN A B A B Isc IscVTh IN RN RTh * Consider the open circuit case. Thevenin circuit: VAB = VTh . Norton circuit: VAB = IN RN . ⇒ VTh = IN RN . * Consider the short circuit case.
  • 136. Norton equivalent circuit A B RTh VTh A B IN RN A B A B Isc IscVTh IN RN RTh * Consider the open circuit case. Thevenin circuit: VAB = VTh . Norton circuit: VAB = IN RN . ⇒ VTh = IN RN . * Consider the short circuit case. Thevenin circuit: Isc = VTh/RTh .
  • 137. Norton equivalent circuit A B RTh VTh A B IN RN A B A B Isc IscVTh IN RN RTh * Consider the open circuit case. Thevenin circuit: VAB = VTh . Norton circuit: VAB = IN RN . ⇒ VTh = IN RN . * Consider the short circuit case. Thevenin circuit: Isc = VTh/RTh . Norton circuit: Isc = IN .
  • 138. Norton equivalent circuit A B RTh VTh A B IN RN A B A B Isc IscVTh IN RN RTh * Consider the open circuit case. Thevenin circuit: VAB = VTh . Norton circuit: VAB = IN RN . ⇒ VTh = IN RN . * Consider the short circuit case. Thevenin circuit: Isc = VTh/RTh . Norton circuit: Isc = IN . ⇒ RTh = RN . M. B. Patil, IIT Bombay
  • 139. Example 20 V 1 Ai5 Ω 10 Ω
  • 140. Example 20 V 1 Ai5 Ω 10 Ω A B
  • 141. Example 20 V 1 Ai5 Ω 10 Ω A B RN = 5 Ω IN = 20 V 5 Ω = 4 A
  • 142. Example 20 V 1 Ai5 Ω 10 Ω A B RN = 5 Ω IN = 20 V 5 Ω = 4 A A B 1 Ai 10 Ω5 Ω 4 A
  • 143. Example 20 V 1 Ai5 Ω 10 Ω A B RN = 5 Ω IN = 20 V 5 Ω = 4 A A B 1 Ai 10 Ω5 Ω 4 A i 10 Ω5 Ω 3 A
  • 144. Example 20 V 1 Ai5 Ω 10 Ω A B RN = 5 Ω IN = 20 V 5 Ω = 4 A A B 1 Ai 10 Ω5 Ω 4 A i 10 Ω5 Ω 3 A = 1 A i = 3 A × 5 5 + 10 M. B. Patil, IIT Bombay
  • 145. Example 20 V 1 Ai5 Ω 10 Ω A B RN = 5 Ω IN = 20 V 5 Ω = 4 A A B 1 Ai 10 Ω5 Ω 4 A i 10 Ω5 Ω 3 A = 1 A i = 3 A × 5 5 + 10 Home work: * Find i by superposition and compare. M. B. Patil, IIT Bombay
  • 146. Example 20 V 1 Ai5 Ω 10 Ω A B RN = 5 Ω IN = 20 V 5 Ω = 4 A A B 1 Ai 10 Ω5 Ω 4 A i 10 Ω5 Ω 3 A = 1 A i = 3 A × 5 5 + 10 Home work: * Find i by superposition and compare. * Compute the power absorbed by each element and verify that P Pi = 0 . M. B. Patil, IIT Bombay