SPICE MODEL of TC74LCX245FW in SPICE PARK. English Version is http://www.spicepark.net. Japanese Version is http://www.spicepark.com by Bee Technologies.

1. Device Modeling Report
COMPONENTS : CMOS DIGITAL INTEGRATED CIRCUIT
PART NUMBER : TC74LCX245FW
MANUFACTURER : TOSHIBA
Bee Technologies Inc.
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005

2. Truth Table
Circuit simulation result
U1:DIR 0
U1:OEBAR 0
U1:B1 1
U1:B2 1
U1:B3 1
U1:B4 1
U1:B5 1
U1:B6 1
U1:B7 1
U1:B8 1
U1:A1 1
U1:A2 1
U1:A3 1
U1:A4 1
U1:A5 1
U1:A6 1
U1:A7 1
U1:A8 1
0s 0.5us 1.0us
Time
Evaluation circuit
U1
DIR VCC
LO
___
A1 OE LO
A2 B1
IN_B
A3 B2
A4 B3
A5 B4
R1 V1
A6 B5
1MEG
A7 B6
DSTM1 3.6
A8 B7 CLK
GND B8 ONTIME = .2uS
OFFTIME = .2uS
74LCX245
0
Comparison table Function : A BUS = OUTPUT, B BUS = INPUT
Input Output
%Error
OE DIR Measurement Simulation
L L A=B A=B 0
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005

3. Truth Table
Circuit simulation result
U1:DIR 1
U1:OEBAR 0
U1:A1 1
U1:A2 1
U1:A3 1
U1:A4 1
U1:A5 1
U1:A6 1
U1:A7 1
U1:A8 1
U1:B1 1
U1:B2 1
U1:B3 1
U1:B4 1
U1:B5 1
U1:B6 1
U1:B7 1
U1:B8 1
0s 0.5us 1.0us
Time
Evaluation circuit
U1
HI
DIR VCC
___
A1 OE
IN_A LO
A2 B1
A3 B2
A4 B3
A5 B4
R1 V1
A6 B5
1MEG
CLK A7 B6
3.6
DSTM1 A8 B7
ONTIME = .2uS
OFFTIME = .2uS GND B8
74LCX245
0
Comparison table Function : A BUS = INPUT, B BUS = OUTPUT
Input Output
%Error
OE DIR Measurement Simulation
L H B=A B=A 0
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005

4. Truth Table
Circuit simulation result
U1:DIR 1
U1:OEBAR 1
U1:A1 Z
U1:A2 Z
U1:A3 Z
U1:A4 Z
U1:A5 Z
U1:A6 Z
U1:A7 Z
U1:A8 Z
U1:B1 Z
U1:B2 Z
U1:B3 Z
U1:B4 Z
U1:B5 Z
U1:B6 Z
U1:B7 Z
U1:B8 Z
0s 0.5us 1.0us
Time
Evaluation circuit
U1
DSTM1
CLK DIR VCC
___
ONTIME = .2uS A1 OE HI
OFFTIME = .2uS
A2 B1
A3 B2
A4 B3
A5 B4
R1 V1
A6 B5
1MEG
A7 B6 3.6
A8 B7
GND B8
74LCX245
0
Comparison table Function : A BUS and B BUS = HIGH IMPEDANCE
Input Output
%Error
OE DIR Measurement Simulation
H X Z Z 0
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005

5. High Level and Low Level Input Voltage
Circuit simulation result
3.0V
(566.677u,2.0003)
2.0V
Output
Input
1.0V (526.639u,799.182m)
0V
0s 0.5ms 1.0ms 1.5ms 2.0ms
V(OUT) V(V1:+)
Time
Evaluation circuit
U4
DIR VCC
LO
___
A1 OE
OUT LO
A2 B1
A3 B2
A4 B3 V2
A5 B4
V1 = 0
R2 A6 B5 V2 = 3 V1 3
TD = 0.5m
1G A7 B6 TR = 0.1m
TF = 0.1m
A8 B7 PW = 1m
PER = 2m
GND B8
74LCX245
0
Comparison table
VCC =3.3 V Measurement Simulation %Error
VIH (V) 2 2 0
VIL (V) 0.8 0.799182 -0.102
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005

6. High Level Output Voltage
Circuit simulation result
3.0V
2.0V
Output
1.0V
0V
0s 5ms 10ms
V(OUT)
Time
Evaluation circuit
U1
DIR VCC
LO
___
A1 OE
OUT LO
A2 B1
A3 B2
A4 B3 V2
A5 B4
I1 A6 B5 V1 3
2.1
-100u A7 B6
A8 B7
GND B8
74LCX245
0
Comparison table
VIN = VIH, VCC = 3 V Measurement Simulation %Error
Min VOH = (VCC - 0.2) V 2.8 2.8331 1.182
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005

7. Low Level Output Voltage
Circuit simulation result
3.0V
2.0V
Output
1.0V
0V
0s 5ms 10ms
V(OUT)
Time
Evaluation circuit
U1
DIR VCC
LO
___
A1 OE
OUT LO
A2 B1
A3 B2
A4 B3 V2
A5 B4
I1 A6 B5 V1 3
0.7
100u A7 B6
A8 B7
GND B8
74LCX245
0
Comparison table
VIN = VIL, VCC = 3 V Measurement Simulation %Error
VOL (V) 0.2 0.191208 -4.396
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005

8. Propagation Delay Time
Circuit simulation result
3.0V 3.0V
1 2
Output
Input
2.0V
1.5V
1.0V
>>
0V 0V
0s 0.5us 1.0us
1 V(TPLH_TPHL) 2 V(U1:B1)
Time
Evaluation circuit
U1
DIR VCC
LO
tplh_tphl ___
A1 OE LO
A2 B1
A3 B2
A4 B3 V2
A5 B4
R1 C1 V1 = 0
A6 B5 V2 = 2.7 2.7
500 50p TD = 0.2u V1
A7 B6 TR = 3.15n
TF = 3.15n
A8 B7 PW = 0.5u
PER = 1u
GND B8
74LCX245
0
Comparison table CL = 50 Pf, RL = 500 
VCC = 2.7 V, tr = tf = 2.5 ns Measurement Simulation %Error
tPLH (ns) 8 7.9710 -0.362
tPHL (ns) 8 7.8270 -2.163
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005

9. Output enable time, high impedance (off) to high output (tPZH)
Output disable time, high to high impedance (off) output (tPHZ)
Circuit simulation result
3.0V 3.0V
1 2
Output
Input
2.0V 2.0V
1.0V 1.0V
>>
0V 0V
0s 0.5us 1.0us
1 V(TPZH_TPHZ) 2 V(V1:+)
Time
Evaluation circuit
U1
DIR VCC
LO
tpzh_tphz ___
A1 OE
A2 B1 HI
A3 B2
A4 B3 V2
A5 B4
R2 R1 C1 V1 = 0 V1
A6 B5 V2 = 2.7 2.7
500 500 50p TD = 0.2u
A7 B6 TR = 3.15n
TF = 3.15n
A8 B7 PW = 0.5u
PER = 1u
GND B8
74LCX245
0
Comparison table CL = 50 pF, RL = 500 
VCC = 2.7 V, tr = tf = 2.5 ns Measurement Simulation %Error
tPZH (ns) 9.5 9.4468 -0.560
tPHZ (ns) 8.5 8.4095 -1.065
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005

10. Output enable time, high impedance (off) to low output (tPZL)
Output disable time, low to high impedance (off) output (tPLZ)
Circuit simulation result
3.0V 3.0V
1 2
Output
Input
2.0V
1.5V
1.0V
>>
0V 0V
0s 0.5us 1.0us
1 V(TPZL_TPLZ) 2 V(V1:+)
Time
Evaluation circuit
U1
DIR VCC
LO
R2 tpzl_tplz ___
A1 OE
500
A2 B1 LO
A3 B2
A4 B3
V2 A5 B4 V3
V1 = 0 V1
R1 C1 A6 B5 V2 = 2.7
TD = 0.2u
6 500 50p A7 B6 TR = 3.15n 2.7
TF = 3.15n
A8 B7 PW = 0.5u
PER = 1u
GND B8
74LCX245
0
Comparison table CL = 50 pF, RL = 500 
VCC = 2.7 V, tr = tf = 2.5 ns Measurement Simulation %Error
tPZL (ns) 9.5 9.4525 -0.500
tPLZ (ns) 8.5 8.4464 -0.631
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005