This document is Clifton Leon Anderson's resume listing over 300 patents he has prepared in various areas of technology. It provides biographical details including his education at Yale University, University of Michigan, and University of Missouri. It also lists his experience as an owner of a private patent law firm, in-house counsel for various technology companies, and third-party neutral providing infringement opinions to federal courts. The resume demonstrates extensive experience and qualifications in patent law.

1. 1
Clifton Leon Anderson
3594 Sunnymead Ct.
San Jose, CA 95117
(408) 257-6070
ClifAnd@gmail.com
RESUMÉ
Over 300 patents have issued based on patent applications prepared by
Clifton Leon Anderson regarding computers, networks, microprocessor
architecture, computer workload management, document management,
laser and inkjet printers and printing algorithms, communications,
analog electronics, power conservation, video compression, software,
semiconductors, medical instrumentation, biochemical analytical
instrumentation, chromatography, lasers and optics, cold-atom devices,
test equipment, nuclear physics and reactors, musical instruments,
psychological testing, education technology, and other areas of
technology.
EDUCATION
Yale University, B.S. in Mathematics with Minor in Physics (1969).
University of Michigan, Ph.D. in Psychology (1975).
University of Missouri, J.D. (1980).
AWARDS
Barge Prize (1966, 3rd
place in Freshman Math Competition at Yale.
Putnam Prize (1967, among top 35 Math Students in U.S.)
BAR ADMISSIONS
Illinois Bar (1981, inactive)
Patent Bar (1983, active)
California Bar (1983, active)

2. 2
LAW PRACTICE HISTORY
Owner of private practice patent law firm (Silicon Valley, California,
1985—present). In house contractor for Hewlett-Packard Company (Palo
Alto, California, 1992, 1996) and Agilent Technologies (Palo Alto,
California, June-December, 2001). Third-Party Neutral to Provide
Infringement Opinion to Federal Court of the Southern District of
California (September, 2004—January, 2005).
Fairchild Semiconductor, Patent Counsel for Microprocessor Division
(Mountain View, California, (1984-1985).
Hughes Aircraft Company, Patent Counsel for Space and Communications
Group (El Segundo, California, 1982-1984)
Fitch, Even & Tabin, Associate (Chicago, Illinois, 1980-1982).
CLIENTS
Clients (past and present) include: Hewlett-Packard Company, Agilent
Technologies, Applied Materials, VMWare, Bectin-Dickinson, Litton
Industries, General Electric Company, Bayview Technologies, Power
Innovations, Hydraconnect, Merlin Instrument Company, VLSI,
Koninklijke Philips N.V. (Royal Philips, commonly known as Philips),
Cold Quanta, University of Southern California (USC), Fitch, Even, & Tabin,
Erik Page & Associates, Propelsion, Roger Linn Design, SharePract, West
Coast Estates, Ponte Solutions, Inc., VXtreme.
CIVIC SERVICE
Director of Videography for the Academy of Chinese Performing Arts,
1986-present.
Board of Directors, Abhinarya Dance Company, 1996-1997.
Board of Directors, German-American School of the Penninsula, 1992-
1993.

3. 300+ Issued Patents Prepared by Clifton Leon Anderson
1
8,713,297 B2 Decrementing Settings for a Range of Power Caps When a Power Cap is Exceeded
8,683,445 B2 User-Interface Testing
8,676,946 B1 Warnings for Logical-Server Target Hosts
8,650,579 B1 Containment For Computer-Software Update Installation Processes
8,650,500 B2 Copy-and-Paste Functionality for Network Reconfiguration
8,650,296 B1 Workload Reallocation Involving Inter-Server Transfers of Software License Rights and Intra-Server Transfer
of Hardware Resources
8,607,245 B2 Dynamic Processor-Set Management
8,593,434 B2 Touchscreen Display With Plural Cameras
8,576,243 B2 Display-Color Function Image Conversion
8,555,048 B2 Computer System for Booting a System Image by Associating Incomplete Identifiers to Complete Identifiers
Via Querying Storage Locations According to Priority Level Where the Querying is Self Adjusting
8,549,123 B1 Logical Server Management
8,539,482 B1 Virtual-Server License Status Determination
8,536,505 B2 Movable Illuminance Sensors for Fixture Light Sources
8,527,988 B1 Proximity Mapping of Virtual-Machine Threads to Processors
8,511,770 B2 Bi-Directional Color Printing
8,510,450 B2 Reconciliation of Web Server Session States with Client Browser States
8,505,020 B2 Computer Workload Migration Using Processor Pooling
8,490,103 B1 Allocating Computer Processes To Processor Cores As A Function Of Process Utilizations
8,488,326 B2 Memory Support Structure
8,452,945 B2 Indirect Indexing Instructions
8,443,171 B2 Run-Time Updating Of Prediction Hint Instructions
8,401,925 B1 Multi-Product Software License Selection
8,386,391 B1 Resource-Type Weighting of Use Rights
8,370,825 B2 Program-Update Prioritization According to Program-Usage Tracking
8,356,098 B2 Systems and Methods for Dynamic Management of Workload Clusters
8,350,416 B2 Transition-Rate Control for Phase-Controlled AC Power Delivery System
8,312,460 B1 Allocating Computer Resources to Workloads Using Utilization Based Probability
8,289,568 B1 Printing Using Variable Pixel-Replication Factors
8,275,578 B2 Diagnostics For Centrally Managed Computer System
8,272,049 B2 Multi-Domain Computer Password Management
8,270,155 B2 Coolant Pulsing For Computer System
8,260,975 B1 Consumer Electronics Control (CEC) Processor
8,255,917 B2 Auto-Configuring Workload Management System
8,255,915 B1 Workload Management For Computer System With Container Hierarchy And Workload-Group Policies
8,250,581 B1 Allocating Computer Resources To Candidate Recipient Computer Workloads According To Expected
Marginal Utilities
8,245,235 B1 Allocating Computer Resources To Workloads As A Function Of Reliability
8,233,275 B2 Combination Grill And Computer Add-In-Card Retention Structure
8,219,996 B1 Computer Processor With Fairness Monitor
8,214,601 B2 Purging Without Write-Back Of Cache Lines Containing Spent Data
8,209,413 B1 Emergency Power Settings for Data-Center Facilities Infrastructure
8,203,725 B2 Automatic Arrangement of Nested Images as a Function of Assigned Print Modes
8,176,498 B2 Power Setting Adjustments By Mission Operating System In Response To Requests From Platform Manager
8,176,349 B2 Look-Ahead Processor For Signaling Suitable Non-Idle Performance State For Main Processor
8,156,502 B1 Computer Resource Allocation as a Function of Demand Type

4.
300+ Issued Patents Prepared By Clifton Leon Anderson
2
8,122,264 B2 Business Method, System, and Media Providing for Power State Change as a Function of Direction of Right to
Use Status Change
8,117,373 B2 VM Host Responding to Initiation of a Page Swap by Transferring Pages from Host-but-non-Guest-
Addressable RAM to Host-and-Guest-Addressable RAM
8,104,041 B2 Server Workload Redistribution
8,103,651 B2 Self-Updating Documentation
8,099,637 B2 Software Fault Detection Using Progress Tracker
8,082,547 B1 Reallocating Hardware Resources Among Workloads in Accordance with License Rights
8,051,382 B1 Displaying Rating Indications for Drop Targets in Response to User Dragging of Mobile Icon
8,015,423 B1 Temporally Normalized Processor Utilization
8,005,926 B2 Tiered Web Site With Web-Tier Admission Control Based On Utilization Data Generated On Application Tier
7,975,089 B2 Computer Dock Providing For Disconnecting Media From Docking Port When Lock Is Inserted
7,941,655 B1 Extensible Firmware Interface With Pre-Start Configuration Phase For Computers
7,933,993 B1 Relocatable Virtual Port For Accessing External Storage
7,927,147 B1 Connector Assembly
7,925,876 B2 Computer With Extensible Firmware Interface Implementing Parallel Storage-Device Enumeration
7,908,470 B1 Multi-Processor Computer With Plural Boot Memories
7,890,798 B1 Computer Cluster With Second-Node Instance Of Application Having Access To State Snapshot Of First-
Node Instance Of Application
7,890,219 B2 Cooling Fan With Speed Maintained During Wait Period Despite Decreasing Temperature
7,869,516 B2 Motion Estimation Using Bit-Wise Block Comparisons For Video Compression
7,823,000 B2 Measuring AC Power Consumption Using Choke With Inductive Power Sensor
7,793,026 B1 Computer System With Peripheral Modules Attached To A Display/CPU Assembly
7,775,486 B2 Webcam Assembly With Clamp Stand Forms
7,743,244 B2 Computer System Model Generation With Tracking Of Actual Computer System Configuration
7,730,365 B1 Workload Mangement For Maintaining Redundancy Of Non-Data Computer Components
7,711,980 B1 Computer System Failure Management with Topology Based Partial Failure Determinations
7,702,928 B2 Memory Module With On-Board Power-Consumption Monitoring
7,698,545 B1 Computer Configuration Chronology Generator
7,680,990 B2 Superword Memory-Access Instruction For Data Processor
7,658,619 B2 Processor And Power Converter Assembly With Rigidly Connected Power Connector
7,653,833 B1 Terminating A Non-Clustered Workload In Response To A Failure Of A System With A Clustered Workload
7,640,503 B1 Graphic Representation Of Computer Reconfigurations
7,613,935 B2 Power Monitoring for Processor Module
7,536,684 B2 Differential Documentation Generation for Program Upgrades
7,536,573 B2 Power Budgeting For Computers
7,525,296 B2 Spread Spectrum Power Converter with Duty-Cycle Error Compensation
7,523,332 B2 Interface Module With On-Board Power-Consumption Monitoring
7,519,245 B2 Modular Array Computer With Optical Intercell Communications Pathways
7,480,836 B2 Monitoring Error-Handler Vector In Architected Memory
7,441,104 B2 Parallel Subword Instructions with Distributed Results
7,424,630 B2 Multiprocessor System With Selective Processor Power Down Of Core And Inter-Processor Communications
Ports
7,424,597 B2 Variable Reordering (Mux) Instructions For Parallel Table Lookups From Registers
7,385,824 B2 Processor Module With Rigidly Coupled Processor And Voltage-Regulator Heat Sinks
7,373,553 B2 Computer Support Network With Customer Portal To Monitor Incident-Handling Status By Vendor's Computer
Service System
7,340,630 B2 Multiprocessor System with Interactive Synchronization of Local Clocks
7,334,028 B2 Tiered Multi-Source Software Support Using Automated Diagnostic-Data Transfers
7,281,116 B2 Multiprocessor System Having Plural Memory Locations For Respectively Storing TLB-Shootdown Data For
Plural Processor Nodes

5.
300+ Issued Patents Prepared By Clifton Leon Anderson
3
7,274,825 B1 Image Matching Using Pixel-Depth Reduction
7,257,514 B2 Computer Support Service With Solution Function Updates As A Function Of Pre-Delivery Expert Changes To
Automatically Generated Solutions
7,224,484 B1 Scanner Calibration With Dead Pixel Compensation
7,143,317 B2 Computer Event Log Overwriting Intermediate Events
7,126,112 B2 Cold Atom System with Atom Chip Wall
7,103,756 B2 Data Processor With Individually Writable Register Subword Locations
7,080,242 B2 Instruction Set Reconciliation For Heterogeneous Symmetric-Multiprocessor Systems
7,060,439 B2 Solid-Phase Chemical Analysis Using Array Hybridization Facilitated by Agitation During Centrifuging
7,003,167 B2 Single-Pass Guaranteed-Fit Data Compression Using Rate Feedback
6,907,603 B2 Software Update Management System With Update Chronology Generator
6,862,375 B1 Skew Compensation for Faster Image Transfer Device
6,801,836 A Power-Conservation System Based on Indoor/Outdoor and Ambient-Light Determinations
6,784,460 B2 Chip Shaping for Flip-Chip Light Emitting Diode
6,701,422 B2 Memory Control System with Incrementer for Generating Speculative Addresses
6,670,535 B2 Musical-Instrument Controller with Triad-Forming Note-Trigger Convergence Points
6,666,100 B1 Sample Injector with Interface-Control Lever
6,658,508 B1 Expansion Module with External Bus for Personal Digital Assistant and Design Method Therefor
6,629,206 B1 Set-Associative Cache-Management Using Parallel Reads and Serial Reads Initiated During a Wait State
6,621,823 B1 Network Appliance Combining Asychronous Notification With Interactive Network Transfer Protocol Server
6,615,377 B1 Integrated Circuit With Signal-Vector Queue For Normal And Test Modes Of Operation
6,593,143 B1 Centrifuge System with Contactless Regulation of Chemical-Sample Temperature Using Eddy Currents
6,587,671 B1 RF Test Set with Concurrent Measurement Architecture
6,571,308 B1 Bridging a Host Bus to an External Bus Using a Host-Bus-to-Processor Protocol Translator
6,538,524 B1 Using Electically Lossy Transmission Systems to Reduce Computer RF Emissions
6,507,887 B1 Binary Data Memory Design with Data Stored in Low-Power Sense
6,491,805 B1 Sample-Analysis System with Antisynchronously Driven Contactless Conductivity Detector
6,489,785 B2 Comparative Contactless Conductivity Detector
6,477,609 B1 Bridge State-Machine Progression for Data Transfers Requested by a Host Bus and Responded to by an
External Bus
6,441,625 B1 Contactless Conductivity Detector with Transmitter/Receiver Electrode
6,429,062 B1 Integrated-Circuit Manufacturing Using High Interstitial-Recombination-Rate Blocking Layer for Source/Drain
Extension Implant
6,404,923 B1 Table-Based Low-Level Image Classification and Compression System
6,385,700 B2 Set-Associative Cache-Management Method with Parallel Read and Serial Read Pipelined with Serial Write
6,361,486 B1 Coaxial-Drive Centrifuge Providing Tilt Control Relative to Centrifugal Force
6,337,893 B1 Non-Power-Of-Two Grey-Code Counter System Having Binary Incrementer with Counts Distributed with
Bilateral Symmetry
6,327,650 B1 Pipelined Multiprocessing with Upstream Processor Concurrently Writing to Local Register and to Register to
Downstream Processor
6,321,321 B1 Set-Associative Cache-Management Method with Parallel and Single-Set Sequential Reads
6,314,154 B1 Non-Power-of-Two Gray-Code Counter and Binary Incrementer Therefor
6,298,456 B1 Runtime Detection of Network Loops
6,257,076 B1 Sample Injector with Plunger Release for Chemical Analysis Systems
6,243,626 B1 External Power Management Device with Current Monitoring Precluding Shutdown During High Current
6,218,303 B1 Via Formation Using Oxide Reduction of Underlying Copper
6,215,910 B1 Table-Based Compression with Embedded Coding
6,199,147 B1 Distributed-Memory Multiprocessor Computer System With Directory-Based Cache Coherency With
Ambiguous Mappings Of Cached Data To Main-Memory Locations
6,197,621 B1 Custom Laser Conductor Linkage For Integrated Circuits
6,175,220 B1 Short-Circuit Protection for Forward-Phase-Control AC Power Controller

6.
300+ Issued Patents Prepared By Clifton Leon Anderson
4
6,084,464 A On-Chip Decoupling Capacitor System with Parallel Fuse
6,079,034 A Hub-Embedded System For Automated Network Fault Detection And Isolation
6,055,610 A Distributed Memory Multiprocessor Computer System with Directory Based Cache Coherency with
Ambiguous Mapping of Cached Data to Main-Memory Locations
6,055,610 A Distributed Memory Multiprocessor Computer System With Directory Based Cache Coherency With
Ambiguous Mapping Of Cached Data To Main-Memory Locations
6,048,789 A IC Interconnect Formation With Chemical-Mechanical Polishing And Silica Etching With Solution Of Nitric And
Hydroflouric Acids
6,029,243 A Floating-Point Processor With Operand-Format Precision Greater Than Execution Precision
6,007,641 A Integrated-Circuit Manufacture Method With Aqueous Hydrogen-Flouride And Nitric-Acid Oxide Etch
6,006,030 A Microprocessor With Programmable Instruction Trap For Deimplementing Instructions
5,978,437 A Binary Counter System Using Bit-Wise Matches With Maximum Count
5,974,306 A Time-Share I-Q Mixer System With DIstribution Switch Feeding In-Phase And Quadrature Polarity Inverters
5,958,193 A Sputter Deposition With Mobile Collimator
5,954,860 A Inductively Heated Cold-Trap Analyte Injector
5,937,170 A Data Communications With Processor-Assertable Addresses Mapped To Peripheral-Accessible-Addresses-
Times-Command Product Space
5,923,960 A Method Of Making Custom Laser Conductor Linkage For The Integrated Circuits
5,862,370 A Data Processor System With Instruction Substitution Filter For Deimplementing Instructions
5,860,119 A Data-Packet FIFO Buffer System With End-Of-Packet Flags
5,845,308 A Wrapped-Line Cache For Microprocessor System
5,841,684 A Method And Apparatus For Computer Implemented Constant Multiplication With Multipliers Having Repeated
Patterns Including Shifting Of Replicas And Patterns Having At Least Two Digit Positions With Non-Zero
Values
5,815,422 A Computer-Implemented Mulitiplication WIth Shifting Of Pattern-Product Partials
5,814,544 A Forming a Mos Transistor with a Recessed Channel
5,793,095 A Custom Laser Conductor Linkage For Integrated Circuits
5,764,357 A Zero-Run-Length Encoder With Shift Register
5,745,990 A Titanium Boride And Titanium Silicide Contact Barrier Formation For Integrated Circuits
5,745,617 A Near-Ultra-Violet Formation of Refractive-Index Grating Using Reflective Phase Mask
5,743,135 A Optical-Fiber Liquid-Level Monitor
5,736,943 A Method for Determining the Type of Coding to be Selected for Coding at Least Two Signals
5,728,602 A Semiconductor Wafer Manufacturing Process With High-Flow-Rate Low-Pressure Purge Cycles
5,719,507 A Logic Gate Having Transmission Gate for Electrically Configurable Device Multiplexer
5,717,401 A Active Recognition System with Optical Signal Processing
5,716,860 A CMOS Input Buffer With NMOS Gate Coupled To Vss THrough Undoped Gate Poly Resistor
5,707,589 A Funnel-Shaped Sample-Vial Septum with Membrane Covered Diffusion-Barrier Section
5,706,466 A Von Neumann System With Harvard Processor And Instruction Buffer
5,703,759 A Multi-Chip Electrically Reconfigurable Module with Predominantly Extra-Package Inter-Chip Connections
5,702,870 A Integrated-Circuit Via Formation Using Gradient Photolithography
5,700,692 A Flow Sorter with Video-Regulated Droplet Spacing
5,699,051 A Load Monitoring Electrical Outlet System
5,696,454 A Hierarchical Programming of Electrically Configurable Integrated Circuits
5,682,038 A Fluorescent-Particle Analyzer with Timing Alignment for Analog Pulse Subtraction of Fluorescent Pulses
Arising from Different Excitation Locations
5,659,197 A Hot-Carrier Shield Formation For Bipolar Transistor
5,649,174 A Microprocessor with Instruction-Cycle Versus Clock-Frequency Mode Selection
5,634,961 A Gas Chromatography System with Thermally Agile Oven
5,631,799 A Fusion Heat SInk For Integrated Circuit
5,618,740 A Method Of Making CMOS Output Buffer With Enhanced ESD Resistance
5,613,151 A Data Processor With Flexible Register Mapping Scheme

7.
300+ Issued Patents Prepared By Clifton Leon Anderson
5
5,604,689 A Arithmetic Logic Unit With Zero-Result Prediction
5,603,045 A Microprocessor System Having Instruction Cache With Reserved Branch Target Selection
5,586,069 A Arithmetic Logic Unit With Zero Sum Prediction
5,581,105 A CMOS Input Buffer With NMOS Gate Coupled To Vss Through Undoped Gate Poly Resistor
5,574,313 A Hermetically Sealed Microwave Integrated Circuit Package with Ground Plane Fused to Package Frame
5,559,751 A Electrically Configurable Integrated Circuit Configuration Using Clocked Data
5,531,810 A Injection Septum with Dust Wiper
5,528,045 A Particle Analyzer with Spatially Split Wavelength Filter
5,526,322 A Low-Power Memory Device with Accelerated Sense Amplifiers
5,517,049 A CMOS Output Buffer With Enhanced ESD Resistance
5,510,728 A Multi-Finger Input Buffer With Transistor Gates Capacitively Coupled To Ground
5,510,537 A Preparation of Alpha, Beta-Unsaturated Enones
5,498,947 A Frequency and Amplitude Variable Waveform Synthesizer
5,495,539 A Image Production Using Multidimensional Selection of Image Transformations
5,493,132 A Integrated Circuit Contact Barrier Formation WIth Ion Implant
5,481,686 A Floating-Point Processor With Apparent-Precision Based Selection Of Execution-Precision
5,477,476 A Power-Conservation System for Computer Peripherals
5,477,409 A Fusion Heat Sink For Integrated Circuit
5,472,825 A Metal Interconnect Fabrication With Dual Plasma SIlicon Dioxide Deposition And Etchback
5,430,748 A Laser System with Phase-Conjugator-Enhanced Output
5,418,391 A Semiconductor-On-Insulator Integrated Circuit With Selectively ThinnedChannel Region
5,417,122 A Soil Sampling System with Sample Container Rigidly Coupled to Drive Casing by Inflated Gland
5,398,539 A Correlated Multi-Dimensional Chromatography with Confirmatory Hybrid Run
5,395,773 A Mosfet With Gate-Penetrating Halo Implant
5,394,358 A SRAM Memory Cell With Tri-Level Local Interconnect
5,349,603 A Solid-State Laser Resonator
5,345,481 A Nuclear Reactor Plant with Containment Depressurization
5,342,794 A Method For Forming Laterally Graded Deposit-Type Emitter For Bipolar Transistor
5,337,144 A Etch Rate Monitor Using Collimated Light and Method of Using Same
5,319,689 A Compactable Phase-Separator Assembly for Dual-Phase Nuclear Reactor
5,315,558 A Integrated Circuit Memory With Non-Binary Array Configuration
5,310,621 A Semiconductor Photolithography With Superficial Plasma Etch
5,305,006 A Soliton-Phase Analog-to-Digital Converter
5,303,275 A Forced-Circulation Reactor With Fluidic-Diode-Enhanced Natural Circulation
5,291,090 A Curvilinear Interleaved Longitudinal-Mode Ultrasound Transducers
5,286,518 A Integrated-Circuit Processing With Progressive Intermetal-Dielectric Deposition
5,275,035 A Autocalibrating Trip Controller With Dual Adjustable Trip Points
5,272,651 A Circuit Simulation System With Wake-Up Latency
5,269,878 A Metal Patterning With Dechlornization In Integrated Circuit Manufacture
5,268,945 A Boiling Water Reactor System with Staggered Chimney
5,264,566 A Method For In Vitro Oligonucleotide Synthesis Using H-phosphonates
5,260,154 A Evaluating Photolithographic Exposures
5,256,550 A Fabricating a Semiconductor Device with Strained SIj-GEx Layer
5,253,276 A Dual-Longitudinal-Mode Ultrasonic Testing
5,252,100 A Variable Rotor-Blade-Attack Angle Helicopter Toy
5,241,570 A Core-Control Assembly with a Fixed Fuel Support
5,239,255 A Phase-Controlled Power Modulation System

8.
300+ Issued Patents Prepared By Clifton Leon Anderson
6
5,225,024 A Magnetically Enhanced Plasma Reactor System for Semiconductor Processing
5,220,518 A Integrated Circuit Memory With Non-Binary Array Configuration
5,207,977 A Reactor Pressure Vessel with Forged Nozzles
5,204,053 A Bi-Level Fuel Management Method for Boiling-Water Nuclear Reactor
5,200,150 A Preparation of Gel-Filled Separation Columns
5,199,795 A Packaging for Shipment and Containment of Hazardous Wastes
5,194,401 A Thermally Processing Semiconductor Wafers At Non-Ambient Pressures
5,193,092 A Integrated Parity-Based Testing For Integrated Circuits
5,183,627 A Nuclear Reactor with Low-Level Core Coolant Intake
5,180,547 A Boiling Water Reactor with Staggered Chimney
5,180,546 A Boiling Water Reactor with Downcomer Steam Release Channel
5,162,260 A Stacked Solid via Formation in Integrated Circuit Systems
5,154,880 A Nuclear Fuel Bundle with Coolant Bypass Channel
5,152,296 A Dual-Finger Vital Signs Monitor
5,150,330 A Interblock Dispersed-Word Memory Architecture
5,149,491 A Seed and Blanket Fuel Arrangement for Dual-Phase Nuclear Reactors
5,145,639 A Dual-Phase Reactor Plant with Partitioned Isolation Condenser
5,145,637 A Incore Housing Examination System
5,144,403 A Bipolar Transistor with Trench-Isolated Emitter
5,143,690 A Fuel-Assembly Inversion for Dual-Phase Nuclear Reactors
5,140,388 A Vertical Metal-Oxide Semiconductor Devices
5,135,657 A Chromatographic Method with Micellar On-Column Enrichment
5,128,279 A Charge Neutralization Using Silicon-Enriched Oxide Layer
5,126,970 A Static Random Access Memory With PMOS Pass Gates
5,126,099 A Boiling Water Reactor Plant with Hybrid Pressure Containment Cooling System
5,123,559 A Built-Up Inner Floating Ceiling for Use in an Oil Storage Tank
5,121,108 A Circuit Arrangement for Monitoring Two Operating Voltages
5,120,494 A Reactor-Core Isolation Cooling System with Dedicated Generator
5,120,493 A Forced-Circulation Reactor with Enhanced Natural Circulation
5,108,792 A Double-Dome Reactor for Semiconductor Processing
5,100,502 A Semiconductor Wafer Transfer in Processing Systems
5,084,231 A Cylindrical Refueling Mast with Longitudinal Guide Grooves
5,080,857 A Passive Lower Drywell Flooder
5,080,225 A Universal Diagnostic Sample Packaging Tray and Pouch
5,078,953 A Natural Circulation Boiling-Water Reactor With Output Power Regulations
5,077,661 A Assignment-Dependent Resource Allocation Method
5,070,307 A Differential Amplifier With Enhanced Slew Rate
5,064,602 A Control Rod Flow Diverters
5,061,355 A Preparation of Gel-Filled Separation Columns
5,057,897 A Charge Neutralization Using Silicon-Enriched Oxide Layer
5,038,243 A Local Initialization For Incremental Encoder
5,033,826 A High Temporal Resolution Optical Instrument
5,030,410 A Vacuum System for Nuclear Reactor Guide Tube
5,018,106 A Static Random Access Memory With Modulated Loads
5,008,210 A Process of Making a Bipolar Transistor with a Trench-Isolated Emitter
5,004,969 A Phase Control Switching Circuit Without Zero Crossing Detection
4,990,925 A Interferometric Radiometer

9.
300+ Issued Patents Prepared By Clifton Leon Anderson
7
4,988,643 A Self-Aligning Metal Interconnect Fabrication
4,973,865 A Auto-Delay Gain Circuit
4,969,750 A Method of Shipment and Containment of Hazardous Liquids
4,957,367 A Inteferometric Imaging System
4,954,149 A Injection Septum
4,949,148 A Self-Aligning Integrated Circuit Assembly
4,930,892 A Photodiode Array Spectrometer
4,928,626 A Reactang Gas Injection for IC Processing
4,920,918 A Pressure-Resistant Thermal Reactor System for Semiconductor Processing
4,914,665 A Boardband-Tunable External Fiber-Cavity Laser
4,890,153 A Single Bonding Shelf, Multi-Row Wire-Bond Finger Layout for Integrated Circuit Package
4,890,040 A Optically Triggered Back-Lighted Thyratron Network
4,881,143 A Compensated Magneto-Resistive Read Head
4,825,103 A Sample-And-Hold Circuit
4,810,456 A Method of Preventing Shrinkage Defects in Electrophoretic Gel Columns
4,808,820 A Electron-Emission Filament Cutoff for Gas Chromatography + Mass Spectrometry Systems
4,807,148 A Deconvolving Chromatographic Peaks
4,802,102 A Baseline Correction For Chromatography
4,802,012 A Image Sensor Driving Device with Noise Reduction Circuits
4,801,996 A Gigahertz Rate Integrated Circuit Package Incorporating Semiconductive MIS Power-Line Substrate
4,792,231 A Laser Speckle Imaging
4,773,719 A Optical Novelty Filter
4,739,332 A Fanbeam Inversion Radar
4,731,701 A Integrated Circuit Package with Thermal Path Layers Incorporating Staggered Thermal Vias
4,724,177 A Brushing Cyanoacrylates: Packaging and Method
4,720,687 A Frequency Locked Loop with Constant Loop Gain and Frequency Difference Detector Therefor
4,716,363 A Exponential Decay Time Constant Measurement Using Frequency of Offset Phase-Locked Loop: System and
Method
4,695,749 A Emitter-Coupled Logic Multiplexer
4,686,674 A Multiplexer with Inhibit for ECL Gate Array
4,686,394 A ECL Circuit with Current-Splitting Network
4,654,666 A Passive Frequency Scanning Radiometer
4,583,168 A Read Only Memory and Decode Circuit
4,573,118 A Microprocessor with Branch Control
4,538,585 A Dynamic Ignition Apparatus
4,512,075 A Method of Making an Integrated Injection Logic Cell Having Self-Aligned Collector and Base Reduced
Resistance Utilizing Selective Diffusion from Polycrystalline Regions
4,406,914 A Slotless Multi-Shielded Cable and Tape Therefor
4,374,555 A Carrying Case with Guards
4,317,240 A Sports Goggle
4,176,410 A Sport Goggle
RE37066 E1 Soil Sampling System with Sample Container Rigidly Coupled to Drive Casing