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Register Transfer & -operations
Computer Organization Computer Architectures Lab
REGISTER TRANSFER AND MICROOPERATIONS
• Register Transfer Language
• Register Transfer
• Bus and Memory Transfers
• Arithmetic Microoperations
• Logic Microoperations
• Shift Microoperations
• Arithmetic Logic Shift Unit
2
Register Transfer & -operations
Computer Organization Computer Architectures Lab
MICROOPERATION
MICROOPERATION: An elementary operation performed during
one clock pulse, on the information stored in one or more registers
operation ex.: shift, count, clear, load, add,...
ALU
(f)
Registers
(R)
1 clock cycle
Register Transfer Language
Digital systems are composed of modules that are constructed from digital
components, such as registers, decoders, arithmetic elements, and control
logic
3
Register Transfer & -operations
Computer Organization Computer Architectures Lab
REGISTER TRANSFER LANGUAGE
----> Register transfer language
- A symbolic language
- A convenient tool for describing the
internal organization of digital computers
- Can also be used to facilitate the design
process of digital systems.
For any function of the computer, a sequence of
microoperations is used to describe it
Register Transfer Language
The internal hardware organization of a digital computer is best defined by
specifying :
• The set of registers it contains and their functions
• The sequence of microoperations performed on the binary information
stored
• The control that initiates the sequence of microoperations
4
Register Transfer & -operations
Computer Organization Computer Architectures Lab
REGISTER TRANSFER
R1
Register
Numbering of bits
Showing individual bits
Subfields
PC(H) PC(L)
15 8 7 0
- a register
- portion of a register
- a bit of a register
Common ways of drawing the block diagram of a register
• This statement implies that the hardware is available
• The outputs of the source must have a path to the inputs of the destination
• The destination register has a parallel load capability
R2  R1
A binary condition(p=1) which determines when the transfer
is to occur
If (p=1) then (R2  R1)
P: R2  R1
7 6 5 4 3 2 1 0
R2
15 0
Designation of a register
Representation of a transfer(parallel)
Representation of a controlled(conditional) transfer
Register Transfer
5
Register Transfer & -operations
Computer Organization Computer Architectures Lab
HARDWARE IMPLEMENTATION OF CONTROLLED TRANSFERS
Implementation of controlled transfer
P: R2 R1
Block diagram
Timing diagram
Clock
Register Transfer
Transfer occurs here
R2
R1
Control
Circuit
Load
P
n
Clock
Load
t t+1
A comma is used to separate two or more operations that are executed
at the same time in one clock cycle
6
Register Transfer & -operations
Computer Organization Computer Architectures Lab
Questions
• Show the block diagram of the hardware that
implements the following register transfer statement:
» yT2: R2R1, R1 R2
• Explain the memory operation in each case.
– A. R2M[AR]
– B. M[AR]  R3
7
Register Transfer & -operations
Computer Organization Computer Architectures Lab
BUS AND MEMORY TRANSFER
Bus is a path(of a group of wires) over which information is transferred,
from any of several sources to any of several destinations.
From a register to bus: BUS <- R
Register A Register B Register C Register D
Bus lines
Bus and Memory Transfers
Reg. R0 Reg. R1 Reg. R2 Reg. R3
Bus lines
2 x 4
Decoder
Load
D0 D1 D2 D3
z
w
Select E (enable)
From bus to a register : R <- BUS
8
Register Transfer & -operations
Computer Organization Computer Architectures Lab
MEMORY TRANSFERS
Summary of Register Transfer Microoperations
AR
Memory
unit
Read
Write
DR
Memory read micro-op: DR  M ( DR  M[AR] )
Memory write micro-op: M  DR ( M[AR]  DR )
Bus and Memory Transfers
A  B Transfer content of reg. B into reg. A
AR  DR(N) Transfer content of N bits portion of reg. DR into reg. AR
A  constant Transfer a binary constant into reg. A
ABUS  R1, Transfer content of R1 into bus A and, at the same time,
R2  ABUS transfer content of bus A into R2
AR Address register
DR Data register
M[AR] Memory word specified by reg. AR
DR  M[AR] Memory read operation: transfers content of
memory word specified by AR into DR
M[AR]  DR Memory write operation: transfers content of
DR into memory word specified by AR
9
Register Transfer & -operations
Computer Organization Computer Architectures Lab
ARITHMETIC MICROOPERATIONS
* Summary of Arithmetic Micro-Operations
Four types of microoperations
- Register transfer microoperations
- Arithmetic microoperations
- Logic microoperations
- Shift microoperations
Arithmetic Microoperations
R3  R1 + R2 Contents of R1 plus R2 transferred to R3
R3  R1 - R2 Contents of R1 minus R2 transferred to R3
R2  R2’ Complement the contents of R2
R2  R2’+ 1 2's complement the contents of R2 (negate)
R3  R1 + R2’+ 1 subtraction
R1  R1 + 1 Increment
R1  R1 - 1 Decrement
10
Register Transfer & -operations
Computer Organization Computer Architectures Lab
BINARY ADDER
FA
B0 A0
S0
C0
FA
B1 A1
S1
C1
FA
B2 A2
S2
C2
FA
B3 A3
S3
C3
C4
Binary Adder-Subtractor
FA
B0 A0
S0
C0
C1
FA
B1 A1
S1
C2
FA
B2 A2
S2
C3
FA
B3 A3
S3
C4
M
Binary Adder
Arithmetic Microoperations
• The subtraction A-B can be carried out by the following steps:
• Take the 1’s complement of B (invert each bit)
• Get the 2’s complement by adding 1
• Add the result to A
11
Register Transfer & -operations
Computer Organization Computer Architectures Lab
Question
• Draw the block diagram for the hardware that
Implements the following statement:
– x+yz: AR  AR + BR
12
Register Transfer & -operations
Computer Organization Computer Architectures Lab
Question
13
Register Transfer & -operations
Computer Organization Computer Architectures Lab
ARITHMETIC CIRCUIT
S1
S0
0
1
2
3
4x1
MUX
X0
Y0
C0
C1
D0
FA
S1
S0
0
1
2
3
4x1
MUX
X1
Y1
C1
C2
D1
FA
S1
S0
0
1
2
3
4x1
MUX
X2
Y2
C2
C3
D2
FA
S1
S0
0
1
2
3
4x1
MUX
X3
Y3
C3
C4
D3
FA
Cout
A0
B0
A1
B1
A2
B2
A3
B3
0 1
S0
S1
Cin
Arithmetic Microoperations
14
Register Transfer & -operations
Computer Organization Computer Architectures Lab
Question
• The Arithmetic circuit in last slide has following
values for S1, S0 and Cin. In each case determine the
value of the output D in terms of the two input
registers A and B. What is the corresponding
microoperation?
S1 S0 Cin Output Microoperation
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
15
Register Transfer & -operations
Computer Organization Computer Architectures Lab
HARDWARE IMPLEMENTATION OF LOGIC MICROOPERATIONS
Logic Microoperations
0
Question:
Draw the digital circuit that performs the following logical
operations between reg. A and reg. B(draw the circuit for
one bit), then list the circuit function table:
(AND, OR, XOR and Complement).
16
Register Transfer & -operations
Computer Organization Computer Architectures Lab
Answer
0 0 F = A  B AND
0 1 F = AB OR
1 0 F = A  B XOR
1 1 F = A’ Complement
S1 S0 Output -operation
Function table
B
A
S
S
F
1
i
i
i
0
1
2
3
4 X 1
MUX
Select
17
Register Transfer & -operations
Computer Organization Computer Architectures Lab
SHIFT MICROOPERATIONS
- Logical shift : shift in a 0 into the extreme flip-flop
- Circular shift : circulates the bits of the register around the two ends
- Arithmetic shift : shifts a signed number (shift with sign extension)
Left shift -> multiplied by 2
Right shift -> divided by 2
Arithmetic shifts for signed binary numbers
Shift Micro-Operations
- Arithmetic shift-left Overflow V = Rn-1  Rn-2
- Arithmetic shift-right
Shift Microoperations
Symbol Description
R shl R Shift-left register R
R shr R Shift-right register R
R cil R Circular shift-left register R
R cir R Circular right-shift register R
R ashl R Arithmetic shift-left register R
R ashr R Arithmetic shift-right register R
Shifts
Rn-1 Rn-2 R1 R0
Sign
bit
18
Register Transfer & -operations
Computer Organization Computer Architectures Lab
Question
• An 8-bits register R ahs the following value:
11001010, find the value of R after performing the
following shifts:
a. Logical shift left
b. Logical shift right
c. Circular shift left
d. Circular shift right
e. Arithmetic shift left
f. Arithmetic shift right
19
Register Transfer & -operations
Computer Organization Computer Architectures Lab
Question
20
Register Transfer & -operations
Computer Organization Computer Architectures Lab
ARITHMETIC LOGIC SHIFT UNIT
S3 S2 S1 S0 Cin Operation Function
0 0 0 0 0 F = A Transfer A
0 0 0 0 1 F = A + 1 Increment A
0 0 0 1 0 F = A + B Addition
0 0 0 1 1 F = A + B + 1 Add with carry
0 0 1 0 0 F = A + B’ Subtract with borrow
0 0 1 0 1 F = A + B’+ 1 Subtraction
0 0 1 1 0 F = A - 1 Decrement A
0 0 1 1 1 F = A TransferA
0 1 0 0 X F = A  B AND
0 1 0 1 X F = A B OR
0 1 1 0 X F = A  B XOR
0 1 1 1 X F = A’ Complement A
1 0 X X X F = shr A Shift right A into F
1 1 X X X F = shl A Shift left A into F
Shift Microoperations
Arithmetic
Circuit
Logic
Circuit
C
C 4 x 1
MUX
Select
0
1
2
3
F
S3
S2
S1
S0
B
A
i
A
D
A
E
shr
shl
i+1 i
i
i
i+1
i-1
i
i

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REGISTER TRANSFER AND MICROOPERATIONS2017-3-5.ppt

  • 1. 1 Register Transfer & -operations Computer Organization Computer Architectures Lab REGISTER TRANSFER AND MICROOPERATIONS • Register Transfer Language • Register Transfer • Bus and Memory Transfers • Arithmetic Microoperations • Logic Microoperations • Shift Microoperations • Arithmetic Logic Shift Unit
  • 2. 2 Register Transfer & -operations Computer Organization Computer Architectures Lab MICROOPERATION MICROOPERATION: An elementary operation performed during one clock pulse, on the information stored in one or more registers operation ex.: shift, count, clear, load, add,... ALU (f) Registers (R) 1 clock cycle Register Transfer Language Digital systems are composed of modules that are constructed from digital components, such as registers, decoders, arithmetic elements, and control logic
  • 3. 3 Register Transfer & -operations Computer Organization Computer Architectures Lab REGISTER TRANSFER LANGUAGE ----> Register transfer language - A symbolic language - A convenient tool for describing the internal organization of digital computers - Can also be used to facilitate the design process of digital systems. For any function of the computer, a sequence of microoperations is used to describe it Register Transfer Language The internal hardware organization of a digital computer is best defined by specifying : • The set of registers it contains and their functions • The sequence of microoperations performed on the binary information stored • The control that initiates the sequence of microoperations
  • 4. 4 Register Transfer & -operations Computer Organization Computer Architectures Lab REGISTER TRANSFER R1 Register Numbering of bits Showing individual bits Subfields PC(H) PC(L) 15 8 7 0 - a register - portion of a register - a bit of a register Common ways of drawing the block diagram of a register • This statement implies that the hardware is available • The outputs of the source must have a path to the inputs of the destination • The destination register has a parallel load capability R2  R1 A binary condition(p=1) which determines when the transfer is to occur If (p=1) then (R2  R1) P: R2  R1 7 6 5 4 3 2 1 0 R2 15 0 Designation of a register Representation of a transfer(parallel) Representation of a controlled(conditional) transfer Register Transfer
  • 5. 5 Register Transfer & -operations Computer Organization Computer Architectures Lab HARDWARE IMPLEMENTATION OF CONTROLLED TRANSFERS Implementation of controlled transfer P: R2 R1 Block diagram Timing diagram Clock Register Transfer Transfer occurs here R2 R1 Control Circuit Load P n Clock Load t t+1 A comma is used to separate two or more operations that are executed at the same time in one clock cycle
  • 6. 6 Register Transfer & -operations Computer Organization Computer Architectures Lab Questions • Show the block diagram of the hardware that implements the following register transfer statement: » yT2: R2R1, R1 R2 • Explain the memory operation in each case. – A. R2M[AR] – B. M[AR]  R3
  • 7. 7 Register Transfer & -operations Computer Organization Computer Architectures Lab BUS AND MEMORY TRANSFER Bus is a path(of a group of wires) over which information is transferred, from any of several sources to any of several destinations. From a register to bus: BUS <- R Register A Register B Register C Register D Bus lines Bus and Memory Transfers Reg. R0 Reg. R1 Reg. R2 Reg. R3 Bus lines 2 x 4 Decoder Load D0 D1 D2 D3 z w Select E (enable) From bus to a register : R <- BUS
  • 8. 8 Register Transfer & -operations Computer Organization Computer Architectures Lab MEMORY TRANSFERS Summary of Register Transfer Microoperations AR Memory unit Read Write DR Memory read micro-op: DR  M ( DR  M[AR] ) Memory write micro-op: M  DR ( M[AR]  DR ) Bus and Memory Transfers A  B Transfer content of reg. B into reg. A AR  DR(N) Transfer content of N bits portion of reg. DR into reg. AR A  constant Transfer a binary constant into reg. A ABUS  R1, Transfer content of R1 into bus A and, at the same time, R2  ABUS transfer content of bus A into R2 AR Address register DR Data register M[AR] Memory word specified by reg. AR DR  M[AR] Memory read operation: transfers content of memory word specified by AR into DR M[AR]  DR Memory write operation: transfers content of DR into memory word specified by AR
  • 9. 9 Register Transfer & -operations Computer Organization Computer Architectures Lab ARITHMETIC MICROOPERATIONS * Summary of Arithmetic Micro-Operations Four types of microoperations - Register transfer microoperations - Arithmetic microoperations - Logic microoperations - Shift microoperations Arithmetic Microoperations R3  R1 + R2 Contents of R1 plus R2 transferred to R3 R3  R1 - R2 Contents of R1 minus R2 transferred to R3 R2  R2’ Complement the contents of R2 R2  R2’+ 1 2's complement the contents of R2 (negate) R3  R1 + R2’+ 1 subtraction R1  R1 + 1 Increment R1  R1 - 1 Decrement
  • 10. 10 Register Transfer & -operations Computer Organization Computer Architectures Lab BINARY ADDER FA B0 A0 S0 C0 FA B1 A1 S1 C1 FA B2 A2 S2 C2 FA B3 A3 S3 C3 C4 Binary Adder-Subtractor FA B0 A0 S0 C0 C1 FA B1 A1 S1 C2 FA B2 A2 S2 C3 FA B3 A3 S3 C4 M Binary Adder Arithmetic Microoperations • The subtraction A-B can be carried out by the following steps: • Take the 1’s complement of B (invert each bit) • Get the 2’s complement by adding 1 • Add the result to A
  • 11. 11 Register Transfer & -operations Computer Organization Computer Architectures Lab Question • Draw the block diagram for the hardware that Implements the following statement: – x+yz: AR  AR + BR
  • 12. 12 Register Transfer & -operations Computer Organization Computer Architectures Lab Question
  • 13. 13 Register Transfer & -operations Computer Organization Computer Architectures Lab ARITHMETIC CIRCUIT S1 S0 0 1 2 3 4x1 MUX X0 Y0 C0 C1 D0 FA S1 S0 0 1 2 3 4x1 MUX X1 Y1 C1 C2 D1 FA S1 S0 0 1 2 3 4x1 MUX X2 Y2 C2 C3 D2 FA S1 S0 0 1 2 3 4x1 MUX X3 Y3 C3 C4 D3 FA Cout A0 B0 A1 B1 A2 B2 A3 B3 0 1 S0 S1 Cin Arithmetic Microoperations
  • 14. 14 Register Transfer & -operations Computer Organization Computer Architectures Lab Question • The Arithmetic circuit in last slide has following values for S1, S0 and Cin. In each case determine the value of the output D in terms of the two input registers A and B. What is the corresponding microoperation? S1 S0 Cin Output Microoperation 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1
  • 15. 15 Register Transfer & -operations Computer Organization Computer Architectures Lab HARDWARE IMPLEMENTATION OF LOGIC MICROOPERATIONS Logic Microoperations 0 Question: Draw the digital circuit that performs the following logical operations between reg. A and reg. B(draw the circuit for one bit), then list the circuit function table: (AND, OR, XOR and Complement).
  • 16. 16 Register Transfer & -operations Computer Organization Computer Architectures Lab Answer 0 0 F = A  B AND 0 1 F = AB OR 1 0 F = A  B XOR 1 1 F = A’ Complement S1 S0 Output -operation Function table B A S S F 1 i i i 0 1 2 3 4 X 1 MUX Select
  • 17. 17 Register Transfer & -operations Computer Organization Computer Architectures Lab SHIFT MICROOPERATIONS - Logical shift : shift in a 0 into the extreme flip-flop - Circular shift : circulates the bits of the register around the two ends - Arithmetic shift : shifts a signed number (shift with sign extension) Left shift -> multiplied by 2 Right shift -> divided by 2 Arithmetic shifts for signed binary numbers Shift Micro-Operations - Arithmetic shift-left Overflow V = Rn-1  Rn-2 - Arithmetic shift-right Shift Microoperations Symbol Description R shl R Shift-left register R R shr R Shift-right register R R cil R Circular shift-left register R R cir R Circular right-shift register R R ashl R Arithmetic shift-left register R R ashr R Arithmetic shift-right register R Shifts Rn-1 Rn-2 R1 R0 Sign bit
  • 18. 18 Register Transfer & -operations Computer Organization Computer Architectures Lab Question • An 8-bits register R ahs the following value: 11001010, find the value of R after performing the following shifts: a. Logical shift left b. Logical shift right c. Circular shift left d. Circular shift right e. Arithmetic shift left f. Arithmetic shift right
  • 19. 19 Register Transfer & -operations Computer Organization Computer Architectures Lab Question
  • 20. 20 Register Transfer & -operations Computer Organization Computer Architectures Lab ARITHMETIC LOGIC SHIFT UNIT S3 S2 S1 S0 Cin Operation Function 0 0 0 0 0 F = A Transfer A 0 0 0 0 1 F = A + 1 Increment A 0 0 0 1 0 F = A + B Addition 0 0 0 1 1 F = A + B + 1 Add with carry 0 0 1 0 0 F = A + B’ Subtract with borrow 0 0 1 0 1 F = A + B’+ 1 Subtraction 0 0 1 1 0 F = A - 1 Decrement A 0 0 1 1 1 F = A TransferA 0 1 0 0 X F = A  B AND 0 1 0 1 X F = A B OR 0 1 1 0 X F = A  B XOR 0 1 1 1 X F = A’ Complement A 1 0 X X X F = shr A Shift right A into F 1 1 X X X F = shl A Shift left A into F Shift Microoperations Arithmetic Circuit Logic Circuit C C 4 x 1 MUX Select 0 1 2 3 F S3 S2 S1 S0 B A i A D A E shr shl i+1 i i i i+1 i-1 i i