Recommended
More Related Content
Similar to Rationale behind FPGAs
Recently uploaded
Recently uploaded (20)
Rationale behind FPGAs
- 1. Giuseppe Franco giuseppe2.franco@mail.polimi.it Elisabetta Besana elisabetta.besana@mail.polimi.it Noemi Beretta noemi.beretta@mail.polimi.it Rationale behind FPGA 05/04/2017
- 2. 2 Our Goals The choice of the architecture is closely associated with the goals of our project. SeNSE should be: Lightweight Reparable & Upgradable Responsive
- 3. The choice of the architecture is closely associated with the goals of our project. Lightweight Reparable & Upgradable Responsive SeNSE should be: Computational Power 2Our Goals
- 4. The choice of the architecture is closely associated with the goals of our project. Lightweight Reparable & Upgradable Responsive SeNSE should be: Computational Power Power Consumption (Size of Batteries) 2Our Goals
- 5. The choice of the architecture is closely associated with the goals of our project. Lightweight Reparable & Upgradable Responsive SeNSE should be: Reconfigurability Computational Power Power Consumption (Size of Batteries) 2Our Goals
- 6. ASIC Microcontroller FPGA Computational Power Power Consumption Reconfigurability Time required for implementation Different Architectures 3
- 7. ASIC Microcontroller FPGA Computational Power Power Consumption Reconfigurability Time required for implementation Different Architectures 3
- 8. ASIC Microcontroller FPGA Computational Power Power Consumption Reconfigurability Time required for implementation Different Architectures 3
- 9. ASIC Microcontroller FPGA Computational Power Power Consumption Reconfigurability Time required for implementation Different Architectures 3
- 10. Giuseppe Franco giuseppe2.franco@mail.polimi.it Elisabetta Besana elisabetta.besana@mail.polimi.it Noemi Beretta noemi.beretta@mail.polimi.it Follow us on : Facebook Twitter Slideshare facebook.com/SenseNecst twitter.com/SeNSEatNECST slideshare.net/SeNSEatNecst