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Solid State Drive
Amogha .B.
4GM09EC006
INTRODUCTION
• The explosion of flash memory technology has
dramatically increased storage capacity and
decreased the cost of non-volatile
semiconductor memory.
• SSDs do not contain any moving parts and
depend on flash memory chips to store data.
• Flash memory chips store data in a large array
of floating gate (MOS) transistors.
HISTORY
• FLASH MEMORY WAS INVENTED BY DR. FUJIO
MASUOKA IN 1984.
• HE RECOMMENDED THE NAME ‘FLASH ‘ BY
SEEING THE FLASH FROM CAMs.
OPERATION
OPERATION
•Logic 1: erase mode.
Logic 0: programming
mode.
•Fowler-Nordheim
tunneling is emission
of electrons induced by an
electrostatic field. The
most common context is
FE from a solid surface into
vacuum solid or liquid
surfaces, into air, a fluid, or
any non-conducting or
weakly conducting
dielectric.
SERIAL ADVANCED TECHNOLOGY ATTACHMENT – SATA EX:HOST
IINTERFACE
NAND FLASH SUPPORT 8 OR 16 BIT I/O BUS, HAVING INTERNEL 1KB
BUS TRANSFER, SUPPORTS MULTIPLE NAND FLASH DEVICES,
SUPPORTS FLOW THROUGH DMA DATA TRANSFERS
RAM BUFFER IS MANAGED BY BML FOR FETCHING DATA
CHIPS-NAND MEMORY CHIPS
NAND FLASH CONTROLLER
EEC – ERROR CORRECTION CODE
NAND USES BLOCK CODE (n,k) k- DATA BITS
http://www.quicklogic.com/assets/pdf/data_sheets/QL_NAND_Flash_Controller_PSB
_DS_RevA.pdf
Software Layers SSD
• Buffer Management Layer- accept data and
stores in buffer
• Flash Translation Layer- data placed into flash
memory
• The GC overhead (i.e., the merge cost) is
critical to the performance of an SSD & blocks
user requests. Merge – victim pages replaced
by free block.
Live Page Copying
•PAGE BUFFERS ARE
USED BECAUSE PAGES
WILL NOT EJECT TILL
THE BUFFER IS FULL.
•DATA CACHE IS USED
MAINLY TO REDUCE
THE TIME.
PAGE PLACEMENT IN SDD
• PA (PAGE AFFINITY) USES INTRA COPING.
• CA (CHIP AFFINITY) USES CROSS PLANE .
• NA (NON AFFINITY) USES CROSS CHIP.
• TARGET PLANE SELECTION IN PA
CROSS-LAYER OPTIMIZATION
• TO ACHIVE PARRELLISM WITH LOW GC .
• USING FAP (First Available Plane)-LRU.
• BLOCK REPOSITIONING METHOD.
FAP (First Available Plane)-LRU.
• Recency and degree of parallelism
• SELECTION OF VICTIM PAGE
• P= BTPL( 1/ Nb)Nb represents the number of
pages per block and the table BTPL(i.e., Block-
To-plane)
FAP-LRU AND LRU
BLOCK REPOSITIONING
• EFFECTIVENESS OF FRU-LRU DECREASES WITH
LARGE SIZED DATA.
• PLANE1 PLANE 2 .
• PLANE1 DEAD AFTER COPING TO PLANE2 SO
REDUCES TIME IN FUTURE MERGE.
PERFORMANCE EVALUATION
PARAMETERS value
SSD CAPACITY 80 GB
BUFFER
CACHE/SEARCH
WINDOW SIZE
20MB/5MB
#OF BUSES/PLANES
PER CHIP
10/8
PAGE READ/WRITE 25us/200us
TRACES # OF
PAGE
READ/
WRITE
WRITE
RATIO
(%)
AVERAG
E READ
/WRITE
REQUES
T SIZE
WIN 204180/
188675
48 5.8/5.4
SQL 294918/
293562
49.9 15.3/14
MSN 104513/
67477
39 2.6/3.2
4VMs 478/323
684
99.9 2.4/5.9
IOZ 19718/4
3218
69.3 21.1/84.
2
PERFORMANCE RESULTS
0
1
2
3
4
5
6
7
8
WIN
SQL
MSN
4VMs
IOZ
PA
CA
NA
PROPOSED
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
WIN
SQL
MSN
4VMs
IOZ
WITH
BLOCK
WITHOUT
BLOCKING
DEMAND FOR SSDS AND HDDS IN
PORTABLE COMPUTERS
0
50
100
150
200
250
2005 2006 2007 2008 2009 2010 2011
SDD
HDD
CHALLENGES
• LATENCY IS LOW, TIME REQUIRED TO LOCATE A FILE
• SURVIVAL - IOPS IS GREAT BUT LIMITED WRITE
CYCLES THAN HDD
• FTL - LATENCY SPIKES(TIME DELAY) AND LIMITED
DURABILITY.
• FOR SDD GEOMETRY IS HIGHLY VIRTUALIZED
GEOMETRY OF HARD DISK
• DATA IS ACCESSED BY MOVING HEAD
IN AND OUT OF THE DISK
•DAT STORED IN CONCENTRIC CIRCLES
ADVANTAGES
• HIGH START UP RATE-NO MOVING PARTS
• DATA TRANSFER RATE IS HIGH 100-600 MB/S
• NO NOISE
• TO NEED OF TEMPERATURE COOLER
• SHOCK RESISTIENT
• WEIGHT & SIZE IS LESS Height is NOT standardized -
there are 7.5mm and 9mm SSDs
• POWER CONSUMPTION IS LESS.
DISADVANTAGES
• STORAGE CAPACITY IS LESS 2TB IN 2011
• SLOWER WRITE SPEEDS BECAUSE OF THE ERASE
BLOCKS ARE BECOMING LARGER AND LARGER.
• For low capacity flash SSDs, low power consumption
and heat production when in active use. High
capacity SSDs may have significant higher power
requirements.
• COST IS HIGH.
APPLICATIONS
• CLOUD COMPUTING-ACCESS OVER INTERNET NEEDS SPEED
• UNTIL 2009, SSDS WERE MAINLY USED IN THOSE ASPECTS
OF MISSION CRITICAL APPLICATIONS
• FLASH MEMORY.
• USB .
• STORAGE DEVICES.
• E-MAIL SERVICES IT NEEDS QUICK RESPONSE .
• VIRTULIZATONS OF I/O CAN BE DONE.
• DATA BASE & OLTP – ONLINE TRANSACTION PROCESS.
CONCLUSION
• SSDs utilize parallel architectures to improve
their I/O throughput.
• The results show that there is no best policy due to
the tradeoff between the degree of parallelism and
the GC overhead.
• FTL- GC OVER HEAD LOW, BML DEGREE OF
PARALLISM
• SIMULATION RESULTS IMPROVES RESPONSE TIME TO
79%
REFERENCES
• IEEETrans. Comput., vol. 60, no. 6, pp. 753–766, 2011 BY M. L.
Chiao and D.W. Chang.
• H. Shim, B. Seo, J. Kim, and S. Maeng, “An adaptive
partitioning scheme for DRAM-based cache in solid state
drives,” in Proc. IEEE IN NOV 2010
• R. McDougall and J. Mauro, FileBench [Online]. Available:
http:// www.solarisinternals.com/si/tools/filebench/
• http://www.intel.com/pressroom/.html
• http://www.physorg.com/news/.html
• http://www.storageview.com/.html
THANK YOU
• ????!

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Ppt ssd

  • 1. Solid State Drive Amogha .B. 4GM09EC006
  • 2. INTRODUCTION • The explosion of flash memory technology has dramatically increased storage capacity and decreased the cost of non-volatile semiconductor memory. • SSDs do not contain any moving parts and depend on flash memory chips to store data. • Flash memory chips store data in a large array of floating gate (MOS) transistors.
  • 3. HISTORY • FLASH MEMORY WAS INVENTED BY DR. FUJIO MASUOKA IN 1984. • HE RECOMMENDED THE NAME ‘FLASH ‘ BY SEEING THE FLASH FROM CAMs.
  • 5. OPERATION •Logic 1: erase mode. Logic 0: programming mode. •Fowler-Nordheim tunneling is emission of electrons induced by an electrostatic field. The most common context is FE from a solid surface into vacuum solid or liquid surfaces, into air, a fluid, or any non-conducting or weakly conducting dielectric.
  • 6. SERIAL ADVANCED TECHNOLOGY ATTACHMENT – SATA EX:HOST IINTERFACE NAND FLASH SUPPORT 8 OR 16 BIT I/O BUS, HAVING INTERNEL 1KB BUS TRANSFER, SUPPORTS MULTIPLE NAND FLASH DEVICES, SUPPORTS FLOW THROUGH DMA DATA TRANSFERS RAM BUFFER IS MANAGED BY BML FOR FETCHING DATA CHIPS-NAND MEMORY CHIPS
  • 7. NAND FLASH CONTROLLER EEC – ERROR CORRECTION CODE NAND USES BLOCK CODE (n,k) k- DATA BITS http://www.quicklogic.com/assets/pdf/data_sheets/QL_NAND_Flash_Controller_PSB _DS_RevA.pdf
  • 8. Software Layers SSD • Buffer Management Layer- accept data and stores in buffer • Flash Translation Layer- data placed into flash memory • The GC overhead (i.e., the merge cost) is critical to the performance of an SSD & blocks user requests. Merge – victim pages replaced by free block.
  • 9. Live Page Copying •PAGE BUFFERS ARE USED BECAUSE PAGES WILL NOT EJECT TILL THE BUFFER IS FULL. •DATA CACHE IS USED MAINLY TO REDUCE THE TIME.
  • 10. PAGE PLACEMENT IN SDD • PA (PAGE AFFINITY) USES INTRA COPING. • CA (CHIP AFFINITY) USES CROSS PLANE . • NA (NON AFFINITY) USES CROSS CHIP. • TARGET PLANE SELECTION IN PA
  • 11. CROSS-LAYER OPTIMIZATION • TO ACHIVE PARRELLISM WITH LOW GC . • USING FAP (First Available Plane)-LRU. • BLOCK REPOSITIONING METHOD.
  • 12. FAP (First Available Plane)-LRU. • Recency and degree of parallelism • SELECTION OF VICTIM PAGE • P= BTPL( 1/ Nb)Nb represents the number of pages per block and the table BTPL(i.e., Block- To-plane)
  • 14. BLOCK REPOSITIONING • EFFECTIVENESS OF FRU-LRU DECREASES WITH LARGE SIZED DATA. • PLANE1 PLANE 2 . • PLANE1 DEAD AFTER COPING TO PLANE2 SO REDUCES TIME IN FUTURE MERGE.
  • 15. PERFORMANCE EVALUATION PARAMETERS value SSD CAPACITY 80 GB BUFFER CACHE/SEARCH WINDOW SIZE 20MB/5MB #OF BUSES/PLANES PER CHIP 10/8 PAGE READ/WRITE 25us/200us TRACES # OF PAGE READ/ WRITE WRITE RATIO (%) AVERAG E READ /WRITE REQUES T SIZE WIN 204180/ 188675 48 5.8/5.4 SQL 294918/ 293562 49.9 15.3/14 MSN 104513/ 67477 39 2.6/3.2 4VMs 478/323 684 99.9 2.4/5.9 IOZ 19718/4 3218 69.3 21.1/84. 2
  • 17. DEMAND FOR SSDS AND HDDS IN PORTABLE COMPUTERS 0 50 100 150 200 250 2005 2006 2007 2008 2009 2010 2011 SDD HDD
  • 18. CHALLENGES • LATENCY IS LOW, TIME REQUIRED TO LOCATE A FILE • SURVIVAL - IOPS IS GREAT BUT LIMITED WRITE CYCLES THAN HDD • FTL - LATENCY SPIKES(TIME DELAY) AND LIMITED DURABILITY. • FOR SDD GEOMETRY IS HIGHLY VIRTUALIZED
  • 19. GEOMETRY OF HARD DISK • DATA IS ACCESSED BY MOVING HEAD IN AND OUT OF THE DISK •DAT STORED IN CONCENTRIC CIRCLES
  • 20. ADVANTAGES • HIGH START UP RATE-NO MOVING PARTS • DATA TRANSFER RATE IS HIGH 100-600 MB/S • NO NOISE • TO NEED OF TEMPERATURE COOLER • SHOCK RESISTIENT • WEIGHT & SIZE IS LESS Height is NOT standardized - there are 7.5mm and 9mm SSDs • POWER CONSUMPTION IS LESS.
  • 21. DISADVANTAGES • STORAGE CAPACITY IS LESS 2TB IN 2011 • SLOWER WRITE SPEEDS BECAUSE OF THE ERASE BLOCKS ARE BECOMING LARGER AND LARGER. • For low capacity flash SSDs, low power consumption and heat production when in active use. High capacity SSDs may have significant higher power requirements. • COST IS HIGH.
  • 22. APPLICATIONS • CLOUD COMPUTING-ACCESS OVER INTERNET NEEDS SPEED • UNTIL 2009, SSDS WERE MAINLY USED IN THOSE ASPECTS OF MISSION CRITICAL APPLICATIONS • FLASH MEMORY. • USB . • STORAGE DEVICES. • E-MAIL SERVICES IT NEEDS QUICK RESPONSE . • VIRTULIZATONS OF I/O CAN BE DONE. • DATA BASE & OLTP – ONLINE TRANSACTION PROCESS.
  • 23. CONCLUSION • SSDs utilize parallel architectures to improve their I/O throughput. • The results show that there is no best policy due to the tradeoff between the degree of parallelism and the GC overhead. • FTL- GC OVER HEAD LOW, BML DEGREE OF PARALLISM • SIMULATION RESULTS IMPROVES RESPONSE TIME TO 79%
  • 24. REFERENCES • IEEETrans. Comput., vol. 60, no. 6, pp. 753–766, 2011 BY M. L. Chiao and D.W. Chang. • H. Shim, B. Seo, J. Kim, and S. Maeng, “An adaptive partitioning scheme for DRAM-based cache in solid state drives,” in Proc. IEEE IN NOV 2010 • R. McDougall and J. Mauro, FileBench [Online]. Available: http:// www.solarisinternals.com/si/tools/filebench/ • http://www.intel.com/pressroom/.html • http://www.physorg.com/news/.html • http://www.storageview.com/.html

Editor's Notes

  1. Merge – victim pages replaced by free block