1. Ranjan Kumar Singh
C/246, Bilashpur Camp , Molarband , Badarpur-110044
Email : ranjan.kumar326@gmail.com, Mobile: +91-9873244979
CAREER OBJECTIVE
To work in a firm with a professional work driven environment where I can apply and utilize my knowledge
and Skills which would enable me as a fresh graduate to grow while fulfilling organizational goals.
EDUCATION
1.) GyanVihar School of Engg& Technology, Jaipur (2013-2014)
M.Tech. (V.L.S.I) (76.65%)
2.) GyanVihar School of Engg& Technology, Jaipur (2009-2013)
B.Tech (Electronics & communication) (70.58%)
3.) N.I.O.S (New Delhi) (2008)
S.S.S.E (Science) (63%)
4.) K.S.High School Tamuria (Madhubani) (2005)
10th
, Board S.S.E (68%)
WORK EXPERIENCE
 Company: ElectronicsCorporationOf India
 Duration: Still workingfrom 12th
Feb. 2015.
 Job Profile:EngineerConsultant.
PROJECTS IN B.TECH
1. People Counter: This is our minor project. The circuit of “people counter” consists of two seven
segment display, two IC4033, a set-reset switch, two resisters are used with the IC and fourteen
resisters are used with the seven segment display.
The seven segment display is set at zero by set-reset switch and the whole circuit is placed at the
wall of the entrance. At the opposite side of the circuit the laser light is placed, as soon as any
person enters the path of the laser light to the LDR at the circuit is blocked and the counting starts.
Each seven segment IC is connected to one seven segment display in which input is provided at
the 1st
pin of each IC, and the output is obtained at the fifth pin of each IC.
The LDR is connected at the clock input of first IC, connected between pin1 and pin2 for
triggering. The output from the fifth pin of the first IC is connected to the input pin of the second

2. IC and as soon as input is applied at the first pin of IC one then counting from 0 to 9 is done by
the seven segment display.
1. Done an M.Tech. research on topic “ Implementation and Analysis of Power Reduction in 2 to 4
Decoder Design using Adiabatic Logic” and published in IJRET journal, Volume 3, Issue 7, Jul
2014
My research is based on the adiabatic logic which has been applied on 2 to 4 decoder circuit designed
on the Tanner tool. Adiabatic word is originated from the thermodynamics and it had implemented
on the circuit since 1994. The basic parameter of any system design analysis is power and
performance. For the system requirement there is always a trade of between power and performance.
There is also another parameter for the VLSI system design called cost and cost is also affected by
the power and size of the chip. The normal MOS technology works on two cycle charging and
discharging adiabatic logic is used at the discharging time at the discharging period it recycle the
energy instead of discharging to the ground. And on the other hand CMOS logic works on the logic
‘1’ and logic ‘0’ for the charging and discharging respectively. And this technique is done on the 2
to 4 decoder and analyse the power dissipation as comparison with conventional CMOS decoder
design.
• Programming languages: V.H.D.L, SQL, IT Infra.
• Operating system: windows.
• Basics: MSWord, MS Excel, MS PowerPoint, Designing on Tanner Tool.
• Participated in Quiz Competition in International Level Tech Fest Ayam’12.
• Participated in Line Follower robotics Competition in National Level Tech Fest Ayam’11.
• Worked as Coordinator in Ayam Tech Fest.
• Ability to rapidly build relationship and setup trust.
• Confident and determined.
• Ability to cope up with different situations.
PROJECTS IN M.TECH
TECHNICAL SKILLS
ACHIEVEMENTS
INTERPERSONAL SKILLS

3. Place: NewDelhi
• ECE Software and Hardware
D.O.B: 14THAPRIL 1989 Language Known: English, Hindi.
Father’s name: Shyam Chandra Singh SEX: Male.
Contact No. : +91 9873244979
Hobbies: Playing cricket and listening music.
AREA OF INTEREST
OTHER DETAILS