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LDPC codes have been discovered a long time ago & re-discovered after invention of turbo codes. These two codes are actors of revolution of error correcting codes theory. In this thesis, the principle of LDPC codes will be studied. Besides, based on this, design is done for the IP core, involves LDPC code performance and construction of behavioural model for Encoder & Decoder using Generator matrix and parity check matrix , then use Model sim for compilation & simulation also test bench design is made to test Encoder & Decoder blocks.
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Matfree Spice slides
1.
MatFree SPICE Progress &
Strategy
2.
Implementation
● Model-Eval Converges ● Is consistent with direct-solve. Model Model Δt Solve Eval ● Next: – Plug into 3F5
3.
Questions asked ✔
Converges? ✔ Consistent with direct-solve? ● Number of iterations to convergence? ● Circuit depth? ● Power?
4.
Iterations to Convergence
1 FPGA? t Sequential MatFree 0 # PE's
5.
Iterations to Convergence t
N0.7 N0 + d + k N0 + k 0 # devices
6.
Depth
7.
Depth
8.
FPGA communications cost Model
Model Solve Evaluate
9.
Strategy ●
Identify convergence criteria ● Identify effect of circuit depth on convergence time ● Identify possible power savings over sequential solve