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Do you know what your digital pins
are "really" saying
● History of Logic Analyzers
● Sigrok project
● Pulseview GUI
● Decoder Protocols
● Live Demos
● There will be a test
History of Logic Analyzers
● Wiki: en.wikipedia.org/wiki/Logic_analyzer
● 1973 HP5000A 2 channels display was 32 Leds
$1900 ($10,793 today)
● 1974 HP 1601L 16 rows of 12 bit words as 1s and
zeros $4000 ($20,903)
● http://hpmemoryproject.org/wb_pages/wall_b_page_12.htm
● 2017 8 Channel clone: $5 ( 2-3 months -China)
– uses usb to your PC
● Many other variations at different price points
● https://sigrok.org/wiki/Supported_hardware#Logic_analyzers
Sigrok Project
● Started 2010 - Portable, cross-platform,
Open-Source signal analysis software suite
● Common framework for logic analyzers,
oscilloscopes, other analog and digital
devices
● Hardware support
●
https://sigrok.org/wiki/Supported_hardware
Suite of Projects
● libsigrok – the brains with device control,
communications, signal tracing functionality
● libsigrokdecode – Python 3 interface library with protocol
decoders
● sigrok-cli – Command line back end interface
● sigrok-util – various scripts/utilities
● sigrok-dumps – collection of execution trace dumps
● fx2lafw – OSS firmware for Cypress FX2 analyzers
● pulseview – sigrok QT GUI front end
Sigrok Uses
● Perform time measurements on signals
● Make sense of digital signals with protocol
decoders
● Write custom protocol decoders in python
● Remote-control your power supply
● Remote-control whatever lab device you'd
like to support
● Write a quick-n-dirty automation tool for
your particular needs
The Analyzer Hardware
● Base on a Saleae design using FX2 chip
● Bring in the clones
● Search ebay - 24 Mhz Logic Analyzer
● 5v power from PC usb bus
● Input data pin range 0 – 5.5 V max
● High level threshold 1.5 V for our version
● No data or pin overvoltage buffering
● No external clock for sample rate input
The clones
● Google: 24mhz logic analyzer
Cypress’s EZ-USB® FX2xx
● Single chip General Programmable
Interface (GPIF™)
● Integrated with USB 2.0 transceiver, Serial
Interface Engine, enhanced 8051
microprocessor, and 16 kB on-chip
code/data RAM
● Low power 3.3 V core, ultra low power 1.8 V
(FX2LP18)
● Connectivity: I2C, USART
● Flexibility: Proprietary 8/16-bit data bus
FX2 Internals
fx2lafw firmware sub project
● Open-source firmware for the Cypress FX2
chips
● Should work with any FX2-based hardware,
including logic analyzers, FX2 eval boards,
oscilloscopes, etc
● Firmware is downloaded each time unit is
attached/powered on
● No analog pin support
Triggers ??
● External Triggers and patterns
RTC Probe Data
● unzip rtc_ds1307_200khz.sr
●
hexdump logic-1
0000000 0201 0203 0003 0201 0003 0001 0001 0001
0000010 0001 0201 0202 0202 0100 0100 0100 0100
0000020 0100 0100 0100 0100 0100 0100 0100 0302
0000030 0302 0100 0100 0100 0100 0100 0100 0100
0000040 0302 0302 0100 0302 0100 0302 0100 0100
0000050 0100 0302 0100 0100 0100 0302 0302 0100
0000060 0100 0100 0100 0100 0100 0100 0100 0302
0000070 0100 0100 0100 0100 0302 0100 0100 0100
0000080 0100 0100 0100 0100 0100 0100 0100 0100
● Other formats:
● Value change dump, analog, comma separated, Gnuplot,
vendor/device specific formats
Data Viewers
● CLI
● Command line ascii display
● GUI
● Several permutations of UI
● Pulseview is the current GUI of choice
● https://sigrok.org/wiki/Getting_started_with_a_logic_
Pulseview – the viewer
● Current UI of choice
● Triggers set per channel via left click on
channel
● Pretrigger ratio, how much data prior to
trigger event
Protocol Decoders
● Protocols can be stacked, output of one,
input to another
● 41 primary decoders
● 36 stacked decoders
● Not all at 100% implemented
● Decoders written in Python
● Write your own protocol provide a canned
data file
Comm Protocols in Demos
● UART - async
– One device per UART connection
● SPI Bus – sync bus
● Number of devices limited by number of unique
chip select lines, bus capacitance
● I2C Bus – sync bus
● Max number of devices 127, 255, or 1023
– Depends on hardware support (7,8,10 bit address)
/bus capacitance
UART
● 2 data lines Rx/Tx async
● No shared clock line, each device
generates its own clock
● When Start bit is detected, periperhal
restarts its internal baud rate clock in order
to be in sync
● Requires precise internal clock at both sides
SPI = Serial Peripheral Interface
● Developed by Motorola late 80's
● 6 data lines
● SCK - clock supplie by master
● CE - chip enable supplied by master
● CSN - chip select not, used by master to select
slave, active low selects slave
● MISO – Master In Slave Out
● MOSI – Master Out Slave In
● IRQ – interrup request
SPI
● SPI spec does not define clock speeds,
● over 10Mps often seen
● Full duplex in default mode
● Arbitrary choice of message size, content, and purpose
● Slaves use the master's clock
● Higher throughput than I²C
– http://www.byteparadigm.com/applications/introduction-to-i2c-and-spi-proto
I2C = Inter-Integrated Circuit
● Designed by Phillips (NXP) in the early late 70's to connect
components that reside on the same circuit board
● 2 data lines (vs SPI's 6)
● Serial Data Line (SDA), Serial Clock Line (SCL) open drain
● The bus requires a pull-up resistor to VCC (typical 10 kΩ for 100 kHz,
2 kΩ for 400 kHz and 1 MHz). Value varies somewhat depending on
number of devices and length of bus
● 7, 8, 10bit Address Space, 7 is the standard preset address range
(lower 2-3 bits jumper programmable)
● Upper address bits assigned by spec onwer NXP
● https://www.nxp.com/docs/en/user-guide/UM10204.pdf
I2C continued
● Spec supports set clock speeds depending on the I2C mode and hardware
● Standard mode: 100 Kbit/s/, Full speed: 400 Kbit/s , Fast Mode: 1 Mbit/s,
High speed: 3.4 Mbit/s
● Not full duplex
● Master supplies the clock (SCL)
● Data line must be stable when clock bit is high
– Start bit is when SDA transitions from high to low while clock bit is high
– Stop bit is when data bit transitions to high while clock is high
● Successive reads/writes increment to the next register
I2C Devices
Serial Memory
A/D Converter
Gyroscope
Temp Sensor
Power Monitor
Accelerometer
LCD
Compass
Expansion Module
Cap Touch Buttons
Sigrok Canned Data
● Canned data
● If you add a protocol analyzer you must add
some canned data as a demo
● Pulseview exp: use z80 for many trace lines
example
Sigrok Canned Data
● Canned data
● If you add a protocol analyzer you must add
some canned data as a demo
● Pulseview exp: use z80 for many trace lines
example
UART Demo
● Uses a software serial library
● We can define our own pins
● Just dumps “start soft serial. Count = xx”
● Pulseview ( 50M samples @ 6 Mhz)
● Uses first level UART decoder
SPI Demo
● SPI Demo uses NRF24L01 2.4 ghz radio
● Write to a couple of the radios registers
● Write “4C” to the radio's RF_CH register
● Set data rate to RF_SETUP
● Pulseview ( 50M samples @ 6 Mhz)
● Uses first level SPI decoder
● Second level NRF24L01 decoder
I2C Demo
● 7 bit addressing is common, preset address
range (lower 2-3 bits jumper programmable)
● DS3231 Real Time Clock
● address == 0x68
● Register oe-0f : set status and control
● Register 00-06 : set time and date
● Pulseview ( 20M samples @ 500 KhHZ)
● Uses first level I2C decoder
● Uses second level DS1307 decoder
I2C Real Time Clock
● 0x0E-0x0F: control/Status
● 0x00: seconds
● 0x01: minutes
● 0x02: hours
● 0x03: day 1-7
● 0x04: date 1-31
● 0x05: Month + Century
● 0x06: year 0-99
Sigrok-cli Command Line
● Sigrok-cli -P i2c,ds1307 -S i2c,ds1307 -i
rtc_ds1307_200khz.sr
References
● I2C and SPI protocols
● http://www.byteparadigm.com/applications/intro
duction-to-i2c-and-spi-protocols/?/article/AA-
00255/22/Introduction-to-SPI-and-IC-
protocols.html
● Early analyzers
● http://hpmemoryproject.org/wb_pages/wall_b_page
Referneces
● https://sigrok.org/wiki/Getting_started_with_
a_logic_analyzer
● FX2 chip
● http://www.cypress.com/products/ez-usb-fx2lp
● The real thing
● https://www.saleae.com/
References
● build/install
● Linux
● https://sigrok.org/wiki/Linux
● Windows
● https://sigrok.org/wiki/Windows
● Mac
● https://sigrok.org/wiki/Mac_OS_X

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What Your Digital Pins Are Really Saying: A Guide to Logic Analyzers

  • 1. Do you know what your digital pins are "really" saying ● History of Logic Analyzers ● Sigrok project ● Pulseview GUI ● Decoder Protocols ● Live Demos ● There will be a test
  • 2. History of Logic Analyzers ● Wiki: en.wikipedia.org/wiki/Logic_analyzer ● 1973 HP5000A 2 channels display was 32 Leds $1900 ($10,793 today) ● 1974 HP 1601L 16 rows of 12 bit words as 1s and zeros $4000 ($20,903) ● http://hpmemoryproject.org/wb_pages/wall_b_page_12.htm ● 2017 8 Channel clone: $5 ( 2-3 months -China) – uses usb to your PC ● Many other variations at different price points ● https://sigrok.org/wiki/Supported_hardware#Logic_analyzers
  • 3. Sigrok Project ● Started 2010 - Portable, cross-platform, Open-Source signal analysis software suite ● Common framework for logic analyzers, oscilloscopes, other analog and digital devices ● Hardware support ● https://sigrok.org/wiki/Supported_hardware
  • 4. Suite of Projects ● libsigrok – the brains with device control, communications, signal tracing functionality ● libsigrokdecode – Python 3 interface library with protocol decoders ● sigrok-cli – Command line back end interface ● sigrok-util – various scripts/utilities ● sigrok-dumps – collection of execution trace dumps ● fx2lafw – OSS firmware for Cypress FX2 analyzers ● pulseview – sigrok QT GUI front end
  • 5. Sigrok Uses ● Perform time measurements on signals ● Make sense of digital signals with protocol decoders ● Write custom protocol decoders in python ● Remote-control your power supply ● Remote-control whatever lab device you'd like to support ● Write a quick-n-dirty automation tool for your particular needs
  • 6. The Analyzer Hardware ● Base on a Saleae design using FX2 chip ● Bring in the clones ● Search ebay - 24 Mhz Logic Analyzer ● 5v power from PC usb bus ● Input data pin range 0 – 5.5 V max ● High level threshold 1.5 V for our version ● No data or pin overvoltage buffering ● No external clock for sample rate input
  • 7. The clones ● Google: 24mhz logic analyzer
  • 8. Cypress’s EZ-USB® FX2xx ● Single chip General Programmable Interface (GPIF™) ● Integrated with USB 2.0 transceiver, Serial Interface Engine, enhanced 8051 microprocessor, and 16 kB on-chip code/data RAM ● Low power 3.3 V core, ultra low power 1.8 V (FX2LP18) ● Connectivity: I2C, USART ● Flexibility: Proprietary 8/16-bit data bus
  • 10. fx2lafw firmware sub project ● Open-source firmware for the Cypress FX2 chips ● Should work with any FX2-based hardware, including logic analyzers, FX2 eval boards, oscilloscopes, etc ● Firmware is downloaded each time unit is attached/powered on ● No analog pin support
  • 11. Triggers ?? ● External Triggers and patterns
  • 12. RTC Probe Data ● unzip rtc_ds1307_200khz.sr ● hexdump logic-1 0000000 0201 0203 0003 0201 0003 0001 0001 0001 0000010 0001 0201 0202 0202 0100 0100 0100 0100 0000020 0100 0100 0100 0100 0100 0100 0100 0302 0000030 0302 0100 0100 0100 0100 0100 0100 0100 0000040 0302 0302 0100 0302 0100 0302 0100 0100 0000050 0100 0302 0100 0100 0100 0302 0302 0100 0000060 0100 0100 0100 0100 0100 0100 0100 0302 0000070 0100 0100 0100 0100 0302 0100 0100 0100 0000080 0100 0100 0100 0100 0100 0100 0100 0100 ● Other formats: ● Value change dump, analog, comma separated, Gnuplot, vendor/device specific formats
  • 13. Data Viewers ● CLI ● Command line ascii display ● GUI ● Several permutations of UI ● Pulseview is the current GUI of choice ● https://sigrok.org/wiki/Getting_started_with_a_logic_
  • 14. Pulseview – the viewer ● Current UI of choice ● Triggers set per channel via left click on channel ● Pretrigger ratio, how much data prior to trigger event
  • 15. Protocol Decoders ● Protocols can be stacked, output of one, input to another ● 41 primary decoders ● 36 stacked decoders ● Not all at 100% implemented ● Decoders written in Python ● Write your own protocol provide a canned data file
  • 16. Comm Protocols in Demos ● UART - async – One device per UART connection ● SPI Bus – sync bus ● Number of devices limited by number of unique chip select lines, bus capacitance ● I2C Bus – sync bus ● Max number of devices 127, 255, or 1023 – Depends on hardware support (7,8,10 bit address) /bus capacitance
  • 17. UART ● 2 data lines Rx/Tx async ● No shared clock line, each device generates its own clock ● When Start bit is detected, periperhal restarts its internal baud rate clock in order to be in sync ● Requires precise internal clock at both sides
  • 18. SPI = Serial Peripheral Interface ● Developed by Motorola late 80's ● 6 data lines ● SCK - clock supplie by master ● CE - chip enable supplied by master ● CSN - chip select not, used by master to select slave, active low selects slave ● MISO – Master In Slave Out ● MOSI – Master Out Slave In ● IRQ – interrup request
  • 19. SPI ● SPI spec does not define clock speeds, ● over 10Mps often seen ● Full duplex in default mode ● Arbitrary choice of message size, content, and purpose ● Slaves use the master's clock ● Higher throughput than I²C – http://www.byteparadigm.com/applications/introduction-to-i2c-and-spi-proto
  • 20. I2C = Inter-Integrated Circuit ● Designed by Phillips (NXP) in the early late 70's to connect components that reside on the same circuit board ● 2 data lines (vs SPI's 6) ● Serial Data Line (SDA), Serial Clock Line (SCL) open drain ● The bus requires a pull-up resistor to VCC (typical 10 kΩ for 100 kHz, 2 kΩ for 400 kHz and 1 MHz). Value varies somewhat depending on number of devices and length of bus ● 7, 8, 10bit Address Space, 7 is the standard preset address range (lower 2-3 bits jumper programmable) ● Upper address bits assigned by spec onwer NXP ● https://www.nxp.com/docs/en/user-guide/UM10204.pdf
  • 21. I2C continued ● Spec supports set clock speeds depending on the I2C mode and hardware ● Standard mode: 100 Kbit/s/, Full speed: 400 Kbit/s , Fast Mode: 1 Mbit/s, High speed: 3.4 Mbit/s ● Not full duplex ● Master supplies the clock (SCL) ● Data line must be stable when clock bit is high – Start bit is when SDA transitions from high to low while clock bit is high – Stop bit is when data bit transitions to high while clock is high ● Successive reads/writes increment to the next register
  • 22. I2C Devices Serial Memory A/D Converter Gyroscope Temp Sensor Power Monitor Accelerometer LCD Compass Expansion Module Cap Touch Buttons
  • 23. Sigrok Canned Data ● Canned data ● If you add a protocol analyzer you must add some canned data as a demo ● Pulseview exp: use z80 for many trace lines example
  • 24. Sigrok Canned Data ● Canned data ● If you add a protocol analyzer you must add some canned data as a demo ● Pulseview exp: use z80 for many trace lines example
  • 25. UART Demo ● Uses a software serial library ● We can define our own pins ● Just dumps “start soft serial. Count = xx” ● Pulseview ( 50M samples @ 6 Mhz) ● Uses first level UART decoder
  • 26. SPI Demo ● SPI Demo uses NRF24L01 2.4 ghz radio ● Write to a couple of the radios registers ● Write “4C” to the radio's RF_CH register ● Set data rate to RF_SETUP ● Pulseview ( 50M samples @ 6 Mhz) ● Uses first level SPI decoder ● Second level NRF24L01 decoder
  • 27. I2C Demo ● 7 bit addressing is common, preset address range (lower 2-3 bits jumper programmable) ● DS3231 Real Time Clock ● address == 0x68 ● Register oe-0f : set status and control ● Register 00-06 : set time and date ● Pulseview ( 20M samples @ 500 KhHZ) ● Uses first level I2C decoder ● Uses second level DS1307 decoder
  • 28. I2C Real Time Clock ● 0x0E-0x0F: control/Status ● 0x00: seconds ● 0x01: minutes ● 0x02: hours ● 0x03: day 1-7 ● 0x04: date 1-31 ● 0x05: Month + Century ● 0x06: year 0-99
  • 29. Sigrok-cli Command Line ● Sigrok-cli -P i2c,ds1307 -S i2c,ds1307 -i rtc_ds1307_200khz.sr
  • 30. References ● I2C and SPI protocols ● http://www.byteparadigm.com/applications/intro duction-to-i2c-and-spi-protocols/?/article/AA- 00255/22/Introduction-to-SPI-and-IC- protocols.html ● Early analyzers ● http://hpmemoryproject.org/wb_pages/wall_b_page
  • 31. Referneces ● https://sigrok.org/wiki/Getting_started_with_ a_logic_analyzer ● FX2 chip ● http://www.cypress.com/products/ez-usb-fx2lp ● The real thing ● https://www.saleae.com/
  • 32. References ● build/install ● Linux ● https://sigrok.org/wiki/Linux ● Windows ● https://sigrok.org/wiki/Windows ● Mac ● https://sigrok.org/wiki/Mac_OS_X