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®
AI-INSPIRED IOT CHIPLETS AND 3D HETEROGENEOUS INTEGRATION
BroadPak Corporation
1735 N 1ST ST STE 301A
San Jose, California 95112
www.broadpak.com
Copyright © 2024 BroadPak Corp. All Rights Reserved.
1
BroadPak
2.5D/3D Technologies
Copyright © 2024 BroadPak Corporation | All Rights Reserved.
®
OUTLINE
01 • Rapid change in market dynamic
• Change in megatrend priorities
02 • Packaging transformation and the driver
• 3DHI requirement and enablement
03 • Emerging wafer-Level-substrate
• Performance, manufacturing, assembly
04 • Enabling Effective 3DHI integration
• Summary
2
1
FOG COMPUTING
5
ADVANCED EDGE COMPUTING, CLOUD
MULTI-DIE, MEMORY-LOGIC
3
AUTOMOTIVE POWER DEVICES
SILICON CARBIDE
2
5G/6G
4
SILICON PHOTONICS
PHOTONIC CHIPLETS, UCIE-OPTICAL I/O
CHANGE IN MEGATREND PATTERN
BASED ON A CORPORATE DESIGN LOAD PERSPECTIVE
Intel
IBM
ee News
Google
Embedded Computing 3
Proprietary & Confidential
BroadPak
2.5D/3D Technologies
Copyright © 2024 BroadPak Corporation | All Rights Reserved.
®
THE MARKET HAS RAPIDLY CHANGED: ADVANCED EDGE COMPUTING, OPTICS, …)
The modern package demands:
• 3D stacking (multi-material, multi-node, …)
• Higher performance (Electrical, thermal), reliability
• Scalability
• High Density Substrate
• Multi-die, fine bump pitch support
• Test/repair strategy, modular testing
1
2
3
4
5
6
4
BroadPak
2.5D/3D Technologies
Copyright © 2024 BroadPak Corporation | All Rights Reserved.
®
PACKAGING TRANSFORMATION: SIDE-BY-SIDE → 3DHI
3DHI
2.1D, 2.3D, 2.5D,
silicon Bridge, etc.
Wafer Level Fan-out, PLP
2.5D/3D Silicon interposer
FCBGA
IC
Analog
Controller
MEMS
5
BroadPak
2.5D/3D Technologies
Copyright © 2024 BroadPak Corporation | All Rights Reserved.
®
The need for near-monolithic integration fueled by rapid change in megatrends
• Memory-logic bandwidth, photonic-CMOS integration, …
3DHI is on the horizon
Emerging substrate technology is enabling near-monolithic integration, both 2D and 3DHI
• Cost competitive
• Sub 1/1um L/S
• Pad less vias, via size the same as line width
• Fine bump pitch support
• Same CTE as the device
• Large body size support with a rigid core
• Thermally conductive
• Superior electrical (RF) performance
• Facilitate modular testing
WHAT'S DRIVING THE PACKAGE TRANSFORMATION?
6
BroadPak
2.5D/3D Technologies
Copyright © 2024 BroadPak Corporation | All Rights Reserved.
®
 Multi-Everything
 Multi-discipline
 Multi-fab
 Multi-requirement
 Multi-functionality
 Multi-material
 Multi-interface
 Multi-scale
 Multi-…
3DHI IS A DIFFERENT BEAST (MULTI-EVERYTHING IN 3D)
Processor
Memory
Stack
MEMS,
Imager
Chemical
&
Bio
Sensor
Complex Failure Mode, Domino Effect
7
BroadPak
2.5D/3D Technologies
Copyright © 2024 BroadPak Corporation | All Rights Reserved.
®
3DHI REQUIREMENTS, MULTI-SIDED SWORD, NO REMORSE!!
Performance,
Bandwidth,
Density
Thermal
CTE, reliability
Co-existence of multiple technologies
Test
8
BroadPak
2.5D/3D Technologies
Copyright © 2024 BroadPak Corporation | All Rights Reserved.
®
3D MULTICORE PROCESSOR EXAMPLE
Memory layer
Memory layer
Memory layer
Processor layer
Processor layer
Processor layer
Test & Repair layer
Substrate
16 nm node
5 nm node
• Optimization within Strata
• Optimization within stacks
3D requires two
level optimizations
BroadPak
2.5D/3D Technologies
Copyright © 2024 BroadPak Corporation | All Rights Reserved.
®
OPTIMIZE CONNECTIVITY WITHIN STRATA
System Bus
IP IP IP
System Bus
IP IP IP
System Bus
IP IP IP
System Bus
IP IP IP
System TSV Bus
Memory TSV Bus Test TSV Bus
Strata 0
Strata 1
Strata 2
Strata 3
BroadPak
2.5D/3D Technologies
Copyright © 2024 BroadPak Corporation | All Rights Reserved.
®
OPTIMIZE CONNECTIVITY WITHIN STACKS
TSV for I/O Buffer
Power and Ground
CORE
PLL
Shared Memory TSV
Bus
Peripherals
System TSV
Bus
Two Stage Optimization
• Horizontal
• Vertical
BroadPak
2.5D/3D Technologies
Copyright © 2024 BroadPak Corporation | All Rights Reserved.
®
DARPA 3DHI ROADMAP
12
BroadPak
2.5D/3D Technologies
Copyright © 2024 BroadPak Corporation | All Rights Reserved.
®
PACKAGE CONVERSION: LAYER REDUCTION
M1
M2
M3
M4
M5
M6
M7
M8
M9
M10
PANEL LEVEL:
4-2-4 (10 layers) construction
Through-core vias
M1
M2
M3
M4
Through-core vias
WAFER LEVEL:
Converted to 4-layers
13
BroadPak
2.5D/3D Technologies
Copyright © 2024 BroadPak Corporation | All Rights Reserved.
®
CONVERGING TO A COMMON PLATFORM FOR 3DHI
14
SOC
Organic Substrate, RDL
SOC
FCBGA 2.1D, 2.3D, 2.5D, silicon Bridge, etc.
IC
Fan-out
3DHI
Wafer Level substrate
BroadPak
2.5D/3D Technologies
Copyright © 2024 BroadPak Corporation | All Rights Reserved.
®
Summary
15
BroadPak
2.5D/3D Technologies
Copyright © 2024 BroadPak Corporation | All Rights Reserved.
®
16
Ultra low power processor cores are required for emerging IOT applications
2.5D/3D heterogeneous chiplet integration are required for emerging IOT
applications
Wafer-Level-Substrate demonstrate solid RF performance
Wafer-Level-Substrate demonstrates sub 1um L/S capability, pad less vias and
active/passive embedding capabilities
Wafer-Level-Substrate enables multi-die/chiplet, silicon photonic packaging
3DHI stacking using high bandwidth substrate enables modular testing and
provides effective thermal management
SUMMARY
BroadPak
2.5D/3D Technologies
Copyright © 2024 BroadPak Corporation | All Rights Reserved.
®
Thank You
17

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AI-Inspired IOT Chiplets and 3D Heterogeneous Integration

  • 1. ® AI-INSPIRED IOT CHIPLETS AND 3D HETEROGENEOUS INTEGRATION BroadPak Corporation 1735 N 1ST ST STE 301A San Jose, California 95112 www.broadpak.com Copyright © 2024 BroadPak Corp. All Rights Reserved. 1
  • 2. BroadPak 2.5D/3D Technologies Copyright © 2024 BroadPak Corporation | All Rights Reserved. ® OUTLINE 01 • Rapid change in market dynamic • Change in megatrend priorities 02 • Packaging transformation and the driver • 3DHI requirement and enablement 03 • Emerging wafer-Level-substrate • Performance, manufacturing, assembly 04 • Enabling Effective 3DHI integration • Summary 2
  • 3. 1 FOG COMPUTING 5 ADVANCED EDGE COMPUTING, CLOUD MULTI-DIE, MEMORY-LOGIC 3 AUTOMOTIVE POWER DEVICES SILICON CARBIDE 2 5G/6G 4 SILICON PHOTONICS PHOTONIC CHIPLETS, UCIE-OPTICAL I/O CHANGE IN MEGATREND PATTERN BASED ON A CORPORATE DESIGN LOAD PERSPECTIVE Intel IBM ee News Google Embedded Computing 3 Proprietary & Confidential
  • 4. BroadPak 2.5D/3D Technologies Copyright © 2024 BroadPak Corporation | All Rights Reserved. ® THE MARKET HAS RAPIDLY CHANGED: ADVANCED EDGE COMPUTING, OPTICS, …) The modern package demands: • 3D stacking (multi-material, multi-node, …) • Higher performance (Electrical, thermal), reliability • Scalability • High Density Substrate • Multi-die, fine bump pitch support • Test/repair strategy, modular testing 1 2 3 4 5 6 4
  • 5. BroadPak 2.5D/3D Technologies Copyright © 2024 BroadPak Corporation | All Rights Reserved. ® PACKAGING TRANSFORMATION: SIDE-BY-SIDE → 3DHI 3DHI 2.1D, 2.3D, 2.5D, silicon Bridge, etc. Wafer Level Fan-out, PLP 2.5D/3D Silicon interposer FCBGA IC Analog Controller MEMS 5
  • 6. BroadPak 2.5D/3D Technologies Copyright © 2024 BroadPak Corporation | All Rights Reserved. ® The need for near-monolithic integration fueled by rapid change in megatrends • Memory-logic bandwidth, photonic-CMOS integration, … 3DHI is on the horizon Emerging substrate technology is enabling near-monolithic integration, both 2D and 3DHI • Cost competitive • Sub 1/1um L/S • Pad less vias, via size the same as line width • Fine bump pitch support • Same CTE as the device • Large body size support with a rigid core • Thermally conductive • Superior electrical (RF) performance • Facilitate modular testing WHAT'S DRIVING THE PACKAGE TRANSFORMATION? 6
  • 7. BroadPak 2.5D/3D Technologies Copyright © 2024 BroadPak Corporation | All Rights Reserved. ®  Multi-Everything  Multi-discipline  Multi-fab  Multi-requirement  Multi-functionality  Multi-material  Multi-interface  Multi-scale  Multi-… 3DHI IS A DIFFERENT BEAST (MULTI-EVERYTHING IN 3D) Processor Memory Stack MEMS, Imager Chemical & Bio Sensor Complex Failure Mode, Domino Effect 7
  • 8. BroadPak 2.5D/3D Technologies Copyright © 2024 BroadPak Corporation | All Rights Reserved. ® 3DHI REQUIREMENTS, MULTI-SIDED SWORD, NO REMORSE!! Performance, Bandwidth, Density Thermal CTE, reliability Co-existence of multiple technologies Test 8
  • 9. BroadPak 2.5D/3D Technologies Copyright © 2024 BroadPak Corporation | All Rights Reserved. ® 3D MULTICORE PROCESSOR EXAMPLE Memory layer Memory layer Memory layer Processor layer Processor layer Processor layer Test & Repair layer Substrate 16 nm node 5 nm node • Optimization within Strata • Optimization within stacks 3D requires two level optimizations
  • 10. BroadPak 2.5D/3D Technologies Copyright © 2024 BroadPak Corporation | All Rights Reserved. ® OPTIMIZE CONNECTIVITY WITHIN STRATA System Bus IP IP IP System Bus IP IP IP System Bus IP IP IP System Bus IP IP IP System TSV Bus Memory TSV Bus Test TSV Bus Strata 0 Strata 1 Strata 2 Strata 3
  • 11. BroadPak 2.5D/3D Technologies Copyright © 2024 BroadPak Corporation | All Rights Reserved. ® OPTIMIZE CONNECTIVITY WITHIN STACKS TSV for I/O Buffer Power and Ground CORE PLL Shared Memory TSV Bus Peripherals System TSV Bus Two Stage Optimization • Horizontal • Vertical
  • 12. BroadPak 2.5D/3D Technologies Copyright © 2024 BroadPak Corporation | All Rights Reserved. ® DARPA 3DHI ROADMAP 12
  • 13. BroadPak 2.5D/3D Technologies Copyright © 2024 BroadPak Corporation | All Rights Reserved. ® PACKAGE CONVERSION: LAYER REDUCTION M1 M2 M3 M4 M5 M6 M7 M8 M9 M10 PANEL LEVEL: 4-2-4 (10 layers) construction Through-core vias M1 M2 M3 M4 Through-core vias WAFER LEVEL: Converted to 4-layers 13
  • 14. BroadPak 2.5D/3D Technologies Copyright © 2024 BroadPak Corporation | All Rights Reserved. ® CONVERGING TO A COMMON PLATFORM FOR 3DHI 14 SOC Organic Substrate, RDL SOC FCBGA 2.1D, 2.3D, 2.5D, silicon Bridge, etc. IC Fan-out 3DHI Wafer Level substrate
  • 15. BroadPak 2.5D/3D Technologies Copyright © 2024 BroadPak Corporation | All Rights Reserved. ® Summary 15
  • 16. BroadPak 2.5D/3D Technologies Copyright © 2024 BroadPak Corporation | All Rights Reserved. ® 16 Ultra low power processor cores are required for emerging IOT applications 2.5D/3D heterogeneous chiplet integration are required for emerging IOT applications Wafer-Level-Substrate demonstrate solid RF performance Wafer-Level-Substrate demonstrates sub 1um L/S capability, pad less vias and active/passive embedding capabilities Wafer-Level-Substrate enables multi-die/chiplet, silicon photonic packaging 3DHI stacking using high bandwidth substrate enables modular testing and provides effective thermal management SUMMARY
  • 17. BroadPak 2.5D/3D Technologies Copyright © 2024 BroadPak Corporation | All Rights Reserved. ® Thank You 17