Mini2440原理图

1 2 3 4 5 6

D D
CPU1
01-CPU1.Sch

CPU2
02-CPU2.Sch

CPU3
03-CPU3.Sch

SDRAM
04-MEM.sch

C C
UART_USB_ETC
05-UART_USB_POWER.sch

Audio
mini2440原理图
06-Audio.sch

DM9000
07-DM9000.sch

Interface
08-INTERFACE.sch

B B

A A

Title

友善之臂计算机科技有限公司
Size Number Revision
B
Date: 11-Oct-2008 Sheet of
File: C:mini2440mini2440 原理图.ddb Drawn By:
1 2 3 4 5 6

1 2 3 4 5 6

D D
VDD33V
R64
4.7K S2
NORBOOT
1

BUS

BUS
J1
OM0
1
OM0
2 从NOR FLASH启动系统, 一般为BIOS模式
2 CON3 3
3 4 从NAND FLASH启动系统,一般为正常运行模式

nXDACK0

nXDREQ0

D3 nLAN_CS
NANDBOOT 5

nLED_3

nLED_4

K2 nLED_1
L5 nLED_2
F6 nGCS0
B2 nGCS1
C3 nGCS2
C4 nGCS3

C2 nGCS5

E4 nWAIT
E6 LnWE
C5 LnOE
CON5
R35 4.7K C5 XTIpll

R13
T15
K7
K6
K5
15p

L3
X2
U1A 12M
C6

nXDREQ0/GPB10

nGCS1/GPA12
nGCS2/GPA13
nGCS3/GPA14
nGCS4/GPA15
nGCS5/GPA16

nWAIT

OM0
OM1
nXDACK0/GPB9
nXDACK1/GPB7

nXDREQ1/GPB8

nXBACK/GPB5
nXBREQ/GPB6
nGCS0

nOE

nWE
XTOpll
15p
D12 LDATA0
DATA0
C12 LDATA1
DATA1
E11 LDATA2
DATA2
A13 LDATA3
DATA3
LADDR0 F7 F10 LDATA4
ADDR/GPA0 DATA4
LADDR1 E7 F11 LDATA5
C ADDR1 DATA5 C
LADDR2 B7 DMA Chip Select C13 LDATA6
ADDR2 DATA6
LADDR3 F8 A14 LDATA7
ADDR3 DATA7
LADDR4 C7 D13 LDATA8
ADDR4 DATA8
LADDR5 D8 B15 LDATA9
ADDR5 DATA9
LADDR6 E8 A17 LDATA10
ADDR6 DATA10
LADDR7 D7 C14 LDATA11
ADDR7 DATA11
LADDR8 G8 D15 LDATA12
ADDR8 DATA12
LADDR9 B8 C15 LDATA13
ADDR9 DATA13
LADDR10 A8 D14 LDATA14
ADDR10 DATA14
LADDR11 C8 B17 LDATA15
ADDR11 DATA15
LADDR12 B9 S3C2440 C16 LDATA16
ADDR12 DATA16
LADDR13 H8 Address E15 LDATA17
ADDR13 DATA17
LADDR14 E9 Data E14 LDATA18
ADDR14 DATA18
LADDR15 C9 E13 LDATA19 22p
ADDR15 DATA19
LADDR16 D9 E12 LDATA20 XTIrtc
ADDR16 DATA20
LADDR17 G9 E16 LDATA21
ADDR17 DATA21
LADDR18 F9 F15 LDATA22 C1
ADDR18 DATA22 X1
LADDR19 H9 G13 LDATA23
ADDR19 DATA23 32.768kHz
LADDR20 D10 E17 LDATA24
ADDR20 DATA24
LADDR21 C10 G12 LDATA25
ADDR21 DATA25
LADDR22 H10 F14 LDATA26 XTOrtc
TCLK1/EINT19/GPG11

ADDR22 DATA26
LADDR23 E10 ADC Clock Timer F12 LDATA27
ADDR23 DATA27
LADDR24 C11 G11 LDATA28 C2
CLKOUT1/GPH10

ADDR24 DATA28
CLKOUT0/GPH9

B LADDR25 G10 G16 LDATA29 22p B
ADDR25 DATA29
LDATA30
TOUT0/GPB0
TOUT1/GPB1
TOUT2/GPB2
TOUT3/GPB3
TCLK0/GPB4

D11 H13
AIN4/TSYM

AIN6/TSXM

ADDR26 DATA30
AIN5/TSYP

AIN7/TSXP

F13 LDATA31
MPLLCAP
UPLLCAP

DATA31
EXYCLK

XTOrtc
XTOpll
XTIrtc
XTIpll
AIN0
AIN1
AIN2
AIN3

OM2
OM3
Aref

S3C2440X
R9
T16
T17

T13

L12

J6
J5
J7
K3
K4
R14

R15
P15

R16
P16

P10

P17
P13

M14
U17

U16

H12

N14

G14
G15

U12
CLKOUT0
CLKOUT1
MPLLCAP

L3CLOCK
UPLLCAP

L3MODE
TSYM

TSXM

L3DATA
TSYP

TSXP
AIN0
AIN1
AIN2
AIN3

EINT19
XTOrtc
XTOpll
XTIrtc
XTIpll

GPB0
GPB1

VDD33V

VDD33V
R68
4.7K MPLLCAP UPLLCAP
C40 C41
2n7 680p

A A

Title

B
1 2 3 4 5 6

1 2 3 4 5 6

VDD33V

NR1

NR2

NR3

NR4
10K

10K

10K

10K
NCON
GPG13
D GPG14 D
GPG15

GPIO_IO
GPIO_IO

GPIO_IO
GPIO_IO
GPIO_IO
GPIO_IO
GPIO_IO
GPIO_IO
GPIO_IO
GPIO_IO

1K

1K
NR5

NR8
I2SLRCK
I2SSCLK

SPIMISO

SPIMOSI

nSS_SPI
I2SSDO

SPICLK
I2CSDA
I2CSCL

EINT13

EINT14

EINT15

EINT11

EINT20
RA7

CDCLK

GPG13
GPG14
GPG15
I2SSDI

PDN0
PDP0
LSCLK1 1 8 LLSCLK1

DN0
DP0
LnSRAS 2 7 LLnSRAS
LnSCAS 3 6 LLnSCAS

M10
K10

N11
N12
U14

U13
LSCKE LLSCKE

R11

R10
L10

T11
L11
P12
4 5

M9

J10
U8

U6

K9
R7
T7
L8

L9
P7

P9
VDD33V
U1B
22
R17 R22

SPIMISO1/EINT13/GPG5

SPIMOSI1/EINT14/GPG6
SPICLK0/GPE13

nSS0/EINT10/GPG2
nSS1/EINT11/GPG3
IICSCL/GPE14

EINT20/GPG12
EINT21/GPG13
EINT22/GPG14
EINT23/GPG15
DP0
SPICLK1/EINT15/GPG7
IICSDA/GPE15

I2SSCLK/GPE1

I2SSDI/nSS0/GPE3

DN1/PDN0
SPIMISO0/GPE11

SPIMOSI0/GPE12
I2SLRCK/GPE0

CDCLK/GPE2

DP1/PDP0
I2SSDO/I2SSDI/GPE4

DN0
R55 22 10K 10K
LLSCLK0 LSCLK0

LLnSCS0
R63 22 LnSCS0 LnWBE0 D4
nBE0:nWBE0:DQM0
LnWBE1 B5 N2 VD0
nBE1:nWBE1:DQM1 VD0/GPC8
LnWBE2 D5 L6 VD1 EINT19
nBE2:nWBE2:DQM2 VD1/GPC9
LnWBE3 E5 USS N4 VD2 EINT15
C nBE3:nWBE3:DQM3 VD2/GPC10 C
LLnSCS0 D2 R1 VD3 EINT14
nGCS6:nSCS0 VD3/GPC11
E3 IIC N3 VD4 EINT13
nGCS7:nSCS1 VD4/GPC12
LLnSCAS D6 IIS P2 VD5 EINT11
nSCAS VD5/GPC13
LLnSRAS C6 M6 VD6 EINT8
nSRAS VD6/GPC14
LLSCKE VD7

2

2

2

2

2

2
A2 SDRAM SPI P3
SCKE VD7/GPC15
LLSCLK0 B4 R2 VD8 K1 K2 K3 K4 K5 K6
SCLK0 VD8/GPD0
LLSCLK1 B3 M5 VD9
SCLK1 VD9/GPD1
TSP N5 VD10
VD10/GPD2
ALE D1 R3 VD11
ALE/GPA18 VD11/GPD3
CLE F5 P4 VD12
CLE/GPA17 VD12/GPD4
RnB G6 R4 VD13

1

1

1

1

1

1
FRnB VD13/GPD5/USBTXDN1
NCON R12 NAND CTRL P5 VD14
NCON VD14/GPD6/USBTXDP1
nFCE F4 N6 VD15
nFCEGPA22 VD15/GPD7/USBOEN1 CON12
nFRE E1 M7 VD16
nFRE/GPA20 VD16/GPD8/SPIMISO1 GND
nFWE F3 LCD DATA T4 VD17 8
nFWE/GPA19 VD17/GPD9/SPIMOSI1 VDD33V
R5 VD18 7
VD18/GPD10/LPICLK1 EINT19 GPG11
SDCLK N8 T5 VD19 6
SDCLK/GPE5 VD19/GPD11/USBRXDP1 EINT15 GPG7
SDCMD K8 LCD CTRL P6 VD20 5
SDCMD/GPE6 VD20/GPD12/USBRXDN1 EINT14 GPG6
SDDATA0 R8 SDIO R6 VD21 4

LCD_PWREN/EINT12/GPG4
SDDATA0/GPE7 VD21/GPD13/USBRXD1 EINT13 GPG5
SDDATA1 M8 N7 VD22 3
SDDATA1/GPE8 VD22/nSS1/GPD14 EINT11 GPG3
VFRAME:VSYNC/GPC3

SDDATA2 P8 UART U5 VD23 2
EINT8 GPG0
LCD_LPCREVB/GPC7
SDDATA2/GPE9 VD23/nSS0/GPD15
VLINE:HSYNC/GPC2

SDDATA3 J9 LCD_LPCREV/GPC6 1
SDDATA3/GPE10
nCTS1/RXD2/GPH7
nRTS1/TXD2/GPH6

LCD_LPCOE/GPC5

CON8
VM:VDEN/GPC4

B B
JTAG
nCTS0/GPH0
nRTS0/GPH1

UCLK/GPH8

VCLK/GPC1
RXD0/GPH3

RXD1/GPH5

LEND/GPC0
TXD0/GPH2

TXD1/GPH4

nTRST

TDO
TMS
TCK
TDI

S3C2440X
J11
J15

J13

J16
J14

M1

M4
M3
M2
L17

L1
L4

L7

P11
P1
K11

K13
K14
K16
K17

K15

H15

H17

VDD33V

nLED_1 LED1 R40
1K
LCD_PWR
VFRAME

USB_EN
LCDVF1
LCDVF2

GREEN
WP_SD

nTRST
nCTS0
nRTS0

VLINE
VCLK
RXD0

RXD1

RXD2

LEND
TXD0

TXD1

TXD2

R41
TMS
TCK

TDO

nLED_2 LED2 1K
TDI

VM

GREEN
nLED_3 LED3 R42
1K
GREEN
nLED_4 LED4 R43
1K

GREEN

A A

Title

B
1 2 3 4 5 6

1 2 3 4 5 6

VDD33V

D7
1N4148 TP1
D D8 CON1 D
R12 VDDRTC

1
10K
BAT1 1N4148
BATTERY
VDD33V
VDD33V VDDRTC
PWREN

R10
15K VDD1.25V VDD1.25V

M13
H14

N15

A16

A10

N16

U11
B11
P14

F16
J12

J17
G4

A6
A1

U2
U1
T8
T6

L2
F1

J2
U1C
VDD_adc(3.3V)

VDDA_UPLL(1.2V)

VDDiarm(1.2V)
VDDiarm(1.2V)
VDDiarm(1.2V)
VDDiarm(1.2V)
VDDiarm(1.2V)
VDDiarm(1.2V)
VDDiarm(1.2V)
VDDalive(1.2V)
VDDalive(1.2V)

VDDi(1.2V)
VDDi(1.2V)
VDDi(1.2V)
VDDi(1.2V)
VDDi(1.2V)
VDDi(1.2V)
VDDi(1.2V)
PWREN
nBATT_FLT

VDDA_MPLL(1.2V)
VDD_RTC(3.3V)

nRESET H16
nRESET
N13
nRSTOUT/GPA21
C EINT0 N17 VDD33V C
EINT0/GPF0
EINT1 M16 B6
EINT1/GPF1 VDDMOP(SCLK,100MHz:3.3V)
EINT2 L13 A9
EINT3 M15 B12
EINT4 M17 B14
EINT5 L14 B16
EINT6 L15 EXT INT F17
IRQ_LAN L16 C1
EINT8 N9
EINT8/GPG0
EINT9 T9
EINT9/GPG1
nCD_SD T10 K12
EINT16/GPG8 VDDOP()3.3V)
EINT17 M11 T12
EINT17/GPG9/nRST1 VDDOP()3.3V)
EINT18 N10 T3
EINT18/GPG10/nCTS1 VDDOP()3.3V)
J1
VDDOP()3.3V)
CAM_PCLK G5
CAMPCLK/GPJ8
CAM_VSYNC G7
CAMVSYNC/GPJ9
CAM_HREF G2 T14
CAMHREF/GPJ10 VSSA_ADC
CAMCLK J3 F2
CAMCLKOUT/GPJ11 VSSi
CAMRST J4 A3
CAMRESET/GPJ12 VSSi
CAMDATA0 H6 CAMERA IF A4
CAMDATA0/GPJ0 VSSi
CAMDATA1 G3 B10
CAMDATA1/GPJ1 VSSi
CAMDATA2 H5 A12
CAMDATA2/GPJ2 VSSi
CAMDATA3 H4 C17
CAMDATA3/GPJ3 VSSi
CAMDATA4 H3 G17
CAMDATA4/GPJ4 VSSi
B CAMDATA5 H7 B
CAMDATA5/GPJ5
CAMDATA6 J8 R17
CAMDATA6/GPJ6 VSSA_mPLL
CAMDATA7 H2 M12
CAMDATA7/GPJ7 VSSA_UPLL
VSSMOP
VSSMOP
VSSMOP
VSSMOP
VSSMOP
VSSMOP
VSSMOP
VSSMOP
VSSMOP
VSSMOP
VSSMOP
VSSMOP
VSSMOP
VSSMOP
VSSMOP
VSSiarm

VSSiarm
VSSiarm
VSSiarm
VSSiarm
VSSiarm
vssiarm

S3C2440X
B1
H1
K1
T1
T2
U4
U7

E2

A7
A5
N1
U3
U9

G1
B13
U10

D17
D16
A15

A11

U15

H11

VDD33V

C14 C15 C16 C17 C18 C19 CA1 CA2 CA3 CA4 CA5 CA6 CA7 CA8 CA9 CA10 CA11 CA12 CA13
100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF

A A
VDD1.25V
Title

C20 C21 C22 C23 C24 C25 CA14 CA15 CA16 CA17 CA18 CA20 CA21 CA22 CA23
100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF Size Number Revision
B
1 2 3 4 5 6

Mini2440原理图

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Mini2440原理图