In this slide deck we cover: - Understanding the relationship between OFDM theory and practice - Starting from a Matlab script through to automatic HDL code/bitstream generation - Introduction to Nutaq’s PicoSDR hardware and software - Creating host applications to exchange data with the PicoSDR in real-time

1. DIY Session: OFDM waveform on Nutaq PicoSDR
Jean-Benoit Larouche Field Application Engineer jb.larouche@nutaq.com September 2014

2. Objectives
• Understand the relationship between OFDM theory and practice
• Start from Matlab script to automatic HDL code/bitstream generation
• Handle Nutaq’s PicoSDR hardware and software
• Create Host applications to exchange data with the PicoSDR in real-time

3. Course Content
• Introducing Nutaq’s PicoSDR hardware and software tools
• OFDM basics and its practical implications
• Lab 1: The Matlab script
• Lab 2: Moving to System Generator
• Lab 3: Hardware Interfacing
• Lab 4: Bitstream generation and Host application
• Lab 5: Adding Nutaq’s PicoSDR record feature
• Lab 6: Adding the RF card
• Lab 7: Introducing additional debugging tools

4. Course Content
• Lab 8: Adding the equalizer and conclusions
• Questions and discussions

5. Course Content
• Introducing Nutaq’s PicoSDR hardware and software tools
• OFDM basics and its practical implications
• Lab 1: The Matlab script
• Lab 2: Moving to System Generator
• Lab 3: Hardware Interfacing
• Lab 4: Bitstream generation and Host application
• Lab 5: Adding Nutaq’s PicoSDR record feature
• Lab 6: Adding the RF card
• Lab 7: Introducing additional debugging tools

6. PicoSDR Family
http://blog.nutaq.com/blog/teardown-nutaqs-picosdr

7. PicoSDR 2x2

8. PicoSDR 4x4

9. PicoSDR 2x2-E

10. Perseus 601x
QDR2 SRAM banks (×2)
DDR3 SDRAM SODIMM
FMC HPC (VITA 57.1)
MicroBlaze’s DDR3
NOR flash
Mestor interface

11. FPGA Architecture
• Hardware description languages (HDL) like VHDL allow designers to specify the interconnections between resources
• We will use an even higher tool called System Generator

12. Radio420x FMC
Main Features:
• Multimode SDR (0.3 GHz – 3.8 GHz)
• MIMO-enabled
• SW selectable BW (1.5 – 28 MHz)
• SW selectable RF Filter banks
• Auto-Calibration
• LMS6002D

13. Radio420x FMC
•Avoid interference: 14 selectable RF bandpass filters.
• Isolate the band of interest: Selectable baseband bandwidth from 1.5 to 28 MHz.
• Achieve high quality SNR: Shielded, auto-calibrated radio.

14. Radio420x FMC

15. Signal Flow

16. Lyrtech RD Market Segments
SDR Model based design tools

17. MBDK / BSDK Tools

18. Course Content
• Introducing Nutaq’s PicoSDR hardware and software tools
• OFDM basics and its practical implications
• Lab 1: The Matlab script
• Lab 2: Moving to System Generator
• Lab 3: Hardware Interfacing
• Lab 4: Bitstream generation and Host application
• Lab 5: Adding Nutaq’s PicoSDR record feature
• Lab 6: Adding the RF card
• Lab 7: Introducing additional debugging tools

19. OFDM basics
• First OFDM scheme goes back to 1966 (Robert W. Chang) using Fourier transforms
• However, maintaining orthogonality was hard with an analog system (Saltzberg, 1967)

20. OFDM basics
• First milestone: Discrete Fourier transform for modulation and demodulation (Weinstein and Ebert, 1971)
• Low-cost but orthogonality problems still there
• Second milestone: Cyclic extensions (Peled and Ruiz, 1980)
• Converts linear convolutive channel to simulate a channel performing cyclic convolution (solving ISI and orthogonality problems)

21. OFDM basics
• OFDM modulator: Sum of modulated exponential functions

22. OFDM basics
• Orthogonality: Inner product = 0
• Orthogonality maintained only in a specific interval
• Orthogonality maintained only if subcarriers frequencies are integer multiples of a fundamental frequency of period Tsym

23. OFDM basics
• OFDM modulator: Sum of windowed-modulated exponential functions

24. OFDM basics
• OFDM subcarrier power spectrum
• Note: FBMC goal is to find a way of maintaining orthogonality and reduce the sidelobes !

25. OFDM basics
• Advantages
• Efficient spectrum
• Resistant to frequency selective fading (Multipath)
• No ISI through cyclic prefix
• Simple channel equalization
• Computationally efficient
• However …
• Orthogonality maintained only in a specific interval
• Timing synchronization (Symbol Timing Offset or STO)
• Orthogonality maintained only if subcarriers frequencies are integer multiples of a fundamental frequency of period Tsym
• Frequency synchronization (Carrier Frequency Offset or CFO)
• Sampling clock Offset (SCO)

26. Course Content
• Introducing Nutaq’s PicoSDR hardware and software tools
• OFDM basics and its practical implications
• Lab 1: The Matlab script
• Lab 2: Moving to System Generator
• Lab 3: Hardware Interfacing
• Lab 4: Bitstream generation and Host application
• Lab 5: Adding Nutaq’s PicoSDR record feature
• Lab 6: Adding the RF card
• Lab 7: Introducing additional debugging tools

27. The Matlab script
• Basic waveform specifications based on 802.11a
• Without loss of generality, QPSK modulation is used
• 64 subcarriers are used, but only 52 of them will transport data, the others are virtual subcarriers
• Cyclic prefix of ¼ of a symbol is used

28. Course Content
• Introducing Nutaq’s PicoSDR hardware and software tools
• OFDM basics and its practical implications
• Lab 1: The Matlab script
• Lab 2: Moving to System Generator
• Lab 3: Hardware Interfacing
• Lab 4: Bitstream generation and Host application
• Lab 5: Adding Nutaq’s PicoSDR record feature
• Lab 6: Adding the RF card
• Lab 7: Introducing additional debugging tools

29. Moving to System Generator
• Use the coexistence of Matlab/Simulink and System Generator to safely transition processing blocks

30. Moving to System Generator

31. Moving to System Generator
• System Generator and Simulink coexistence
• System Generator provides two key tools
• Graphical programming environment within Matlab’s Simulink
• High level HDL code generation tool through the use of blocksets
• Provides “bit true” and “cycle true” simulations
• Simulink provides a test environment for your design
• Generate test vectors with Matlab or Simulink blocks
• Visualize and analyze output of design

32. Moving to System Generator
• System Generator Example
Source
Double to fixed- point conversion
Actual logic to be realized in hardware
Sink
Configure simulation and hardware parameters
Fixed-point to double conversion

33. Moving to System Generator
• Block per block, we move the complete waveform …

34. Course Content
• Introducing Nutaq’s PicoSDR hardware and software tools
• OFDM basics and its practical implications
• Lab 1: The Matlab script
• Lab 2: Moving to System Generator
• Lab 3: Hardware Interfacing
• Lab 4: Bitstream generation and Host application
• Lab 5: Adding Nutaq’s PicoSDR record feature
• Lab 6: Adding the RF card
• Lab 7: Introducing additional debugging tools

35. Hardware interfacing
• Now that we have our waveform, we want to prepare our model for real hardware implementation
• Common real-time application: Digital loopback

36. Hardware interfacing
• To add the necessary logic to send/receive data from the Gigabit Ethernet interface (RTDEX), we introduce another type of blocks: Nutaq’s MBDK blocks
• They replace the Gateway In and Gateway Out blocks
Pass-through in simulation

37. Hardware interfacing
• To add the necessary logic to send/receive data from the Gigabit Ethernet interface (RTDEX), we introduce another type of blocks: Nutaq’s MBDK blocks
• They replace the Gateway In and Gateway Out blocks
Data from real Gigabit interface in real time
Doesn’t generate any HDL code, used for simulation only!

38. Hardware interfacing
• List of the different Nutaq MBDK blocks on the PicoSDR
• RTDEx (Gigabit Ethernet or PCIe)
• 32-bits data streaming interface between a Host computer and a PicoSDR
• Custom Register
• 32-bits shared address space between an Host computer and a PicoSDR
• FMC Radio420x
• 12-bits interface to exchange data between an FMC Radio420x and a Perseus601x
• Record/Playback
• Record/playback data to/from 4GB DDR3 memory

39. Course Content
• Introducing Nutaq’s PicoSDR hardware and software tools
• OFDM basics and its practical implications
• Lab 1: The Matlab script
• Lab 2: Moving to System Generator
• Lab 3: Hardware Interfacing
• Lab 4: Bitstream generation and Host application
• Lab 5: Adding Nutaq’s PicoSDR record feature
• Lab 6: Adding the RF card
• Lab 7: Introducing additional debugging tools

40. Bitstream generation and Host application
• Preparing the model for bitstream compilation
• Selecting the clock source in the Perseus board configuration
• Entering the FPGA clock period for System Generator compilation flow
• Selecting the Nutaq custom compilation flow (System Generator + Nutaq)

41. Bitstream generation and Host application
• After some time, the bitstream is compiled and ready to use on the PicoSDR
• Next steps:
• Programming the FPGA using a JTAG pod
• Ping test using PicoSDR IP address (default: 192.168.0.101)
• Exchanging data with the PicoSDR through one of these interfaces:
• Simulink
• C code application
• GNU Radio Companion
•ADP Command Line Interface

42. Bitstream generation and Host application
• Simulink Host model

43. Bitstream generation and Host application
• GNU Radio Companion Flowgraph

44. Course Content
• Introducing Nutaq’s PicoSDR hardware and software tools
• OFDM basics and its practical implications
• Lab 1: The Matlab script
• Lab 2: Moving to System Generator
• Lab 3: Hardware Interfacing
• Lab 4: Bitstream generation and Host application
• Lab 5: Adding Nutaq’s PicoSDR record feature
• Lab 6: Adding the RF card
• Lab 7: Introducing additional debugging tools

45. Adding the Nutaq’s PicoSDR record feature
• Record/Playback block diagram

46. Adding the Nutaq’s PicoSDR record feature
• Record feature is useful to:
• Perform simulations with test vectors coming from real hardware
• Offline data processing and analysis
• Multichannel recording
• Playback is useful to:
• RF card performance analysis
• Receiver design testing
• Quick over-the-air tests

47. Adding the Nutaq’s PicoSDR record feature
• Record example:

48. Checkpoint
• To summarize:
• Matlab script translation to HDL code
• Interfacing with external hardware
• Implementation validation through digital loopback
• Next step:
• Adding the RF card
• Upgrading the waveform

49. Course Content
• Introducing Nutaq’s PicoSDR hardware and software tools
• OFDM basics and its practical implications
• Lab 1: The Matlab script
• Lab 2: Moving to System Generator
• Lab 3: Hardware Interfacing
• Lab 4: Bitstream generation and Host application
• Lab 5: Adding Nutaq’s PicoSDR record feature
• Lab 6: Adding the RF card
• Lab 7: Introducing additional debugging tools

50. Adding the RF card
• FMC Radio420x relevant specifications
• Covers from 300 MHz to 3.8 GHz
• Over the air bandwidth between 1.5 MHz up to 28 MHz
• Zero-IF architecture
• Maximum sampling rate of the ADCs/DACs is 40 MSPS
• I&Q data interleaving/deinterleaving is required for the DACs/ADCs

51. Adding the RF card
• LMS6002D

52. Adding the RF card
• Is our design ready for an RF loopback ?
• Our current design is clocked at 100 MHz = 100 MHz of bandwidth over the air!
• Clock coming from the radio card is twice the ADCs/DACs clock sampling frequency
• No more data valid signal for the FFT
• Sampling clock offset, attenuation and noise added
TX samples
RX samples
e

53. Adding the RF card
• Design sampling rate discussion
• Following 802.11a, we want 20 MHz of bandwidth
• IFFT needs to clocked at 20 MHz
• FMC Radio420x ADCs/DACs thus need to be configured at 20 MHz minimum
• Clock coming in the FPGA is then 40 MHz (master clock)

54. Adding the RF card
• Design sampling rate discussion
Hardware provided clock
Simulink system period value in simulation
Processing block sample time value in simulation
Actual sampling rate of processing block in real-time
40 MHz
1
1
40 MHz
40 MHz
1
2
20 MHz
40 MHz
2
2
40 MHz
20 MHz
2
2
20 MHz
20 MHz
3
2
Error!

55. Adding the RF card
• Acquisition Symbol Addition
• Following 802.11a, we have 10 repeating sequences of 16 samples

56. Adding the RF card
• Acquisition Symbol Addition
• Following 802.11a, we have 10 repeating sequences of 16 samples

57. Adding the RF card
• Acquisition Symbol Addition
• Matched filter detector

58. Adding the RF card
• However, even with a good packet detector …

59. Course Content
• Lab 8: Adding the equalizer and conclusions
• Questions and discussions

60. Adding the equalizer
• Channel Estimation Symbol Addition
• Following 802.11a, we have fixed BPSK pilots on each used subcarrier

61. Adding the RF card
• Channel Estimation Symbol Addition
• Zero-forcing Equalizer: Simple and easy to implement
• If X is the received channel estimation subcarriers:
• If X is the received data subcarriers
One complex multiplier
One divider (CORDIC)

62. Course Content
• Introducing Nutaq’s PicoSDR hardware and software tools
• OFDM basics and its practical implications
• Lab 1: The Matlab script
• Lab 2: Moving to System Generator
• Lab 3: Hardware Interfacing
• Lab 4: Bitstream generation and Host application
• Lab 5: Adding Nutaq’s PicoSDR record feature
• Lab 6: Adding the RF card
• Lab 7: Introducing additional debugging tools

63. Introducing debugging tools
• When performing hardware-in-the-loop tests, more debugging tools, the better:
• Adding RTDEx channels
• Adding Custom registers
• Adding Chipscope

64. Introducing debugging tools
• We have completed our first RF loopback, what’s next?
• Example: Moving toward 64-QAM 2x2 MIMO Alamouti

65. Introducing debugging tools
• We have completed our first RF loopback, what’s next?
• Example: Moving toward 64-QAM 2x2 MIMO Alamouti

66. Introducing debugging tools
• We have completed our first RF loopback, what’s next?
• Example: Moving toward 64-QAM 2x2 MIMO Alamouti

67. Introducing debugging tools
• We have completed our first RF loopback, what’s next?
• Example: Moving toward 64-QAM 2x2 MIMO Alamouti

68. Introducing debugging tools
• We have completed our first RF loopback, what’s next?
• Other useful processing blocks:
• Automatic Gain Control (AGC)
• Carrier Frequency Offset (CFO) Correction
• Forward Error Correction (FEC) Coding
• Interleaver
• Data Scrambler
• Pulse Shaping

69. Course Content
• Lab 8: Adding the equalizer and conclusions
• Questions and discussions

70. THANK YOU!