Software_Requirement_Doc_ATPL430_v9.pdf

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ADE/ ABHYAS/ DLS/UHF
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Software requirement Document for
UHF Data Transceiver
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AIDIN TECHNOLOGIES PRIVATE LIMITED
#42/3,Balaji Complex Muneshwara Layout
Kudlu, Hosur Road Bengalore 560068
TEL: 080‐42005274
Report Title
Software Requirement Document for
ATPL 430-2G-1020 UHF Data Transceiver
Classification Restricted
Date 27-07-2021
Document No. ADE/ ABHYAS/ DLS/UHF TRX/SRD
Issue No. 01 Revision No. 06

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Revision Record Sheet
Document Title
(P / No.: ATPL 430 2G 1020)
Issue No.: 01
Revision: 06
Document No.
ADE/ ABHYAS/ DLS/UHF TRX/SRD
Sl. No.
Section/
Format/
Register
Revised
Brief Details Of
Revision
From To Reference No.
of Revision
Approval
01
02
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Certification
It is to certify that this document, No. ADE/ ABHYAS/ DLS/UHF TRX/SRD ,
Issue No. 01, Rev 04, accurately and adequately describes the Software
Requirement Document for UHF Data Transceiver to be used in ABHYAS.
This document is property of Aidin Technologies Private Limited and shall
not be disclosed to external agencies, in whole, or in part, without the prior written
consent of the Director, ADE.
(B.ANIL KUMAR)Sc F
HEAD, DLS
Date : 20-04-2021

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SIGNATORIES
Prepared By Checked By
R Nagasundaram
AIDIN ENGINEER
HR Balakrishna
AIDIN MANAGER
R BIJU TO ‘A’
DLS DIVISION, ADE
ANIL KUMAR Sc ‘F’
HEAD,DLS DIVISION, ADE
Reviewed by
BHARAMA NAYAK Sc ‘F’
GD,RFS, ADE
Approved by
SM MANJUNATH Sc ‘G’
TD,MCS, ADE
Issue authorized by
NISHIKANT TAMARKAR Sc F
PD ABHYAS

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Table of Contents
1. Introduction................................................................................................................................... 7
2. System Overview.......................................................................................................................... 7
3. Specific Requirements ................................................................................................................ 21
4. Functional Requirements ............................................................................................................ 24
5. Design and Implementation Constraints ..................................................................................... 26
Table of Tables
Table 1 : List of external inputs/outputs of ATPL430......................................................................... 10
Table 2 : Microcontroller design details.............................................................................................. 11
Table 3 : Enter Configuration Mode ................................................................................................... 15
Table 4 : Packet Description for Configuration mode Commands...................................................... 15
Table 5 : Configuration mode Acknowledgement protocol ................................................................ 15
Table 6 : Packet Description for Configuration mode Acknowledgment Commands ......................... 15
Table 7 : Configuration mode read configuration command Protocol ................................................ 16
Table 8 : Packet Description to read onboard settings ........................................................................ 16
Table 9 : Configuration mode Read settings command Protocol ........................................................ 16
Table 10 : Packet Description read command acknowledgement ....................................................... 17
Table 11 : Configuration mode start settings entry command Protocol............................................... 18
Table 12 : Packet Description for Configuration mode start settings entry Commands ...................... 18
Table 13 : Configuration mode write settings command Protocol ...................................................... 19
Table 14 : Packet Description for Configuration mode write Commands........................................... 19
Table 15 : Configuration mode save acknowledgement command Protocol....................................... 20
Table 16 : Packet Description for Configuration mode save Commands............................................ 20
Table 17 : Configuration mode exit command Protocol...................................................................... 20
Table 18 : Packet Description for Configuration mode exit Commands............................................. 20
Table 19 : Packet Description for RX mode in Mission Mode............................................................ 20
Table 20 : Packet Description for TX mode in Mission Mode............................................................ 20
Table 21 : Major functional requirements........................................................................................... 24

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Table of Figures
Figure 1 : Block Diagram ..........................................................................................................8
Figure 2 : ATPL430 External Hardware Interfaces.................................................................10
Figure 3 : Microcontroller Interface Diagram .........................................................................11
Figure 4 : Software Flow Diagram ..........................................................................................14
Figure 5 : ATPL430 & OBC configuration read Protocol format...........................................16
Figure 6 : ATPL430 & OBC configuration Write Protocol ....................................................18
Reference Documents
1 Analog Devices CC1352P User Manual
2 ATPL 430-2G -1020 DATA TRANSCEIVER Specifications document
3 ATPL 430-2G -1020 DATA TRANSCEIVER User Manual

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1. Introduction
1.1. Purpose of this document
Purpose of this document is to provide requirement information on the ATPL 430-2G
-1020 DATA TRANSCEIVER module. The module is a UHF transceiver device for
long range communication and TTC control supporting encrypted data links in burst
mode FSK transmission. These requirements include functional, user interface,
technical, specifications, testing requirements
1.2. Scope of this document
Scope of this document is to establish the functional, technical and user interface
requirements of the transceiver
2. System Overview
2.1. ATPL 430-2G-1020 Overview
The UHF Programmable Tele-Command Transceiver consists of Power Supply
Section, Backend digital RF section and a front-end analog Power amplifier unit. The
operating frequency of the transmitter is from 430 to 470 MHz with a step size of 1
MHz and delivers an output power of 32.5±0.5dBm.
The unit communicates over RS232 link and is capable of data modulation in
FSK. It operates at a standard voltage of 12V DC. The Power Supply Section consists
of DC-DC Converter to convert the 12VDC input to provide regulated voltages required
by the ATPL430 electronics. Appropriate circuitry for transient spike suppression,
reverse polarity protection and EMI/EMC filtering is provided in supply lines. All the
electronic components are enclosed in a Nickel-plated aluminum housing and mil-grade
gasket is used between top plate and housing. The Ground Control Computer –
onboard Computer sends data packet to the transceiver over RS232.

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The digital backend microcontroller receives this packet and transmits the packet as is
over RF and pre-determined programmed settings stored in the controller’s memory. If
encryption is enabled, then the data packet is encrypted with 256 bit AES. On receiving
end, the transceiver relays the data received over RF as is to the OBC/GC with
decryption if the packet is encrypted with the same key
Figure 1 : Block Diagram

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2.2. User Interfaces
The ATPL430 is an embedded system. The software shall be fused into the flash
memory of microcontroller and User interface shall not be available.
The microcontroller which is being used here is TI CC1352. It’s a powerful 48MHz
processor with integrated wireless functionality. It has 352KB of programmable flash,
256KB of ROM and 80KB of ECC SRAM. Flash memory locations are used for storing
the firmware. The software shall be developed using the Code Composer IDE and the
output file shall be uploaded into the flash memory. The calibration tables and other
parameters which are unique to each unit shall be uploaded into EEPROM locations.
The uploading of program/data into Flash/EEPROM shall be managed through the
programmer. As an embedded system, the software shall be able to perform the
following major activities.
• Operational frequency switching and tuning via configuration mode command
line arguments.
• Switch between different modes of operation via configuration mode command
line arguments.
• Send back the Software/hardware versions and checksum via configuration
mode channel.
• Provide on the fly encryption support for data in/out.

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2.3. Hardware Interfaces
2.3.1. External Hardware Interfaces
2.3.2. List of external inputs/outputs of ATPL430
Table 1 : List of external inputs/outputs of ATPL430
Sl.
No.
External
Input/output
Connector
Type
Description Function
1
Interface for
Power Supply
Open Wire
Interface
Red: +12V (9-16V)
Black: Ground
This is an input to the transmitter
which is used provide supply
voltage.
2
RF Interface for
antenna
connectivity
SMA
Connector
RF output
This is the main RF output
connector to which UHF antenna
will be interfaced
3
Interface for
Data Transfer
to/from
Transceiver
Open Wire
Interface
Orange: Rx
Blue: Tx
Black: Ground
RS232 Interface for data transfer
and configuration of the
transceiver
Figure 2 : ATPL430 External Hardware Interfaces

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2.3.3. Microcontroller Interface Diagram
2.3.4. Microcontroller design details
Table 2 : Microcontroller design details
Sl.
No.
Device Function Identifier
1
DC-DC
Convertors
DC-DC converters to step down the input voltage
into 7V (for power amplifier), 5V (for RF-switches),
and 3.3V (for microcontroller and RS232
transceiver)
U4
U5
2 CC1352
SoC with ARM cortex microcontroller and Sub-GHz
RF front-end. This SoC is the brain of the device.
The device is responsible for reading and sending
messages on RS232/RS485, and RF. The
microcontroller also encrypts/decrypts the message.
U1
3 RS232/RS485
This chip is responsible for converting 3.3V TTL
level UART message from microcontroller to
RS232/RS485 standard
Present Unit only has RS232 Support
U2
4 Flash Memory 1Mb flash storage for future upgrades U3
Figure 3 : Microcontroller Interface Diagram

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5
Band Pass
Filter (BPF)
This filter comprises of passive components such as
capacitors and inductors to bandpass filter the RF
input/output.
Serves as a filter for frequencies outside of required
coverage range.
BPF
6
Single Pole
Double Throw
Switch
To switch between Rx/Tx on the RF channel SW-1
7
Power
Amplifier
Serves to boost signal strength for Tx PA
8
Low Noise
Amplifier
Serves to boost signal strength for Rx LNA
2.4. Software Interfaces
The software of microcontroller is written in Embedded C language using Code
composer studio. The sequence of operation shall be as follows.
On system bootup, the software reads the configuration setup from the memory that
was set using Command line on PC. Depending on the settings, the ATPL430 is
configured for UART baud rate, transceiver mode, frequency and other parameters.
Once the configuration reading is done, the UART is enabled at the specific baud rate
and UART Rx interrupt is enabled. The software is capable of buffering 1024 bytes of
incoming RS232 data at the maximum. However, the software is written in such a
way that the incoming data is read and handled immediately as it arrives.
If the mode set is RX only mode, then the radio listens to incoming RF signals. If
there is any data received on RF, then the data is sent to OBC on RS232. If the data is
encrypted, then it is decrypted before sending it to the OBC. It should be noted that
the UART is still listening for incoming configuration data on RS232. If a new
configuration message is received, then the new settings will be applied and the
device is rebooted.
If the mode set is TX only mode, then the microcontroller listens for incoming data on
UART. If a configuration message is received, then the new settings will be applied
and the device is rebooted. If the message received is not of configuration, then the
message is sent over RF. If encryption is enabled in settings, then the data will be
encrypted before sending it over RF.

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If the mode set is TXRX, then the behavior will be the combination of both RX only
mode and TX only mode. . If there is any data received on RF, then the data is sent to
OBC on RS232. If the data is encrypted, then it is decrypted before sending it to the
OBC. Simultaneously, the microcontroller listens for incoming data on UART. If a
configuration message is received, then the new settings will be applied and the
device is rebooted. If the message received is not of configuration, then the message is
sent over RF. If encryption is enabled in settings, then the data will be encrypted
before sending it over RF.
The overall flow chart explaining the program structure is shown in the following
section.

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2.5. Software Flow Diagram
Figure 4 : Software Flow Diagram

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2.6. Configuration mode communication Interfaces
The detailed description of the configuration protocol between HOST PC and
ATPL430 is described below. All Commands are in ASCII.
2.6.1. Configuration Mode Protocol for ATPL430
Enter Configuration Mode
Table 3 : Enter Configuration Mode
Source HOST PC
Destination ATPL430
Link RS232
# of parameters 1
Update Rate Continuous till Acknowledgement
Max Packet Length 21 bytes
Baud rate 115200(default)
Packet Description for Configuration mode Commands
Table 4 : Packet Description for Configuration mode Commands
S
No
Parameter
Index
Command
description
Valid range Remarks
1 1 Initiate config
mode
ATPL430-2G-
C-9*r$y@0!
@default baud rate of
115200, to be sent as a
command line to the
TxRx
Configuration mode Acknowledgement protocol
Table 5 : Configuration mode Acknowledgement protocol
Source ATPL430
Destination HOST PC
Link RS232
# of parameters 1
Update Rate Once
Packet Description for Configuration mode Acknowledgment Commands
Table 6 : Packet Description for Configuration mode Acknowledgment Commands
S
No
Parameter
Index
Command
Description
Valid range Remarks
1 1 Config mode
acknowledgment
ATPL430-
2G_ACKn
n is a new line character.
Acknowledgement for
configuration mode initiation.

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2.6.2. ATPL430 & HOST PC read configuration command format
Figure 5 : ATPL430 & OBC configuration read Protocol format
Configuration mode read configuration command Protocol
Table 7 : Configuration mode read configuration command Protocol
Source HOST PC
Destination ATPL430
Link RS232
# of parameters 1
Update Rate Once
Max Packet Length 1 byte
Packet Description for Configuration mode read configuration Commands
Table 8 : Packet Description to read onboard settings
S
No
Parameter
Index
Command
description
Command
Input
Remarks
1 1 Read Memory
settings
R Unit should be in config mode
Output onboard settings in
ASCII as shown in 2.6.2.1
2.6.2.1. Configuration mode Read settings command Protocol
Table 9 : Configuration mode Read settings command Protocol
Source ATPL430
Destination HOST PC
Link RS232
# of parameters 5 data bits, “;” inter command break
Update Rate Once
Sample output: "115200;0;440000000;0;1; n"

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Packet Description for Configuration mode read Commands
Table 10 : Packet Description read command acknowledgement
S
No
Parameter
Index
Command
Description
Valid range Remarks
1 1
Baud rate
For communication
2400
4800
9600
14400
19200
38400
57600
115200
256000
Default value: 115200
Experimental: 256000
2 2
Previous command
end identifier
;
3 3 Mode of the TxRx
0
1
2
Transceiver Mode
(Default)
Transmitter Mode
Receiver Mode
4 4
Previous command
end identifier
;
5 5
Frequency (Hz)
selectable by the
user
430000000 -
470000000
Last 6 digits always
000000
Frequency step is 1 MHz
10 10
Previous command
end identifier
;
11 11 Encryption
1 – Enabled
0 – Disabled
Default “0”
12 12
Previous command
end identifier
;
13 13
Software Version
Of the onboard
firmware
1.0-x.x Fixed factory value
14 14 New line /n

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2.6.3 ATPL 430 & HOST PC configuration Write Protocol
Configuration mode start settings entry command Protocol
Table 11 : Configuration mode start settings entry command Protocol
Source HOST PC
Destination ATPL430
Link RS232
# of parameters 1
Update Rate Once
Packet Description for Configuration mode start settings entry Commands
Table 12 : Packet Description for Configuration mode start settings entry Commands
S
No
Parameter
Index
Command
description
Command
Input
Remarks
1 1 Save to Memory
settings
S Unit should be in Config
mode
Enter command argument
as shown in 2.6.3.1 after
10ms
Figure 6 : ATPL430 & OBC configuration Write Protocol

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2.6.3.1 Configuration mode write settings command Protocol
Table 13 : Configuration mode write settings command Protocol
Source HOST PC
Destination ATPL430
Link RS232
# of parameters 4, “;” inter command break
Update Rate Once
Packet Description for Configuration mode write Commands
Table 14 : Packet Description for Configuration mode write Commands
S
No
Parameter
Index
Command
Description
Valid range Remarks
1 1
Baud rate
For communication
2400
4800
9600
14400
19200
38400
57600
115200
256000
Default value:
115200
Experimental:
256000
2 2
Previous command
end identifier
;
3 3 Mode of the TxRx
0
1
2
Transceiver Mode
(Default)
Transmitter Mode
Receiver Mode
4 4
Previous command
end identifier
;
5 5
Frequency (Hz)
selectable by the user
430000000 -
470000000
Last 6 digits always
000000
Frequency step is 1
MHz
10 10
Previous command
end identifier
;
11 11 Encryption
1 – Enabled
0 – Disabled
Default “0”
Sample input: "115200;1;450000000;1 "
After memory settings write command is sent, the transceiver will acknowledge the
successful input and will require a final reset command to complete the setting save

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cycle. Refer below for the command protocols
Configuration mode save acknowledgement command Protocol
Table 15 : Configuration mode save acknowledgement command Protocol
Source ATPL430
Destination HOST PC
Link RS232
# of parameters 1
Update Rate Once
Packet Description for Configuration mode save acknowledgement Commands
Table 16 : Packet Description for Configuration mode save Commands
S
No
Parameter
Index
Command
description
Valid range Remarks
1 1 Setting save
acknowledgement
SUCCESSn Ends with a new line
character n
Configuration mode exit command Protocol
Table 17 : Configuration mode exit command Protocol
Source HOST PC
Destination ATPL430
Link RS232
# of parameters 1
Update Rate Once
Packet Description for Configuration mode exit Commands
Table 18 : Packet Description for Configuration mode exit Commands
S
No
Parameter
Index
Command
description
Command
Input
Remarks
1 1 Reset Microcontroller
to save settings
E exits configuration mode
and Resets the
microcontroller into
mission mode

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2.7 Mission Mode communication details
The detailed description of the communication protocol between OBC and ATPL430 during
mission mode is described below.
Mission mode Communication Protocols
Table 19: Mission Mode TX protocol
Source OBC
Destination ATPL430
Link RS232
Update Rate 40ms
Table 20: Mission Mode RX protocol
Source ATPL430
Destination OBC
Link RS232
Update Rate 100
3. Specific Requirements
3.1. Inputs to Software
3.1.1. Baud rate Changes
The baud rate of the transceiver is selectable by the user between 2400-256000.
The default baud rate for the device is set to 115200 during production. The
onboard baud rate is required to be known when trying to connect to the unit over
command line argument on RS232.
3.1.2. Frequency Change
ATPL430 has programmable frequency range of 430MHz to 470MHz in step size
of 1MHz. The output from the unit will be in ASCII and the last 6 digits shall be

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0 when reading the memory. Input on the frequency shall also be in ASCII and in
step size of 1MHz. Input shall be of 9-byte length with last 6 bytes being 0.
Settings to be read and written over RS232 interface.
3.1.3. Mode of Operation
ATPL430 has programmable mode setting to set the unit in either Rx mode only,
Tx mode only or RxTx Mode (default). The settings will be applied over RS232
and will be of 1 byte length.
3.1.4. Bytes in packet
Bytes in packet is a programmable feature used during testing only. Default setting
is 230 bytes. Bytes in packet setting is dependent on packet delay setting. If packet
delay is set to 0ms, this setting has no effect on production boards as the data is
sent as received.
3.1.5. Packet delay
ATPL430 has programmable Inter-packet delay which instructs the
microcontroller to wait for specified period of time before transmitting the
accumulated data on UART line. Experimental setting for testing purposes only.
Default setting is 0ms which instructs the controller to send the data on UART as
received without delay.
3.1.6. Encryption
ATPL430 has on the fly 256-bit AES encryption support for data being Tx and
Rx. The encryption is disabled by default. Command parameter is 1 byte (0/1) and
is sent in ASCII over RS232.

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3.2. Outputs from Software
3.2.1. Baud rate Changes
The baud rate of the transceiver is selectable by the user between 2400-256000.
The default baud rate for the device is set to 115200 during production. The
onboard baud rate is required to be known when trying to connect to the unit over
command line argument on RS232.
3.2.2. Frequency Change
ATPL430 has programmable frequency range of 430MHz to 470MHz in step size
of 1MHz. The output from the unit will be in ASCII and the last 6 digits shall be
0 when reading the memory. Input on the frequency shall also be in ASCII and in
step size of 1MHz. Input shall be of 9-byte length with last 6 bytes being 0.
Settings to be read and written over RS232 interface.
3.2.3. Mode of Operation
ATPL430 has programmable mode setting to set the unit in either Rx mode only,
Tx mode only or RxTx Mode (default). The settings will be applied over RS232
and will be of 1 byte length.
3.2.4. Bytes in packet
Bytes in packet is a programmable feature used during testing only. Default setting
is 230 bytes. Bytes in packet setting is dependent on packet delay setting. If packet
delay is set to 0ms, this setting has no effect on production boards as the data is
sent as received.
3.2.5. Packet delay
ATPL430 has programmable Inter-packet delay which instructs the
microcontroller to wait for specified period of time before transmitting the
accumulated data on UART line. Experimental setting for testing purposes only.
Default setting is 0ms which instructs the controller to send the data on UART as
received without delay.
3.2.6. Encryption
ATPL430 has on the fly 256-bit AES encryption support for data being Tx and
Rx. The encryption is disabled by default. Command parameter is 1 byte (0/1) and
is sent in ASCII over RS232.
3.2.7. Software Version
ATPL430 has provision for data display of software version number which will
be hardcoded into the Firmware ROM and cannot be altered in normal operating
mode or configuration mode. The setting will be factory set.

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4. Functional Requirements
Below given Table contains the major functional requirements to meet ATPL-430
Software requirement.
Table 21: Major functional requirements
Requirement ID Requirement Requirement Description
ATPL-430-RI-01
Check memory to load settings on
power on &
Initialize peripherals. Check for
Configuration Mode / Mission
Mode message
At power on, the
microcontroller shall check
onboard flash for previously
loaded settings and start
initial procedures. It shall
start listening to the UART
channel on RS232 for
configuration mode message
while initializing Mission
mode
ATPL-430-RI-02
Data intended to be transferred will
be over RS 232 port of onboard and
ground control system at 2.4K –
115k baud.
The microcontroller shall
listen on RS232 channel for
any impending configuration
commands or data packets
post bootup and mode check.
ATPL-430-RI-03
Receive the transmitted data on
selected frequency and transmit on
selected frequency
ATPL430 will transmit all
data on the UART channel as
it is sent by the OBC over the
selected frequency channel
and with selected encryption
parameter.
Similarly, all Received RF
data on the Rx frequency will
be decoded/Decrypted and
transmitted to OBC over
RS232 channel.
ATPL-430-RI-04
Data will have minimum possible
transmission duration in continuous
mode.
The unit has a provision to
wait for data to buffer on the
UART channel for testing
purposes. Present value
achieved is 12ms, instructing
the controller to send data
without any delay in

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continuous mode
transmission.
ATPL-430-RI-05
Data should be encrypted by 256bit
AES and user selectable for
enable/disable
The microcontroller supports
on the fly 256 Bit AES
encryption support for data
being transmitted and
received. Default is set to
disabled. The Controller does
settings check before Tx on
RF channel and sending Rx
data on UART channel and
decrypts accordingly.
ATPL-430-RI-06
Should be able to send data (host)
and receive data (recipient) in half
duplex
The microcontroller supports
a single COM port with
single RS232 channel. Data
can be either sent or received
one way at a single instance,
any data conflict can result in
data loss.
ATPL-430-RI-07
Shall allow configuration over
command line
allow for command mode
initialization at any time of
operation via command
parameter over RS232 line in
ASCII. This will allow for
settings change and update in
configuration mode. Only
applicable using HOST PC
and TXRX
ATPL-430-RI-08
Display Software or Hardware
version in Configuration Mode
display software or hardware
version numbers as set by the
factory firmware in
configuration mode settings
read display.
ATPL-430-RI-09
Mission mode to support RXTX
with max 128-byte packet size.
The TXRX shall support
maximum of 125-byte packet
size during RS232
communication with the
OBC. Data exceeding
128byte will be sent as part
of next packet. Minimum
transmission period is 40ms.

Document
Classification
Project
Name
Pages
TRX/SRD
(P / No.: ATPL 430 2G 1020)
01 06 27-07-2021
RESTRICTED
5. Design and Implementation Constraints
5.1. Software
5.1.1. Software shall be development in embedded C
5.1.2. Software shall be lightweight and modular
5.1.3. Software shall be developed in code composer studio
5.1.4. DO 178B, Level-D Standard shall be used for life cycle process
5.2. Timing requirements and constraints
5.2.1. Initialization should be completed in <5 secs
5.3. Memory size constraints
5.3.1. Software shall not exceed 50% of following
• RAM
• FLASH
• EEPROM
5.4. Processing power constraints
5.4.1. Software shall not exceed 60% of processing capacity
5.5. Real time constraints
5.5.1. Shall have minimum delay for any data on UART channel
5.5.2. Priority to Rx data over Tx data from GC to OBC
5.6. Data integrity constraints
5.6.1. Shall ensure no data loss in the data packet
5.6.2. In event of data clash on TX and RX, data will be lost.

Software_Requirement_Doc_ATPL430_v9.pdf

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