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CPU Scheduling (Part II)
Amir H. Payberah
amir@sics.se
Amirkabir University of Technology
(Tehran Polytechnic)
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 1 / 58
Motivation
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 2 / 58
Reminder
CPU scheduling is the basis of multiprogrammed OSs.
By switching the CPU among processes, the OS makes the computer
more productive.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 3 / 58
Basic Concepts
In a single-processor system, only one process can run at a time.
Others must wait until the CPU is free and can be rescheduled.
The objective of multiprogramming is to have some process running
at all times, to maximize CPU utilization.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 4 / 58
Scheduling Criteria
CPU utilization
Throughput
Turnaround time
Waiting time
Response time
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 5 / 58
Process Scheduling Algorithms
First-Come, First-Served Scheduling
Shortest-Job-First Scheduling
Priority Scheduling
Round-Robin Scheduling
Multilevel Queue Scheduling
Multilevel Feedback Queue Scheduling
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 6 / 58
Thread Scheduling
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 7 / 58
Thread Scheduling (1/2)
Distinction between user-level and kernel-level threads.
When threads supported by the OS, threads scheduled, not pro-
cesses.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 8 / 58
Thread Scheduling (2/2)
Process-Contention Scope (PCS)
• In many-to-one and many-to-many models
• Scheduling competition is within the process.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 9 / 58
Thread Scheduling (2/2)
Process-Contention Scope (PCS)
• In many-to-one and many-to-many models
• Scheduling competition is within the process.
System-Contention Scope (SCS)
• In one-to-one model.
• Scheduling competition among all threads in system.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 9 / 58
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 10 / 58
Pthread Scheduling
API allows specifying either PCS or SCS during thread creation.
• PTHREAD SCOPE PROCESS schedules threads using PCS scheduling.
• PTHREAD SCOPE SYSTEM schedules threads using SCS scheduling.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 11 / 58
Contention Scope
pthread attr setscope and pthread attr getscope set/get
contention scope attribute in thread attributes object.
#include <pthread.h>
int pthread_attr_setscope(pthread_attr_t *attr, int scope);
int pthread_attr_getscope(const pthread_attr_t *attr, int *scope);
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 12 / 58
Pthread Scheduling API (1/2)
#include <pthread.h>
#include <stdio.h>
#define NUM_THREADS 5
int main(int argc, char *argv[]) {
int i, scope;
pthread_t tid[NUM THREADS];
pthread_attr_t attr;
/* get the default attributes */
pthread_attr_init(&attr);
/* first inquire on the current scope */
if (pthread_attr_getscope(&attr, &scope) != 0)
fprintf(stderr, "Unable to get scheduling scopen");
else {
if (scope == PTHREAD_SCOPE_PROCESS)
printf("PTHREAD_SCOPE_PROCESS");
else if (scope == PTHREAD_SCOPE_SYSTEM)
printf("PTHREAD_SCOPE_SYSTEM");
else
fprintf(stderr, "Illegal scope value.n");
}
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 13 / 58
Pthread Scheduling API (2/2)
/* set the scheduling algorithm to PCS or SCS */
pthread_attr_setscope(&attr, PTHREAD_SCOPE_SYSTEM);
/* create the threads */
for (i = 0; i < NUM_THREADS; i++)
pthread_create(&tid[i], &attr, runner, NULL);
/* now join on each thread */
for (i = 0; i < NUM_THREADS; i++)
pthread_join(tid[i], NULL);
}
/* Each thread will begin control in this function */
void *runner(void *param) {
/* do some work ... */
pthread_exit(0);
}
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 14 / 58
Multi-Processor Scheduling
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 15 / 58
Multiple-Processor Scheduling
CPU scheduling is more complex when multiple CPUs are available.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 16 / 58
Multiple-Processor Scheduling
CPU scheduling is more complex when multiple CPUs are available.
Asymmetric multiprocessing
• Only one processor does all scheduling decisions, I/O processing,
and other system activities.
• The other processors execute only user code.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 16 / 58
Multiple-Processor Scheduling
CPU scheduling is more complex when multiple CPUs are available.
Asymmetric multiprocessing
• Only one processor does all scheduling decisions, I/O processing,
and other system activities.
• The other processors execute only user code.
Symmetric multiprocessing (SMP)
• Each processor is self-scheduling
• All processes in common ready queue, or each has its own private
queue of ready processes.
• Currently, the most common.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 16 / 58
Processor Affinity
What happens to cache memory when a process has been running
on a specific processor, and then, the process migrates to another
processor?
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 17 / 58
Processor Affinity
What happens to cache memory when a process has been running
on a specific processor, and then, the process migrates to another
processor?
Invalidating and repopulating caches is costly.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 17 / 58
Processor Affinity
What happens to cache memory when a process has been running
on a specific processor, and then, the process migrates to another
processor?
Invalidating and repopulating caches is costly.
Processor affinity: keep a process running on the same processor.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 17 / 58
Processor Affinity
What happens to cache memory when a process has been running
on a specific processor, and then, the process migrates to another
processor?
Invalidating and repopulating caches is costly.
Processor affinity: keep a process running on the same processor.
• Soft affinity: the OS attempts to keep a process on a single
processor, but it is possible for a process to migrate between
processors.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 17 / 58
Processor Affinity
What happens to cache memory when a process has been running
on a specific processor, and then, the process migrates to another
processor?
Invalidating and repopulating caches is costly.
Processor affinity: keep a process running on the same processor.
• Soft affinity: the OS attempts to keep a process on a single
processor, but it is possible for a process to migrate between
processors.
• Hard affinity: allowing a process to specify a subset of processors on
which it may run.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 17 / 58
NUMA and CPU Scheduling
Non-Uniform Memory Access (NUMA): a CPU has faster access to
some parts of main memory than to other parts.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 18 / 58
NUMA and CPU Scheduling
Non-Uniform Memory Access (NUMA): a CPU has faster access to
some parts of main memory than to other parts.
Systems containing combined CPU and memory boards.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 18 / 58
NUMA and CPU Scheduling
Non-Uniform Memory Access (NUMA): a CPU has faster access to
some parts of main memory than to other parts.
Systems containing combined CPU and memory boards.
A process that is assigned affinity to a particular CPU can be allo-
cated memory on the board where that CPU resides.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 18 / 58
Load Balancing
If SMP, need to keep all CPUs loaded for efficiency.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 19 / 58
Load Balancing
If SMP, need to keep all CPUs loaded for efficiency.
Load balancing attempts to keep workload evenly distributed.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 19 / 58
Load Balancing
If SMP, need to keep all CPUs loaded for efficiency.
Load balancing attempts to keep workload evenly distributed.
Push migration: periodic task checks load on each processor, and if
found pushes task from overloaded CPU to other CPUs.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 19 / 58
Load Balancing
If SMP, need to keep all CPUs loaded for efficiency.
Load balancing attempts to keep workload evenly distributed.
Push migration: periodic task checks load on each processor, and if
found pushes task from overloaded CPU to other CPUs.
Pull migration: idle processors pulls waiting task from busy proces-
sor.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 19 / 58
Multicore Processors
Place multiple processor cores on same physical chip.
Faster and consumes less power.
Memory stall: when a processor accesses memory, it spends a sig-
nificant amount of time waiting for the data to become available.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 20 / 58
Multithreaded Multicore System
Multiple threads per core also growing.
• Takes advantage of memory stall to make progress on another
thread while memory retrieve happens.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 21 / 58
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 22 / 58
CPU Affinity
sched setaffinity() and sched getaffinity() sets/gets the
CPU affinity of the process specified by pid.
#define _GNU_SOURCE
#include <sched.h>
int sched_setaffinity(pid_t pid, size_t len, cpu_set_t *set);
int sched_getaffinity(pid_t pid, size_t len, cpu_set_t *set);
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 23 / 58
CPU Affinity Macros
CPU ZERO() initializes set to be empty.
CPU SET() adds the CPU cpu to set.
CPU CLR() removes the CPU cpu from set.
CPU ISSET() returns true if the CPU cpu is a member of set.
#define _GNU_SOURCE
#include <sched.h>
void CPU_ZERO(cpu_set_t *set);
void CPU_SET(int cpu, cpu_set_t *set);
void CPU_CLR(int cpu, cpu_set_t *set);
int CPU_ISSET(int cpu, cpu_set_t *set);
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 24 / 58
CPU Affinity Macros
The process identified by pid runs on any CPU other than the first
CPU of a four-processor system.
cpu_set_t set;
CPU_ZERO(&set);
CPU_SET(1, &set);
CPU_SET(2, &set);
CPU_SET(3, &set);
sched_setaffinity(pid, sizeof(set), &set);
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 25 / 58
Real-Time CPU Scheduling
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 26 / 58
Minimizing Latency
When an event occurs, the system must respond to and service it
as quickly as possible.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 27 / 58
Minimizing Latency
When an event occurs, the system must respond to and service it
as quickly as possible.
Event latency: the amount of time that elapses from when an event
occurs to when it is serviced.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 27 / 58
Soft vs. Hard Real-Time
Soft real-time
• No guarantee as to when a critical real-time process will be
scheduled.
• They guarantee only that the process will be given preference over
noncritical processes.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 28 / 58
Soft vs. Hard Real-Time
Soft real-time
• No guarantee as to when a critical real-time process will be
scheduled.
• They guarantee only that the process will be given preference over
noncritical processes.
Hard real-time
• The task must be serviced by its deadline.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 28 / 58
Real-Time CPU Scheduling (1/2)
Two types of latencies affect performance:
1 Interrupt latency: time from arrival of interrupt to start of routine
that services interrupt.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 29 / 58
Real-Time CPU Scheduling (1/2)
Two types of latencies affect performance:
1 Interrupt latency: time from arrival of interrupt to start of routine
that services interrupt.
2 Dispatch latency: time for schedule to take current process off CPU
and switch to another.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 29 / 58
Real-Time CPU Scheduling (2/2)
Conflict phase of dispatch latency:
1 Preemption of any process running in kernel mode.
2 Release by low-priority process of resources needed by high-priority
processes.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 30 / 58
Periodic Processes
Periodic processes require CPU at constant intervals.
• Processing time t, deadline d, period p
• 0 ≤ t ≤ d ≤ p
• Rate of periodic task is 1
p
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 31 / 58
Priority-Based Scheduling
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 32 / 58
Priority-Based Scheduling
For real-time scheduling, scheduler must support preemptive and
priority-based scheduling.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 33 / 58
Priority-Based Scheduling
For real-time scheduling, scheduler must support preemptive and
priority-based scheduling.
Only guarantees soft real-time.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 33 / 58
Priority-Based Scheduling
For real-time scheduling, scheduler must support preemptive and
priority-based scheduling.
Only guarantees soft real-time.
For hard real-time must also provide ability to meet deadlines.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 33 / 58
Rate-Monotonic Scheduling
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 34 / 58
Rate-Monotonic Scheduling
A priority is assigned based on the inverse of its period.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 35 / 58
Rate-Monotonic Scheduling
A priority is assigned based on the inverse of its period.
Shorter periods = higher priority
Longer periods = lower priority
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 35 / 58
Rate-Monotonic Scheduling
A priority is assigned based on the inverse of its period.
Shorter periods = higher priority
Longer periods = lower priority
Assign a higher priority to tasks that require the CPU more often.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 35 / 58
Rate-Monotonic Example 1 (1/4)
Two processes: P1 and P2
p1 = 50 and p2 = 100
t1 = 20 and t2 = 35
d1 = d2 = complete its CPU burst by the start of its next period
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 36 / 58
Rate-Monotonic Example 1 (2/4)
Is it possible to schedule these tasks so that each meets its deadlines?
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 37 / 58
Rate-Monotonic Example 1 (2/4)
Is it possible to schedule these tasks so that each meets its deadlines?
Measure the CPU utilization: ti
pi
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 37 / 58
Rate-Monotonic Example 1 (2/4)
Is it possible to schedule these tasks so that each meets its deadlines?
Measure the CPU utilization: ti
pi
t1
p1
= 20
50 = 0.4
t2
p2
= 35
100 = 0.35
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 37 / 58
Rate-Monotonic Example 1 (2/4)
Is it possible to schedule these tasks so that each meets its deadlines?
Measure the CPU utilization: ti
pi
t1
p1
= 20
50 = 0.4
t2
p2
= 35
100 = 0.35
40% + 35% < 100%
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 37 / 58
Rate-Monotonic Example 1 (3/4)
Suppose we assign P2 a higher priority than P1.
• P1 misses its deadline.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 38 / 58
Rate-Monotonic Example 1 (4/4)
Suppose we assign P1 a higher priority than P2.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 39 / 58
Rate-Monotonic Example 2 (1/3)
Two processes: P1 and P2
p1 = 50 and p2 = 80
t1 = 25 and t2 = 35
d1 = d2 = complete its CPU burst by the start of its next period
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 40 / 58
Rate-Monotonic Example 2 (2/3)
Is it possible to schedule these tasks so that each meets its deadlines?
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 41 / 58
Rate-Monotonic Example 2 (2/3)
Is it possible to schedule these tasks so that each meets its deadlines?
t1
p1
= 25
50 = 0.5
t2
p2
= 35
80 = 0.44
50% + 44% < 100%
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 41 / 58
Rate-Monotonic Example 2 (3/3)
Suppose we assign P1 a higher priority than P2.
• P2 misses its deadline.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 42 / 58
Earliest-Deadline-First (EDF)
Scheduling
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 43 / 58
Earliest Deadline First Scheduling
Priorities are assigned according to deadlines.
The earlier the deadline, the higher the priority.
The later the deadline, the lower the priority.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 44 / 58
EDF Example (1/3)
Two processes: P1 and P2
p1 = 50 and p2 = 80
t1 = 25 and t2 = 35
d1 = d2 = complete its CPU burst by the start of its next period
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 45 / 58
EDF Example (2/3)
Is it possible to schedule these tasks so that each meets its deadlines?
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 46 / 58
EDF Example (2/3)
Is it possible to schedule these tasks so that each meets its deadlines?
t1
p1
= 25
50 = 0.5
t2
p2
= 35
80 = 0.44
50% + 44% < 100%
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 46 / 58
EDF Example (3/3)
Suppose we assign P1 a higher priority than P2.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 47 / 58
Proportional Share Scheduling
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 48 / 58
Proportional Share Scheduling
T shares are allocated among all processes in the system.
An application receives N shares where N < T.
This ensures each application will receive N
T of the total processor
time.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 49 / 58
Proportional Share Example
Three processes: P1, P2, and P3
T = 100
P1 is assigned 50, P2 is assigned 15, and P3 is assigned 20.
P1 will have 50% of total processor time, P2 will have 15%, and P3
will have 20%.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 50 / 58
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 51 / 58
POSIX Real-Time Scheduling
API provides functions for managing real-time threads/processes:
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 52 / 58
POSIX Real-Time Scheduling
API provides functions for managing real-time threads/processes:
Defines two scheduling classes for real-time threads:
1 SCHED FIFO: scheduled using a FCFS strategy with a FIFO queue.
There is no time-slicing for threads/processes of equal priority.
2 SCHED RR: similar to SCHED FIFO except time-slicing occurs for
threads/processes of equal priority.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 52 / 58
Setting the Linux Scheduling Policy
sched getscheduler() and sched setscheduler() manipulate
the scheduling policy.
#include <sched.h>
struct sched_param {
/* ... */
int sched_priority;
/* ... */
};
int sched_getscheduler(pid_t pid);
int sched_setscheduler(pid_t pid, int policy, const struct sched_param *sp);
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 53 / 58
Get Priority
int policy;
/* get our scheduling policy */
policy = sched_getscheduler(0);
switch(policy) {
case SCHED_OTHER:
printf("Policy is normaln");
break;
case SCHED_RR:
printf("Policy is round-robinn");
break;
case SCHED_FIFO:
printf("Policy is first-in, first-outn");
break;
case -1:
perror("sched_getscheduler");
break;
default:
fprintf(stderr, "Unknown policy!n");
}
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 54 / 58
Set Priority
struct sched_param sp = { .sched_priority = 1 };
int ret;
ret = sched_setscheduler(0, SCHED_RR, &sp);
if (ret == -1) {
perror("sched_setscheduler");
return 1;
}
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 55 / 58
Summary
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 56 / 58
Summary
Thread scheduling: PCS and SCS
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 57 / 58
Summary
Thread scheduling: PCS and SCS
Multi-processor scheduling: SMP, processor affinity, load balancing
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 57 / 58
Summary
Thread scheduling: PCS and SCS
Multi-processor scheduling: SMP, processor affinity, load balancing
Real-time scheduling: soft and hard real times
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 57 / 58
Summary
Thread scheduling: PCS and SCS
Multi-processor scheduling: SMP, processor affinity, load balancing
Real-time scheduling: soft and hard real times
Real-time scheduling algorithms
• Priority-based
• Rate-monotonic
• Earliest-deadline-first
• Proportional share scheduling
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 57 / 58
Questions?
Acknowledgements
Some slides were derived from Avi Silberschatz slides.
Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 58 / 58

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CPU Scheduling Algorithms and Techniques

  • 1. CPU Scheduling (Part II) Amir H. Payberah amir@sics.se Amirkabir University of Technology (Tehran Polytechnic) Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 1 / 58
  • 2. Motivation Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 2 / 58
  • 3. Reminder CPU scheduling is the basis of multiprogrammed OSs. By switching the CPU among processes, the OS makes the computer more productive. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 3 / 58
  • 4. Basic Concepts In a single-processor system, only one process can run at a time. Others must wait until the CPU is free and can be rescheduled. The objective of multiprogramming is to have some process running at all times, to maximize CPU utilization. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 4 / 58
  • 5. Scheduling Criteria CPU utilization Throughput Turnaround time Waiting time Response time Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 5 / 58
  • 6. Process Scheduling Algorithms First-Come, First-Served Scheduling Shortest-Job-First Scheduling Priority Scheduling Round-Robin Scheduling Multilevel Queue Scheduling Multilevel Feedback Queue Scheduling Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 6 / 58
  • 7. Thread Scheduling Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 7 / 58
  • 8. Thread Scheduling (1/2) Distinction between user-level and kernel-level threads. When threads supported by the OS, threads scheduled, not pro- cesses. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 8 / 58
  • 9. Thread Scheduling (2/2) Process-Contention Scope (PCS) • In many-to-one and many-to-many models • Scheduling competition is within the process. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 9 / 58
  • 10. Thread Scheduling (2/2) Process-Contention Scope (PCS) • In many-to-one and many-to-many models • Scheduling competition is within the process. System-Contention Scope (SCS) • In one-to-one model. • Scheduling competition among all threads in system. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 9 / 58
  • 11. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 10 / 58
  • 12. Pthread Scheduling API allows specifying either PCS or SCS during thread creation. • PTHREAD SCOPE PROCESS schedules threads using PCS scheduling. • PTHREAD SCOPE SYSTEM schedules threads using SCS scheduling. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 11 / 58
  • 13. Contention Scope pthread attr setscope and pthread attr getscope set/get contention scope attribute in thread attributes object. #include <pthread.h> int pthread_attr_setscope(pthread_attr_t *attr, int scope); int pthread_attr_getscope(const pthread_attr_t *attr, int *scope); Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 12 / 58
  • 14. Pthread Scheduling API (1/2) #include <pthread.h> #include <stdio.h> #define NUM_THREADS 5 int main(int argc, char *argv[]) { int i, scope; pthread_t tid[NUM THREADS]; pthread_attr_t attr; /* get the default attributes */ pthread_attr_init(&attr); /* first inquire on the current scope */ if (pthread_attr_getscope(&attr, &scope) != 0) fprintf(stderr, "Unable to get scheduling scopen"); else { if (scope == PTHREAD_SCOPE_PROCESS) printf("PTHREAD_SCOPE_PROCESS"); else if (scope == PTHREAD_SCOPE_SYSTEM) printf("PTHREAD_SCOPE_SYSTEM"); else fprintf(stderr, "Illegal scope value.n"); } Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 13 / 58
  • 15. Pthread Scheduling API (2/2) /* set the scheduling algorithm to PCS or SCS */ pthread_attr_setscope(&attr, PTHREAD_SCOPE_SYSTEM); /* create the threads */ for (i = 0; i < NUM_THREADS; i++) pthread_create(&tid[i], &attr, runner, NULL); /* now join on each thread */ for (i = 0; i < NUM_THREADS; i++) pthread_join(tid[i], NULL); } /* Each thread will begin control in this function */ void *runner(void *param) { /* do some work ... */ pthread_exit(0); } Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 14 / 58
  • 16. Multi-Processor Scheduling Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 15 / 58
  • 17. Multiple-Processor Scheduling CPU scheduling is more complex when multiple CPUs are available. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 16 / 58
  • 18. Multiple-Processor Scheduling CPU scheduling is more complex when multiple CPUs are available. Asymmetric multiprocessing • Only one processor does all scheduling decisions, I/O processing, and other system activities. • The other processors execute only user code. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 16 / 58
  • 19. Multiple-Processor Scheduling CPU scheduling is more complex when multiple CPUs are available. Asymmetric multiprocessing • Only one processor does all scheduling decisions, I/O processing, and other system activities. • The other processors execute only user code. Symmetric multiprocessing (SMP) • Each processor is self-scheduling • All processes in common ready queue, or each has its own private queue of ready processes. • Currently, the most common. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 16 / 58
  • 20. Processor Affinity What happens to cache memory when a process has been running on a specific processor, and then, the process migrates to another processor? Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 17 / 58
  • 21. Processor Affinity What happens to cache memory when a process has been running on a specific processor, and then, the process migrates to another processor? Invalidating and repopulating caches is costly. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 17 / 58
  • 22. Processor Affinity What happens to cache memory when a process has been running on a specific processor, and then, the process migrates to another processor? Invalidating and repopulating caches is costly. Processor affinity: keep a process running on the same processor. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 17 / 58
  • 23. Processor Affinity What happens to cache memory when a process has been running on a specific processor, and then, the process migrates to another processor? Invalidating and repopulating caches is costly. Processor affinity: keep a process running on the same processor. • Soft affinity: the OS attempts to keep a process on a single processor, but it is possible for a process to migrate between processors. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 17 / 58
  • 24. Processor Affinity What happens to cache memory when a process has been running on a specific processor, and then, the process migrates to another processor? Invalidating and repopulating caches is costly. Processor affinity: keep a process running on the same processor. • Soft affinity: the OS attempts to keep a process on a single processor, but it is possible for a process to migrate between processors. • Hard affinity: allowing a process to specify a subset of processors on which it may run. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 17 / 58
  • 25. NUMA and CPU Scheduling Non-Uniform Memory Access (NUMA): a CPU has faster access to some parts of main memory than to other parts. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 18 / 58
  • 26. NUMA and CPU Scheduling Non-Uniform Memory Access (NUMA): a CPU has faster access to some parts of main memory than to other parts. Systems containing combined CPU and memory boards. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 18 / 58
  • 27. NUMA and CPU Scheduling Non-Uniform Memory Access (NUMA): a CPU has faster access to some parts of main memory than to other parts. Systems containing combined CPU and memory boards. A process that is assigned affinity to a particular CPU can be allo- cated memory on the board where that CPU resides. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 18 / 58
  • 28. Load Balancing If SMP, need to keep all CPUs loaded for efficiency. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 19 / 58
  • 29. Load Balancing If SMP, need to keep all CPUs loaded for efficiency. Load balancing attempts to keep workload evenly distributed. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 19 / 58
  • 30. Load Balancing If SMP, need to keep all CPUs loaded for efficiency. Load balancing attempts to keep workload evenly distributed. Push migration: periodic task checks load on each processor, and if found pushes task from overloaded CPU to other CPUs. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 19 / 58
  • 31. Load Balancing If SMP, need to keep all CPUs loaded for efficiency. Load balancing attempts to keep workload evenly distributed. Push migration: periodic task checks load on each processor, and if found pushes task from overloaded CPU to other CPUs. Pull migration: idle processors pulls waiting task from busy proces- sor. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 19 / 58
  • 32. Multicore Processors Place multiple processor cores on same physical chip. Faster and consumes less power. Memory stall: when a processor accesses memory, it spends a sig- nificant amount of time waiting for the data to become available. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 20 / 58
  • 33. Multithreaded Multicore System Multiple threads per core also growing. • Takes advantage of memory stall to make progress on another thread while memory retrieve happens. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 21 / 58
  • 34. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 22 / 58
  • 35. CPU Affinity sched setaffinity() and sched getaffinity() sets/gets the CPU affinity of the process specified by pid. #define _GNU_SOURCE #include <sched.h> int sched_setaffinity(pid_t pid, size_t len, cpu_set_t *set); int sched_getaffinity(pid_t pid, size_t len, cpu_set_t *set); Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 23 / 58
  • 36. CPU Affinity Macros CPU ZERO() initializes set to be empty. CPU SET() adds the CPU cpu to set. CPU CLR() removes the CPU cpu from set. CPU ISSET() returns true if the CPU cpu is a member of set. #define _GNU_SOURCE #include <sched.h> void CPU_ZERO(cpu_set_t *set); void CPU_SET(int cpu, cpu_set_t *set); void CPU_CLR(int cpu, cpu_set_t *set); int CPU_ISSET(int cpu, cpu_set_t *set); Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 24 / 58
  • 37. CPU Affinity Macros The process identified by pid runs on any CPU other than the first CPU of a four-processor system. cpu_set_t set; CPU_ZERO(&set); CPU_SET(1, &set); CPU_SET(2, &set); CPU_SET(3, &set); sched_setaffinity(pid, sizeof(set), &set); Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 25 / 58
  • 38. Real-Time CPU Scheduling Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 26 / 58
  • 39. Minimizing Latency When an event occurs, the system must respond to and service it as quickly as possible. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 27 / 58
  • 40. Minimizing Latency When an event occurs, the system must respond to and service it as quickly as possible. Event latency: the amount of time that elapses from when an event occurs to when it is serviced. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 27 / 58
  • 41. Soft vs. Hard Real-Time Soft real-time • No guarantee as to when a critical real-time process will be scheduled. • They guarantee only that the process will be given preference over noncritical processes. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 28 / 58
  • 42. Soft vs. Hard Real-Time Soft real-time • No guarantee as to when a critical real-time process will be scheduled. • They guarantee only that the process will be given preference over noncritical processes. Hard real-time • The task must be serviced by its deadline. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 28 / 58
  • 43. Real-Time CPU Scheduling (1/2) Two types of latencies affect performance: 1 Interrupt latency: time from arrival of interrupt to start of routine that services interrupt. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 29 / 58
  • 44. Real-Time CPU Scheduling (1/2) Two types of latencies affect performance: 1 Interrupt latency: time from arrival of interrupt to start of routine that services interrupt. 2 Dispatch latency: time for schedule to take current process off CPU and switch to another. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 29 / 58
  • 45. Real-Time CPU Scheduling (2/2) Conflict phase of dispatch latency: 1 Preemption of any process running in kernel mode. 2 Release by low-priority process of resources needed by high-priority processes. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 30 / 58
  • 46. Periodic Processes Periodic processes require CPU at constant intervals. • Processing time t, deadline d, period p • 0 ≤ t ≤ d ≤ p • Rate of periodic task is 1 p Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 31 / 58
  • 47. Priority-Based Scheduling Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 32 / 58
  • 48. Priority-Based Scheduling For real-time scheduling, scheduler must support preemptive and priority-based scheduling. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 33 / 58
  • 49. Priority-Based Scheduling For real-time scheduling, scheduler must support preemptive and priority-based scheduling. Only guarantees soft real-time. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 33 / 58
  • 50. Priority-Based Scheduling For real-time scheduling, scheduler must support preemptive and priority-based scheduling. Only guarantees soft real-time. For hard real-time must also provide ability to meet deadlines. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 33 / 58
  • 51. Rate-Monotonic Scheduling Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 34 / 58
  • 52. Rate-Monotonic Scheduling A priority is assigned based on the inverse of its period. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 35 / 58
  • 53. Rate-Monotonic Scheduling A priority is assigned based on the inverse of its period. Shorter periods = higher priority Longer periods = lower priority Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 35 / 58
  • 54. Rate-Monotonic Scheduling A priority is assigned based on the inverse of its period. Shorter periods = higher priority Longer periods = lower priority Assign a higher priority to tasks that require the CPU more often. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 35 / 58
  • 55. Rate-Monotonic Example 1 (1/4) Two processes: P1 and P2 p1 = 50 and p2 = 100 t1 = 20 and t2 = 35 d1 = d2 = complete its CPU burst by the start of its next period Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 36 / 58
  • 56. Rate-Monotonic Example 1 (2/4) Is it possible to schedule these tasks so that each meets its deadlines? Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 37 / 58
  • 57. Rate-Monotonic Example 1 (2/4) Is it possible to schedule these tasks so that each meets its deadlines? Measure the CPU utilization: ti pi Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 37 / 58
  • 58. Rate-Monotonic Example 1 (2/4) Is it possible to schedule these tasks so that each meets its deadlines? Measure the CPU utilization: ti pi t1 p1 = 20 50 = 0.4 t2 p2 = 35 100 = 0.35 Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 37 / 58
  • 59. Rate-Monotonic Example 1 (2/4) Is it possible to schedule these tasks so that each meets its deadlines? Measure the CPU utilization: ti pi t1 p1 = 20 50 = 0.4 t2 p2 = 35 100 = 0.35 40% + 35% < 100% Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 37 / 58
  • 60. Rate-Monotonic Example 1 (3/4) Suppose we assign P2 a higher priority than P1. • P1 misses its deadline. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 38 / 58
  • 61. Rate-Monotonic Example 1 (4/4) Suppose we assign P1 a higher priority than P2. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 39 / 58
  • 62. Rate-Monotonic Example 2 (1/3) Two processes: P1 and P2 p1 = 50 and p2 = 80 t1 = 25 and t2 = 35 d1 = d2 = complete its CPU burst by the start of its next period Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 40 / 58
  • 63. Rate-Monotonic Example 2 (2/3) Is it possible to schedule these tasks so that each meets its deadlines? Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 41 / 58
  • 64. Rate-Monotonic Example 2 (2/3) Is it possible to schedule these tasks so that each meets its deadlines? t1 p1 = 25 50 = 0.5 t2 p2 = 35 80 = 0.44 50% + 44% < 100% Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 41 / 58
  • 65. Rate-Monotonic Example 2 (3/3) Suppose we assign P1 a higher priority than P2. • P2 misses its deadline. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 42 / 58
  • 66. Earliest-Deadline-First (EDF) Scheduling Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 43 / 58
  • 67. Earliest Deadline First Scheduling Priorities are assigned according to deadlines. The earlier the deadline, the higher the priority. The later the deadline, the lower the priority. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 44 / 58
  • 68. EDF Example (1/3) Two processes: P1 and P2 p1 = 50 and p2 = 80 t1 = 25 and t2 = 35 d1 = d2 = complete its CPU burst by the start of its next period Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 45 / 58
  • 69. EDF Example (2/3) Is it possible to schedule these tasks so that each meets its deadlines? Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 46 / 58
  • 70. EDF Example (2/3) Is it possible to schedule these tasks so that each meets its deadlines? t1 p1 = 25 50 = 0.5 t2 p2 = 35 80 = 0.44 50% + 44% < 100% Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 46 / 58
  • 71. EDF Example (3/3) Suppose we assign P1 a higher priority than P2. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 47 / 58
  • 72. Proportional Share Scheduling Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 48 / 58
  • 73. Proportional Share Scheduling T shares are allocated among all processes in the system. An application receives N shares where N < T. This ensures each application will receive N T of the total processor time. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 49 / 58
  • 74. Proportional Share Example Three processes: P1, P2, and P3 T = 100 P1 is assigned 50, P2 is assigned 15, and P3 is assigned 20. P1 will have 50% of total processor time, P2 will have 15%, and P3 will have 20%. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 50 / 58
  • 75. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 51 / 58
  • 76. POSIX Real-Time Scheduling API provides functions for managing real-time threads/processes: Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 52 / 58
  • 77. POSIX Real-Time Scheduling API provides functions for managing real-time threads/processes: Defines two scheduling classes for real-time threads: 1 SCHED FIFO: scheduled using a FCFS strategy with a FIFO queue. There is no time-slicing for threads/processes of equal priority. 2 SCHED RR: similar to SCHED FIFO except time-slicing occurs for threads/processes of equal priority. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 52 / 58
  • 78. Setting the Linux Scheduling Policy sched getscheduler() and sched setscheduler() manipulate the scheduling policy. #include <sched.h> struct sched_param { /* ... */ int sched_priority; /* ... */ }; int sched_getscheduler(pid_t pid); int sched_setscheduler(pid_t pid, int policy, const struct sched_param *sp); Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 53 / 58
  • 79. Get Priority int policy; /* get our scheduling policy */ policy = sched_getscheduler(0); switch(policy) { case SCHED_OTHER: printf("Policy is normaln"); break; case SCHED_RR: printf("Policy is round-robinn"); break; case SCHED_FIFO: printf("Policy is first-in, first-outn"); break; case -1: perror("sched_getscheduler"); break; default: fprintf(stderr, "Unknown policy!n"); } Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 54 / 58
  • 80. Set Priority struct sched_param sp = { .sched_priority = 1 }; int ret; ret = sched_setscheduler(0, SCHED_RR, &sp); if (ret == -1) { perror("sched_setscheduler"); return 1; } Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 55 / 58
  • 81. Summary Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 56 / 58
  • 82. Summary Thread scheduling: PCS and SCS Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 57 / 58
  • 83. Summary Thread scheduling: PCS and SCS Multi-processor scheduling: SMP, processor affinity, load balancing Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 57 / 58
  • 84. Summary Thread scheduling: PCS and SCS Multi-processor scheduling: SMP, processor affinity, load balancing Real-time scheduling: soft and hard real times Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 57 / 58
  • 85. Summary Thread scheduling: PCS and SCS Multi-processor scheduling: SMP, processor affinity, load balancing Real-time scheduling: soft and hard real times Real-time scheduling algorithms • Priority-based • Rate-monotonic • Earliest-deadline-first • Proportional share scheduling Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 57 / 58
  • 86. Questions? Acknowledgements Some slides were derived from Avi Silberschatz slides. Amir H. Payberah (Tehran Polytechnic) CPU Scheduling 1393/7/28 58 / 58