Db32637643

Ali Mehri, DaryooshNazarpour/ International Journal of Engineering Research and
Applications (IJERA) ISSN: 2248-9622 www.ijera.com
Vol. 3, Issue 2, March -April 2013, pp.637-643

Harmonic Compensation and Load Balancing Using Cascaded H-
bridge Multilevel Inverter in High Voltage Systems

Ali Mehri*, DaryooshNazarpour**
*(Department of Electrical Engineering, University of Urmia, Urmia-IRAN)
** (Department of Electrical Engineering, University of Urmia, Urmia-IRAN)

ABSTRACT
This paper presents detailed modeling Passive filters are used for harmonic
and simulation of a compensator for Load mitigation due to their advantages of simplicity, low
balancing and harmonics Compensation based on cost and easy maintenance. But passive LC filters for
a five-level cascaded H-bridge multilevel voltage reducing the current harmonic pollution are
source inverter. This type of compensator, which ineffective, because those are large in size, resonate
is installed in parallel with the load, is usually with the supply impedance, have ageing and tuning
referred to as the shunt active power filters (APF). problems and the filtering characteristics are
Nowadays use of high voltage non-linear loads are dependent on the source impedance which is not
widely used in industrial and commercial exactly known [3].
applications and elimination of harmonics in HV To provide high power quality at the point of
system has become an important aspect. common coupling (PCC) of a distribution system,
Implementation of multilevel inverter (MLI) as active power filters are widely studied recently, for
compensatorin HV system eliminates use of bulky the compensation not only of current harmonics
and high cost transformer.The compensation produced by fluctuating loads, but also of reactive
process is based on concept of p-q theory, which is power and unbalance of non-linear and distorting
comprised of positive sequence voltage and loads[4],[5].
instantaneous real-power theory. The controller At low voltage levels, conventional two level
method successfully eliminates harmonics even the inverters are used. At medium voltage levels, the
supply voltage is distorted. The Phase Shifted conventional two level inverters either require
Carrier PWM (PSCPWM) technique is used to interface transformers between the inverter terminals
generate firing angles to cascaded H-bridge and the supply terminals or need active devices to be
multilevel inverter (CHBMLI) switches which connected in series to achieve the required voltage
reduces the individual device switching levels [6]. In this case, use of transformer for medium
frequency.The distribution network which or high voltage applications requires high VA rating
supplies mixed linear and non-linear loads and of transformer which results in high magnitude of
employing MLI is simulated by current on low voltage side and causes more losses.
MATLAB/SIMULINK software. The simulation The system becomes bulky and costly [7]. The
result validates the proposed control method in multilevel inverters are able to achieve the required
high voltage system. voltage levels using devices of low voltage rating.
Keywords-Load Balancing, Harmonic The use of MLI also eliminates the need of
Compensation, Multilevel Inverter, Active Power transformer to feed the power to HV system [8],[9].
Filter, Phase Shifted Carrier PWM, Instantaneous P- Three major kinds of multilevel inverters topologies
Q Theory, High Voltage Systems. are realized, namely, diode-clamped, flying-capacitor
clamped and cascaded h-bridge multilevel voltage
I. INTRODUCTION source inverter for generating smooth sinusoidal
Nowadays non-linear and fluctuating loads, voltage. The major advantages of the CHBMLI over
such as a diode/thyristor rectifiers, semi converters, the other two types are summarized as follows [10]:
arc furnaces, adjustable-speed drives, ac voltage
regulators, etc., are widely used in industrial and 1) Construction and maintenance cost of H-
commercial applications. These non-linear loads bridge is less.
create harmonic and distortion current in electrical 2) Requires a low number of components per
networks and have disadvantages such as: reducing level.
electric power quality, increasing the losses of the 3) Simple voltage balancing modulation.
distribution system and changing in power quality 4) Maximum output can be utilized from the DC
[1]. On the other hand this electric power delivered sources.
under conditions of unbalanced and non-sinusoidal 5) Possibility to implement soft-switching.
source voltage system [2].

637 | P a g e

For higher-level applications, voltage balance bridges are used per phase as shown in Fig.1. If the
control of diode-clamped converter shows no dc voltage of each cell is set to the same value
advantage with more than three DC capacitors, (Vdca1 = Vdca2 = E), then the resulting inverter can
because the problem of capacitors‟ voltage balance is operate with five output voltage levels. Table I.
complicated when the output level beyond four. shows the zero and positive voltage levels obtainable
Moreover the higher the level is, the more serious the from this inverter as well as the voltage levels from
unbalance is. Many researchers have done much the individual H-bridge cells [13].
work [11],[12] on this but no effective method
especially for topologies higher than five levels until Table I. output voltage of inverter for phase a
now. This is one of the main reasons that block its Vag = Vag1 + Vag2 Vag1 Vag2
industry application. E -E
In this paper, the configuration of compensator 0 0 0
based on five-levelcascaded H-bridge inverter
-E E
without using the transformer is presented. Then, the
proposed control technique for load balancing and E 0
E
harmonics compensation is discussed in detail. 0 E
This paper is organized as follows: Section II 2E E E
describes the MLI topology and modulation
strategies in part A, B separately. Section III includes
proposed controller method based on P-Q theory. B. Modulation
Section IV gives the simulation results and analysis The modulation technique used is based on
of five-level cascaded inverter simulation in two PSCPWMstrategy, In the phase shifted multicarrier
conditions. Finally, section V presents our modulation, all triangular carriers have same peak to
conclusions. peak amplitude and the same frequency but there is a
phase shift between any two adjacent carrier waves
of magnitude given by
II. BASIC OF CASCADED MULTILEVEL
INVERTER 360°
𝛷 𝑐𝑟 = (1)
A. Topology of the Inverter 𝑚−1
Cascaded multilevel inverter is one of the Wherem is the voltage levels of MLI. Gate
most important topology in the family of multilevel signals are generated by comparing the modulating
inverters. Multilevel inverters do not need a coupling wave with the carrier waves. In this PWM method
transformer to interface it with high power system. A the equivalent switching frequency of the whole
five level cascaded H-bridge inverter at the high converter is (m-1)times as the each power device
voltage level has been considered and is operated at a switching frequency. This means PSCPWM can
carrier frequency of 3 KHz. The system configuration achieve a high equivalent switching frequency effect
is shown in Figure 1. at very low real device switching frequency which is
most useful in high power applications [13]. The
Linear &
non-linear carrier 1 and carrier 2 are used to generate gating for
Load the upper switches in left legs of power cells H1 and
3-phase H2 in Fig. 1 respectively. The carrier 1 and carrier 2
ac mains
are two triangular carrier waves shifted by 90° from
each other. The inverted signals are used for upper
Vdc a1

Vdc c1
Vdc b1

+ + +
Vag1
- -
Vbg1 -
Vcg1 switches in the right legs. The gate signals for all
lower switches operate in a complementary manner
with respect to their corresponding upper switches.
Vdc b2

Vdc c2

+ + +
Vdc a2

Vag2 Vbg2
-
Vcg2
- -

Phase A Phase B g Phase C

Fig. 1. Cascaded Multilevel Inverter

The cascaded multilevel inverter used here
composed of six H-bridges and six dc capacitors. It is
connected to the power system in parallel. The
number of output phase voltage levels in a
cascadedinverter is given asm = 2s + 1, where s is
the number ofseparate dc sources and m is the Fig 2. Gating Signal Generation by PSCPWM
inverter level. To obtain 5-level output, two H-

638 | P a g e

Fig. 2 gives the block diagram to generate the  1 1 
1    v a 
2
gating signals,wheremodulating signal is MLI
v   2 2  
reference current and is compared with carrier 1 and     vb (2)
2. The advantage of PSCPWM that the v   3 3  3 
0 v c 
 
semiconductor device can be used at comparatively  2 2 
low switching frequency so that switching loss is An integrated circuit with a VCO chip (PLL
reduced greatly [13],[14]. circuit) should determine accurately the fundamental
frequency(𝑓𝑣 +) of the system voltage, subsequently,
PLL-circuit produced auxiliary signals i   and i   .
These currents used to calculate the auxiliary powers
p  and q  follows as
p   v  i   v  i   (3)
Similarly, the instantaneous reactive power is defined
as
q   v  i   v  i   (4)

Using a first order Low Pass Filter (LPF), the
Fig 3. Control block diagram for reference current
generation average 𝑝′ and 𝑞′ powers are composed onlyfrom the
fundamental positive sequence voltage, since the
auxiliary currents are also composed only from a
III. PROPOSED CONTROLLER BASED ON P-Q fundamental positive sequence component. The
THEORY
The control block diagram Based Onp-q instantaneous voltagesv   andv   it can be derived
theory for the three phases MLI is shown in Fig. as
3.The sinusoidal and immediately extraction control
strategy is applied to extract the reference current or v   1 i 
i     p 
      (5)
fundamental components from the distorted line v   (i   ) 2  (i   ) 2 i  
current. This proposed controller is comprised of    i     q  
   
positive sequence voltage detector and real-power Finally, the instantaneous three-phase voltages
theory concept. Fundamentals of this theory were   
values (v a ,v b ,v c ) of the fundamental positive
reported in [15] and many other publications. This
postulate led to the formulation of the famous p-q sequence voltage, are determined by applying the
theory of reactive power. inverse Clarke transformation, it derived as
 
1 0 
v a    
  2  1 3  v   
v b   3  2  
2  v   (6)
v c      
 
 1  3 
2
 2 
The positive sequence voltage detector
prepares good dynamic response and satisfactory
Fig 4.α-β coordinates transformation even under unbalanced or distorted voltage source
conditions.
The p-q theory is based on the α-β
transformation, also known as the Clarke
transformation. With considering Fig. 4, for simple
calculation, the three-phase voltages and currents are
considered only, excluding zero-sequence
components.
The positive-sequence voltage detector
consists of PLL circuit and instantaneous real-power
calculation is shown in fig. 5. The balanced or
distorted voltage sources are transformed into the α-β
coordinates using Clarke transformation Fig. 5. Block diagram of the fundamental positive-
sequence voltage detector.

639 | P a g e

After producing positive sequence of voltage, proposed controller calculates only the real-power
reference current generation is obtained. According losses [8]. The α – β coordinatecurrents i cα , i cβ are
to Fig. 4, the instantaneous space vector voltage and
currentv a , i a are set on the a-axis,v b , i b are on the calculated from the v α , v β voltages with

b-axis, and v c , i c are on the c-axis. These space instantaneous real power ( p ) only and the
instantaneous reactive power is set to zero. This
vectors are easily transformed into α-β stationary. It
approach reduces the calculations and implements
consists in a real matrix to transform measured three-
better than the conventional methods; the
phase source voltages (v a , v b ,v c ) andsource compensating currents α – β coordinate are derived
by using equation
currents ( i a , i b , i c ) into the α-β stationary reference
frame as shown in (7) and (8). i c   1 v  v   p
  2 v v    0 
(12)
i c   v   v 
2
     
1 1 1 
v a 
v   2 2 2   Finally, The compensation current references
v     vb (7)
  3 3  3  in the α −β coordinates are then transformed back
0 v c 
 
2 
into the a-b-c coordinates through the inverse
 2  simplified Clarke transformation as given by:
1 1 1   
i a 
i   2 2 2   1 0 
i     ib (8)  i sa *   
  3 3  3   * 2  1 3  i c 
i c 
0
 2 2 
  i sb   3 2
 
2  i c  
(13)
 i sc *   
Conventional instantaneous real-powerfor three-  
phase circuit can be defined as  1  3 
2
 2 
𝑝 𝑎𝑐 = 𝑣 𝛼 𝑖 𝛼 + 𝑣 𝛽 𝑖 𝛽 (9) These reference currents are subjected to a
PSCPWM in order to generate the switching pattern
The instantaneous real-power (𝑝 𝑎𝑐 ) is passing for IGBT switches of MLI. The reference current
through Butterworth design based LPF. The LPF cut- waveforms and the six triangular carrier waveforms
off frequency 50 Hz that allows only the fundamental are compared to generate the PSCPWM signals for a
signal to the active power section that calculates the five-level CHBMLI.
AC components of the real-power losses.
The DC-power loss is calculated from the IV. SIMULATION RESULTS
comparison of the dc-side voltage of the cascaded The operation of cascade multilevel inverter
multilevel inverter and desired reference voltage. The for APF is evaluated by simulating the proposed
proportional integral-controller [𝐾 𝑝 = 1, 𝐾 𝑖 = 163,] scheme in MATLAB Simulink. Three phase
is determining the dynamic response and settling time uncontrolled converter with R-L elements towards
of the dc-side voltage. The DC component power their dc-side is used as non-linear load. Table II
losses can be written as shows the simulation parameters.
 k 
pDC(loss)  v DC ref  v DC   k p  i  (10) Table II.System parameters
 s 
AC Source Line Voltage 25 k
Frequency 50 Hz
The instantaneous real-power (p) is calculated Source Inductor 0.5 mH
from the AC component real-power losses and the
Source Resistance 0.6 Ω
DC component power losses)PDC(Loss)(. It can be
AC side Filter Inductance 10 mH
defined as follows
DC Capacitor 5000 μF
p  pac  pDC (loss ) (11) Carrier Frequency 3 KHz

The AC and DC component of the The source-current detection control method by
instantaneous real power p is related to the harmonic detecting the current through section III is adopted in
compensation currents. The instantaneous current on MLI. The performance of the APF is analyzed under
various operating conditions via sinusoidal and
theα – β stationaryof i cα , i c are divided into two
β distorted voltage source with load perturbation.
kinds of instantaneous current components: real- Simulation waveforms of the combined system in
power losses and reactive-power losses, but this two cases are given as below.

640 | P a g e

A. Sinusoidal Voltage Source Condition 1000

source currents [ A ]
In this case three-phase balanced sinusoidal
500
voltages supplying to three phase uncontrolled
converter withR-L elements towards their dc-side as 0

non-linear load. Three-phase source voltages, -500
unbalanced non-linear load currents, 1-phase
compensation current of MLI and source currents -1000
0.4 0.41 0.42 0.43 0.44 0.45
after compensation are shown in Fig. 6. A three- time [ sec ]

phase non-linear load with a resistor and an Fig. 7. Waveforms of source current before
inductance runs at first. Thus the load current compensation in distorted supply voltage condition.
includes harmonic current and inductance reactive
current. The five-level inverter generates the distorted The harmonic spectrum and THD of source
injecting current to compensate the distorted current currents before and after compensation are shown in
which 1-phase of that as shown in Fig. 6 (c). Similar Fig. 8. As observed the source current THD is
current but with 120° phase shift is injected by legs successfully minimized to 2.14 % as compared to the
„b‟ and „c‟ of the MLI into phases „b‟ and „c‟ of the result before compensation which is 21.81 %.
distribution system. The three phase source currents THD= 21.81%
40
after compensation is shown in Fig. 6(d) which is

Mag (% of Fundamental)
perfectly balanced and in-phase with the respective 30

voltages. (a) 20
4
x 10
4 10
source voltages [ V ]

2 0
0 5 10 15 20 25 30 35 40 45 50
Harmonic order
0
(a)
-2 THD= 2.14%
5

-4
0.4 0.41 0.42 0.43 0.44 0.45 4
time [ sec ]
3
(b) 2

1
load currents [ A ]

500
0
0 5 10 15 20 25 30 35 40 45 50
Harmonic order
0
(b) Fig. 8 Order of harmonics of source currents
-500
without (a) and with (b) five level cascaded h-bridge
0.4 0.41 0.42 0.43 0.44 0.45 inverter in sinusoidal voltage source condition.
time [ sec ]

200 B. distorted Voltage Source Condition
1-phase compensation

In order to get a non-sinusoidal voltage for
current of MLI [ A ]

100
simulation study a 3rd and 5th harmonic voltage
0 source is added in series with phase „a‟, „b‟ and phase
(c)
-100 „c‟. The performance of MLI with p-q theory and
-200
distorted mains voltage is represented in Fig. 9. The
0.4 0.41 0.42
time [ sec ]
0.43 0.44 0.45
distorted mains voltage affects the calculation
accuracy of the reference current and there will be
1000 effective for harmonic compensation, which is shown
after compensation [ A ]

in Fig.9.
source currents

500
The load current is unbalanced and polluted
0
(d) with a harmonic distortion, since the load current
-500
wave shape in each phase is different with each other.
-1000
0.4 0.41 0.42 0.43 0.44 0.45
Compensated source currents are found to be
time [ sec ] sinusoidal and balanced after compensation. The
three-phase non-linear load currents before
Fig. 6. Waveforms of ideal mains voltage (a), load
compensation are shown in Fig 9 (b) that indicate that
current (b), 1-phase compensation current of MLI(c)
the source current is distorted or having harmonic
and source current after compensation (d) in
currents. 1-phase of distorted injecting current that
sinusoidal voltage source condition.
generated by MLI to compensate the distorted current
asshown in Fig. 6(c). For phase b and c this current is
Fig. 7 shows the three-phase source currents
injected but with 120° phase shift. The three-phase
before compensation. Fig. 6 (d) shows the three-
source current after compensation is shown in Fig 9
phase source current waveforms after the
(d) that indicates that the current is sinusoidal.
compensator run.

641 | P a g e

4
distorted source voltages [ V ]
4
x 10 produces harmonics in the source current with the
THD of 25.63% without MLI as given in the non-
2
sinusoidal waveform of the source current is shown
(a) 0
in Fig.11. By injecting the compensating current
-2 through the five-level cascaded H-bridge inverter the
-4
source current has become almost sinusoidal as
0.4 0.41 0.42
time [ sec ]
0.43 0.44 0.45
depicted in Fig. 9 (d) and the source current THD is
significantly reduced to 2.91 %.
500
load currents [ A ]

0
THD= 25.63%
(b)

40

30
-500

(a) 20
0.4 0.41 0.42 0.43 0.44 0.45
time [ sec ] 10
300
1-phase compensation

0
200 0 5 10 15 20 25 30 35 40 45 50
current of MLI [ A ]

Harmonic order
100

0
(c) -100
THD= 2.91%

-200
8
-300
0.4 0.41 0.42 0.43 0.44 0.45 6
time [ sec ] (b)
1000 4
after compensation [ A ]

2
source currents

500
0
0 5 10 15 20 25 30 35 40 45 50
0 Harmonic order
(d)
-500 Fig. 12 Order of harmonics of source currents
-1000 without and with five level cascaded H-bridgeinverter
0.4 0.41 0.42 0.43 0.44 0.45
time [ sec ] in sinusoidal voltage source condition.
Fig. 9. Waveforms of distorted supply voltage (a),
load current (b), 1-phase compensation current of FFT analysis indicates that MLI with proposed
MLI (c) and source current after compensation (d) in controller method brings down the THD of the source
distorted voltage source condition current to be less than 5% in compliance with IEEE
519 and IEC 61000-3harmonic standards [16],[17].
In Fig.10 1-phase of line side AC voltage waveform Thus the simulation results prove that the proposed
of MLI is shown. controller method successfully compensates the
4000
harmonics even the mains voltage is non-sinusoidal
phase voltage of MLI [ V ]

and distorted.
2000

0
V. CONCLUSION
-2000
In this paper cascaded H-bridge multilevel
-4000
0.4 0.41 0.42 0.43 0.44 0.45 0.46 0.47 0.48 0.49 0.5
inverter based APF is implemented in distribution
time [ sec ] system. This eliminates need of high cost transformer
Fig.10 Phase voltage of MLI with MLIin high voltage systems. Cascade type
inverter has certain advantages as compared with
Fig. 11 shows the three-phase source currents other types. Positive sequence voltage detector and
before compensation in distorted voltage source instantaneous real-power theoryis used to generate
condition. The three-phase source current waveforms reference currents of APF. The Phase Shifted Carrier
after the MLI is connected are shown in Fig. 9 (d). PWM method reduces individual device switching
1000
frequency despite high frequency output of the
source currents [ A ]

500 converter. Simulated results validate that the
0 cascaded multi-level inverter based APF can
-500
compensate harmonics without use of transformer in
high voltage system. It can be concluded that the
-1000
0.4 0.41 0.42 0.43 0.44 0.45 proposed technique is best suited for load
time [ sec ]
compensation under unbalanced load, distorted and
Fig.11. Waveforms of source current before
unbalanced supply voltage conditions. Total
compensation in distorted supply voltage condition.
Harmonic Distortion of the source currenthas been
The FFT analyses of source currents before reduced from a high value to an allowable limit
and after compensation are shown in Fig. 12. This tomeet IEEE 519 and IEC 61000-3harmonic

642 | P a g e

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Miyamoto, etc., “Fundamental Characteristics
of Five-Level Double Converters With

643 | P a g e

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