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Shicheng Guo
Shicheng.guo@gmail.com | (224) 735-1195
3850 Ingraham St. Apt 1-302. San Diego, CA. 92109
Citizenship: U.S. Citizen | Clearance: Secret
Purpose
Seeking a hardware or systems engineering position to enhance my technical background and leadership skills, and leverage
them for the long term benefit of the Company.
Skills
- Systems skills: Familiar with the design, integration, and test of complex systems.Experienced with element design,
requirements handling, systems analysis, modeling and simulation, and both low and high level I&T. Very
knowledgeable of core Systems Engineering principles, practices, and technologies.
- Hardware skills: Experienced with the design,verification, synthesis,and layout of both digital and analog systems
(ASICs, FPGAs, SOCs, microcontrollers, PCBs). Very knowledgeable in several areas of computer architecture, such as
pipelined and multicore microprocessor design,memory arbitration and coherency, compiler design,networking, and
virtual. Fluent in VHDL, Verilog, and various FPGA specific programming languages.
- Software skills: Experienced in the theory, design,and implementation of compilers. Also fluent in Assembly, C, C++,
HTML, Java, Javascript, Matlab, Perl, Python, Ruby, various Shell, and Visual Basic.
- Bilingual. Fluent in English and Mandarin Chinese.
Work Experience
Lockheed Martin
Title: Engineering Leadership Development Program, Rotary and Mission Systems June 2013– Present
- SPY AAW
o Supported low and high level integration, test,and verification of multiple agile baselines.
o One of the primary POCs for functional area regression,TPMs, and MEIT support/analysis.
o One of the primary POCs for TOR/CPCR adjudication/verification. Collaborated with both systems and
software engineers for issue investigations and solutions.
o Led or supported multiple test events and corresponding post mission analysis.
o Interfaced with and trained multiple external customers and systemusers,both foreign and domestic.
- BMD 5.0CU MEIT
o Supported high level integration, test,and verification of multiple baselines.
o Troubleshooted and interfaced with all elements to resolve issues found during testing.
o Interfaced with multiple customers and systemusers,both foreign and domestic.
- BMD 5.1 CND
o Supported the multi-phased design,analysis, and verification of several design areas within BMD 5.1
CND. Main POC for Track Ranking and Cued Acquisition.
o Responsible for several areas of I&T, such as regression,ETnE, and MEIT support/analysis. Primary POC
for all CND MEIT issues,and several areas of tactical code testing with MSE.
o Supported and presented at critical program milestones which require interfacing with external customers,
such as design disclosures and program reviews.
Advanced Micro Devices
Title: Co-op Engineer, ATaC – SLT and Fusing Solutions May 2010 – August 2012
- Edited and ran test flows with various operating conditions to find fail points. Analyzed failure data to pinpoint
problems and recommend solutions.
- Wrote scripts to automate a variety of tasks,including device testing,data processing,and validation.
- Traveled with University Relations team to recruit new hires/interns at several universities.
Education
Cornell University (Ithaca, NY.) August 2015 – Present
GPA: 3.70/4.0 base.Major: MS Systems Engineering
Purdue University (West Lafayette, IN.) August 2008 – May 2013
GPA: 3.01/4.0 base.Major: BS Computer Engineering. Minors: Mathematics, Chinese.
References available upon request.

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Shicheng Guo Resume 2016

  • 1. Shicheng Guo Shicheng.guo@gmail.com | (224) 735-1195 3850 Ingraham St. Apt 1-302. San Diego, CA. 92109 Citizenship: U.S. Citizen | Clearance: Secret Purpose Seeking a hardware or systems engineering position to enhance my technical background and leadership skills, and leverage them for the long term benefit of the Company. Skills - Systems skills: Familiar with the design, integration, and test of complex systems.Experienced with element design, requirements handling, systems analysis, modeling and simulation, and both low and high level I&T. Very knowledgeable of core Systems Engineering principles, practices, and technologies. - Hardware skills: Experienced with the design,verification, synthesis,and layout of both digital and analog systems (ASICs, FPGAs, SOCs, microcontrollers, PCBs). Very knowledgeable in several areas of computer architecture, such as pipelined and multicore microprocessor design,memory arbitration and coherency, compiler design,networking, and virtual. Fluent in VHDL, Verilog, and various FPGA specific programming languages. - Software skills: Experienced in the theory, design,and implementation of compilers. Also fluent in Assembly, C, C++, HTML, Java, Javascript, Matlab, Perl, Python, Ruby, various Shell, and Visual Basic. - Bilingual. Fluent in English and Mandarin Chinese. Work Experience Lockheed Martin Title: Engineering Leadership Development Program, Rotary and Mission Systems June 2013– Present - SPY AAW o Supported low and high level integration, test,and verification of multiple agile baselines. o One of the primary POCs for functional area regression,TPMs, and MEIT support/analysis. o One of the primary POCs for TOR/CPCR adjudication/verification. Collaborated with both systems and software engineers for issue investigations and solutions. o Led or supported multiple test events and corresponding post mission analysis. o Interfaced with and trained multiple external customers and systemusers,both foreign and domestic. - BMD 5.0CU MEIT o Supported high level integration, test,and verification of multiple baselines. o Troubleshooted and interfaced with all elements to resolve issues found during testing. o Interfaced with multiple customers and systemusers,both foreign and domestic. - BMD 5.1 CND o Supported the multi-phased design,analysis, and verification of several design areas within BMD 5.1 CND. Main POC for Track Ranking and Cued Acquisition. o Responsible for several areas of I&T, such as regression,ETnE, and MEIT support/analysis. Primary POC for all CND MEIT issues,and several areas of tactical code testing with MSE. o Supported and presented at critical program milestones which require interfacing with external customers, such as design disclosures and program reviews. Advanced Micro Devices Title: Co-op Engineer, ATaC – SLT and Fusing Solutions May 2010 – August 2012 - Edited and ran test flows with various operating conditions to find fail points. Analyzed failure data to pinpoint problems and recommend solutions. - Wrote scripts to automate a variety of tasks,including device testing,data processing,and validation. - Traveled with University Relations team to recruit new hires/interns at several universities. Education Cornell University (Ithaca, NY.) August 2015 – Present GPA: 3.70/4.0 base.Major: MS Systems Engineering Purdue University (West Lafayette, IN.) August 2008 – May 2013 GPA: 3.01/4.0 base.Major: BS Computer Engineering. Minors: Mathematics, Chinese. References available upon request.