This document is a curriculum vitae for Iliyas H. Bagwan. It summarizes his personal details, educational qualifications, professional experience, computer skills, and areas of interest. He has a M.B.S. in Human Resource Management from Pune University and over 10 years of experience as a Purchase and Technical Assistant at an Institute of Management in Pune. His skills include computer hardware, networking, Microsoft Office, and programming languages like C and C++. He is interested in careers in human resources, information technology, production, engineering, and education sectors.
Looking for an Opportunity Hospitality Kashif Khan
i really need job in Hotel Industry but I am fresher person i have no experience in Hospitality Industry, but i am looking for a job or In internship your organization hospitality industry.
I wish to apply for the same and enclosing herewith my complete CV for your kind and favorable consideration.
I hope if given me a chance for the job, I will put up decent efforts to my duties to the honest and hard work to come up to your expectations.
Thanking you and awaiting for an early favorable response.
Sincerely yours,
[KASHIF ALI KHAN]
Looking for an Opportunity Hospitality Kashif Khan
i really need job in Hotel Industry but I am fresher person i have no experience in Hospitality Industry, but i am looking for a job or In internship your organization hospitality industry.
I wish to apply for the same and enclosing herewith my complete CV for your kind and favorable consideration.
I hope if given me a chance for the job, I will put up decent efforts to my duties to the honest and hard work to come up to your expectations.
Thanking you and awaiting for an early favorable response.
Sincerely yours,
[KASHIF ALI KHAN]
Brian Pulliam represented BDPA Cincinnati chapter at the 12th Annual Information Technology Showcase held during the 2014 National BDPA Technology Conference.
Counter based design of dpll for wireless communicationeSAT Journals
Abstract For proper reception of the transmitted data, the design of effective demodulation schemes plays a very crucial role. In the earlier times, some of the traditional techniques like envelope detection etc were utilized for demodulation purposes. However, these techniques, although could be implemented without much difficulty, but at times, when the extent of interference due to the surroundings, system noise and other degrading parameters were very significant, these traditional techniques were found to be non-sensitive to these large-scale effects. To overcome these shortcomings, over the years, the device called phase locked loop has gained much popularity. This device, having the capacity to recover the phase of the transmitted pulse, is capable of yielding very accurate approximations of the transmitted pulses and thus accounts for very low values of bit error rates. Considering the utility of the device, in the recent times, it has been attempted to provide a sound digital design for the device so that the design complexity of the device could be overcome by replacing its integral parts with simplified digital circuits and also would improve the noise performance of the device. With this view in mind, in this piece, we put forward a design of the Digital Phase Locked Loop (DPLL) using a counter based logic. Here, the essential components of the DPLL have been implemented using logic circuits and counters and further, while doing so, the requirement of the components of a traditional PLL has also been minimized.
Brian Pulliam represented BDPA Cincinnati chapter at the 12th Annual Information Technology Showcase held during the 2014 National BDPA Technology Conference.
Counter based design of dpll for wireless communicationeSAT Journals
Abstract For proper reception of the transmitted data, the design of effective demodulation schemes plays a very crucial role. In the earlier times, some of the traditional techniques like envelope detection etc were utilized for demodulation purposes. However, these techniques, although could be implemented without much difficulty, but at times, when the extent of interference due to the surroundings, system noise and other degrading parameters were very significant, these traditional techniques were found to be non-sensitive to these large-scale effects. To overcome these shortcomings, over the years, the device called phase locked loop has gained much popularity. This device, having the capacity to recover the phase of the transmitted pulse, is capable of yielding very accurate approximations of the transmitted pulses and thus accounts for very low values of bit error rates. Considering the utility of the device, in the recent times, it has been attempted to provide a sound digital design for the device so that the design complexity of the device could be overcome by replacing its integral parts with simplified digital circuits and also would improve the noise performance of the device. With this view in mind, in this piece, we put forward a design of the Digital Phase Locked Loop (DPLL) using a counter based logic. Here, the essential components of the DPLL have been implemented using logic circuits and counters and further, while doing so, the requirement of the components of a traditional PLL has also been minimized.
automatic ascertarining end-point titrator is the end point indication instrument which inspects the content of medicine according to the ascertaining eng point titrimetry regulated in Chinese codex. It isequipped with handtailor exact measuring pump and three-way crossover valve. It can absorb and shot liquid automatically, measure the end-point automatically, and show standard liquid dosage by LED digital display.
Avoiding packet loss in gateway reallocation in mobile wimax networkseSAT Journals
Abstract Gateway reallocation algorithms are proposed to increase the capacity of WiMAX networks to serve more users. But most of the proposed solutions don’t consider the momentary packet loss occurring during the reallocation process. This momentary packet loss can also affect the application quality of service. In this work, I propose an efficient adaptive buffering strategy to avoid this packet loss in the network. Through simulation I prove that the approach is effective against momentary packet loss during the gateway reallocation process.
widely used in all kinds of materials and product research and development in chemical field,process optimization and new quality inspection, etc, mainly measuring heat-related physical and chemical changes, such as physical melting point, crystallization melting hot phase crystallization heat, heat, heat stability (oxidation induced phase), glass transition temperature, etc.
Targeting and challenging senior level assignments across function sectors of Research & Development, Training & Development with growth oriented organization.
1. Curriculum-vitae
ILIYAS H.BAGWAN
Flat no.14,ARU VIHAR,
Behind IBM SEZ,SP Infocity,
Nr Lord Ganpati Temple,
Fursungi Road,Bhekrai nagar
Pin: 412307
Mobile No. 9822295708
E-mail: iliyasbagwan@yahoo.com,
iliyasbagwan@gmail.com
Career Objective:
My main objective is to be in the process of learning and growing to enable my knowledge
and skills to the services of an organization. Intend to build a career with leading corporate of
hi-tech environment with committed and dedicated people, which will help me to explore
myself and fully realize my potential.
Brief Profile:
• Completed MASTER IN BUSINESS STUDIES(M.B.S) in Human Resource. from PUNE
University.
Educational Qualification:
Qualifications Year University Institution Class
M.B.S(H.R.M) 2011-
2012
PUNE L.K.PHATAK Institute of
Management
First
P.G.D.B.M
(H.R.M.)
2010 PUNE Raja Shivrai Pratishthan’s
Institute of Management
First
B.A.(Political
Sceince)
2008
2005
Tilak Maharashtra
Vidyapeeth
(Distance
Education)
Tilak Maharashtra
Vidyapeeth,Gultekdi,Pune.
Second
D.I.E.E. 1998 Board of Technical
Education,Mumbai
College of Engineering,
Malegaon,Baramati.
Higher
second
M.C.P 2009 Microsoft
Corporation.
HCL Education institute. first
2. Personal Details:
Contact No. : 9822295708.
Date of Birth : 25-05-1977
Gender : Male
Marital-Status : Married
Linguistic Proficiency : English, Hindi & Marathi
Family background : Mother,Sister,Wife,Doughters.
Computer Skill:
• Knowledge of Hardware & Networking.
Complete Assembling of PC
• Operating System – Windows server 2008 std/Microsoft vista/Windows 7.
Operating System Installation
Troubleshooting of Operating System.
• Package – Microsoft Office 2007, Office 2010, Microsoft Exchange Server.
• Languages known: Beginner in C.& C++
Network skill:
• Hub Switch & Router, Layer 3 Switch – Router Switch
• IP Addressing (IPV4), Sub netting, Static Routing
• Dynamic Routing Protocols, OSI Layers & IP Flow.
PROFESSIONAL EXPERIENCE:-
Purchase & Technical Assistant in Institute of Management
From year 2004 to till date.
Job roll :-
Maintain Technical Purchase stock,
Controlling Computer & Network activities with contract
engineer, Preparing reports regarding electrical and generator backup,
Preventive maintenance half yearly A.M.C. records,
Internet troubleshooting & call booking to ISP(follow-up),
Asset management includes (deadstock, write off, valuation)
User feedback regarding Technical difficulties, suggestion, and monitor
computer lab batches activities etc.
Practical training To M.C.M. courses.
3. Academic Projects:
• MOTIVATION MANAGEMENT IN MANUFACTURING INDUSTRY.(H.R.M.)
• OFFLINE U.P.S.(ENGINEERING)
.
Other activities:
• Participated in Central Assessment of paper (C.A.P).by Pune University .
• Organized Laptop Exhibition for All institute Of Maharshi karve Sanstha.
• Co-ordination to students for Inter college Activities like Dance competition, Seminars,
• Cultural events in Institute.
Area Of Interest : Human resource management Sector,
Information Technology sector,
Production & Engineering sector,
Education sector.
(ILIYAS H.BAGWAN)