1. Introduction Adders Multipliers Project Workflow
Design and Implementation of Arithmetic Units
With Xilinx FPGA
Prakhar Bahuguna
25th November 2013
Arithmetic Units Prakhar Bahuguna
3. Introduction Adders Multipliers Project Workflow
Overview
• Digital circuits designed to perform arithmetic operations
• Typically perform elementary mathematical operations, but
can be extended to complex operations
• Goal of minimising calculation delay while also minimising
power consumption and area usage
Arithmetic Units Prakhar Bahuguna
4. Introduction Adders Multipliers Project Workflow
Learning Objectives
• Design, implement and test different arithmetic units,
particularly adders and multipliers
• Implement various hardware algorithms used for these
operations
• Test and benchmark to evaluate correctness and performance
of designs
Arithmetic Units Prakhar Bahuguna
6. Introduction Adders Multipliers Project Workflow
Adders
• Perform binary addition on two
operands
• Calculation is done from right to
left, adding carry from previous
column
• Final result is known once all
columns have been added
Carry : 1 1
1 0 0 1
+ 0 0 1 1
1 1 0 0
n-bit operands give an
n-bit result, along with a
1-bit carry-out
Arithmetic Units Prakhar Bahuguna
7. Introduction Adders Multipliers Project Workflow
Ripple-carry Adder
Uses the simple method of addition.
B0 A 0
Full
Adder
Full
Adder
Full
Adder
Full
Adder
B3 A B2 A B1 A 123
c
S2
S3
S1
S0
in
Arithmetic Units Prakhar Bahuguna
8. Introduction Adders Multipliers Project Workflow
Ripple-carry Adder
Uses the simple method of addition.
B0 A 0
Full
Adder
Full
Adder
Full
Adder
Full
Adder
B3 A B2 A B1 A 123
c
S2
S3
S1
S0
in
• However, ripple-carry addition is slow!
• Calculating current column requires the carry from previous
column, which requires carry from previous column in turn. . .
• Various designs exist which try to overcome this issue
Arithmetic Units Prakhar Bahuguna
9. Introduction Adders Multipliers Project Workflow
Carry-lookahead Adder
Calculates the carry-in for the current column by looking ahead at
previous columns, determining generate/propagate for them.
B0 A 0
Full
Adder
Full
Adder
S0
S1
S2
S3
c1
B3 A B2 A B1 A 123
cin
Full
Adder
Full
Adder
Carry−lookahead Logic
P P0 GP GGP 01122G3 3
c3
c2
Arithmetic Units Prakhar Bahuguna
10. Introduction Adders Multipliers Project Workflow
Carry-lookahead Adder
Calculates the carry-in for the current column by looking ahead at
previous columns, determining generate/propagate for them.
B0 A 0
Full
Adder
Full
Adder
S0
S1
S2
S3
c1
B3 A B2 A B1 A 123
cin
Full
Adder
Full
Adder
Carry−lookahead Logic
P P0 GP GGP 01122G3 3
c3
c2
Advantages
• Very fast
• All columns ready within
roughly the same time
Disadvantages
• Becomes too large for wide
adders
• Large fan-in for lookahead
logic
Arithmetic Units Prakhar Bahuguna
11. Introduction Adders Multipliers Project Workflow
Carry-select Adder
The carry-select adder uses a chain of small ripple-carry adders,
but pre-computes the result with both possible carry-ins. The
result is selected from the carry-in from the previous block.
S[3:0]
A[3:0]B[3:0]
cin
Adder
Ripple−carry
0
Adder
Ripple−carry
1
Adder
Ripple−carry
A[7:4]B[7:4]
A[7:4]B[7:4]
S[7:4]
cout
S[7:4] S[7:4]
1
1
0cout
0
Arithmetic Units Prakhar Bahuguna
12. Introduction Adders Multipliers Project Workflow
Carry-select Adder
The carry-select adder uses a chain of small ripple-carry adders,
but pre-computes the result with both possible carry-ins. The
result is selected from the carry-in from the previous block.
S[3:0]
A[3:0]B[3:0]
cin
Adder
Ripple−carry
0
Adder
Ripple−carry
1
Adder
Ripple−carry
A[7:4]B[7:4]
A[7:4]B[7:4]
S[7:4]
cout
S[7:4] S[7:4]
1
1
0cout
0
Advantages
• Requires less area than
carry-lookahead
• Still gives much better
performance than
ripple-carry
Disadvantages
• Doubles the area required
compared to ripple-carry
Arithmetic Units Prakhar Bahuguna
13. Introduction Adders Multipliers Project Workflow
Carry-skip Adder
If the current block propagates a carry, the carry-skip adder can
pass on the previous carry-in rather than waiting for the block’s
carry-out.
S[3:0]
A[3:0]B[3:0]
cin
S[7:4]
B[7:4] A[7:4]A[11:8]B[11:8]
S[11:8]
P[11:8] P[7:4]
Ripple−carry
Adder
Ripple−carry
Adder Adder
Ripple−carry
Arithmetic Units Prakhar Bahuguna
14. Introduction Adders Multipliers Project Workflow
Carry-skip Adder
If the current block propagates a carry, the carry-skip adder can
pass on the previous carry-in rather than waiting for the block’s
carry-out.
S[3:0]
A[3:0]B[3:0]
cin
S[7:4]
B[7:4] A[7:4]A[11:8]B[11:8]
S[11:8]
P[11:8] P[7:4]
Ripple−carry
Adder
Ripple−carry
Adder Adder
Ripple−carry
Advantages
• Only marginally larger than
ripple-carry
Disadvantages
• Performance depends on
operands
• Slightly worse than
ripple-carry in worst-case
Arithmetic Units Prakhar Bahuguna
16. Introduction Adders Multipliers Project Workflow
Overview of Multipliers
• Perform binary multiplication on
two operands
• Calculates partial product of each
column independently and apply a
shift
• Partial products are then summed
to produce the final product
0 1 0 1
× 0 0 1 1
0 1 0 1
0 1 0 1
0 0 0 0
+ 0 0 0 0
0 0 0 1 1 1 1
n-bit operands give a
2n-bit product
Arithmetic Units Prakhar Bahuguna
17. Introduction Adders Multipliers Project Workflow
Array Multiplier
Quickest, most straightforward approach is the array multiplier
with multiple adders placed in an array.
1
1
Retrieved from http://www.coertvonk.com/family/school/digital-logic-4245
Arithmetic Units Prakhar Bahuguna
18. Introduction Adders Multipliers Project Workflow
Array Multiplier
Quickest, most straightforward approach is the array multiplier
with multiple adders placed in an array.
Advantages
• Fast performance
• Simple, regular layout
Disadvantages
• Requires too much area and
power with wider operands
• n-bit array multiplier
requires n2 full adders
Arithmetic Units Prakhar Bahuguna
19. Introduction Adders Multipliers Project Workflow
Wallace-tree Multiplier
The Wallace-tree multiplier reduces the logic required by reducing
the partial products and grouping repeated wires.
Arithmetic Units Prakhar Bahuguna
20. Introduction Adders Multipliers Project Workflow
Wallace-tree Multiplier
The Wallace-tree multiplier reduces the logic required by reducing
the partial products and grouping repeated wires in the
multiplication.
Advantages
• Scales by log2n rather than
n2
• Slightly faster than the array
multiplier
Disadvantages
• Wire delays can be
significant
• Long wires can cause routing
issues, especially in FPGAs
Arithmetic Units Prakhar Bahuguna
22. Introduction Adders Multipliers Project Workflow
Design
2
• Arithmetic units written in Verilog,
some Python for automated code
generation
• Designed at gate level to avoid
logic optimisation by tools, but
allow for FPGA-level
place-and-route optimisations
• Each unit has 8-bit, 32-bit and
64-bit variants to analyse scaling of
units
• Xilinx ISE used for development
2
Retrieved from http://henryhermawan.blogspot.co.uk/2011/04/xilinx-ise-webpack-on-slackware64.html
Arithmetic Units Prakhar Bahuguna
23. Introduction Adders Multipliers Project Workflow
Simulation and Implementation
• Designs are tested against a test
bench to determine correctness of
results
• Simulation and synthesis is run to
estimate average gate delay, logic
slices/CLBs used and typical power
consumption
• Synthesised design downloaded
onto a Xilinx Virtex-7 FPGA
• Test data read/written via JTAG
port, power usage measured
physically
3
3
Retrieved from http://electronicdesign.com/dsps/fpga-kits-support-fmc-mezzanine-card-development
Arithmetic Units Prakhar Bahuguna
24. Introduction Adders Multipliers Project Workflow
Future Workplan
Evaluate
Design
Test
Implement
Arithmetic Units Prakhar Bahuguna
25. Introduction Adders Multipliers Project Workflow
Future Workplan
Evaluate
Design
Test
Implement
Tasks and Milestones
• Continue designing units,
focusing on multipliers - mid to
late December
• Test and implement designs on
physical hardware - early
February
• Explore extension activities such
as dividers or floating-point
units, depending on available
time - March
Arithmetic Units Prakhar Bahuguna
27. Introduction Adders Multipliers Project Workflow
Summary
• Arithmetic units allow for calculating mathematical operations
in hardware
• There are a variety of designs for implementing arithmetic
units, with their own trade-offs in performance, power
consumption and area
• The design chosen is highly dependant on the requirements
Arithmetic Units Prakhar Bahuguna
