This document is a resume for Nai-Chen Cheng. It summarizes his education, experience, skills, and interests. He received a Bachelor's and Master's degree in Electrical Engineering from National Cheng Kung University. Currently he is a project leader at ITRI working on an epiretinal stimulation ASIC and low power RF design. His interests include photography, classical music, and tennis.
⭐⭐⭐⭐⭐ #FPGA Based Meteorological Monitoring StationVictor Asanza
In this paper, we propose to implement a meteorological monitoring station using embedded systems. This model is possible thanks to different sensors that enable us to measure several environmental parameters, such as i) relative humidity, ii) average ambient temperature, iii) soil humidity, iv) rain occurrence, and v) light intensity. The proposed system is based on a field-programmable gate array device (FPGA). The proposed design aims at ensuring highresolution data acquisition and at predicting samples with precision and accuracy in real-time. To present the collected data, we develop also a web application with a simple and friendly user interface.
⭐ For more information visit our blog:
https://vasanza.blogspot.com/
⭐⭐⭐⭐⭐ #BCI System using a Novel Processing Technique Based on Electrodes Sele...Victor Asanza
This work proposes an end-to-end model architecture, from feature extraction to classification using an Artificial Neural Network. The feature extraction process starts from an initial set of signals acquired by electrodes of a Brain-Computer Interface (BCI). The proposed architecture includes the design and implementation of a functional six Degree-of-Freedom (DOF) prosthetic hand. A Field Programmable Gate Array (FPGA) translates electroencephalography (EEG) signals into movements in the prosthesis. We also propose a new technique for selecting and grouping electrodes, which is related to the motor intentions of the subject. We analyzed and predicted two imaginary motor-intention tasks: opening and closing both fists and flexing and extending both feet. The model implemented with the proposed architecture showed an accuracy of 93.7% and a classification time of 8.8y«s for the FPGA. These results present the feasibility to carry out BCI using machine learning techniques implemented in a FPGA card.
⭐ For more information visit our blog:
https://vasanza.blogspot.com/
⭐⭐⭐⭐⭐ Charla FIEC: #SSVEP_EEG Signal Classification based on #Emotiv EPOC #BC...Victor Asanza
Este trabajo presenta el diseño experimental para el registro de señales de electroencefalografía (EEG) en 20 sujetos sometidos a potenciales evocados visualmente en estado estable (SSVEP). Además, la implementación de un sistema de clasificación basado en las señales SSVEP-EEG de la región occipital del cerebro obtenidas con el dispositivo Emotiv EPOC.
⭐ For more information visit our blog:
https://vasanza.blogspot.com/
⭐⭐⭐⭐⭐ SSVEP-EEG Signal Classification based on Emotiv EPOC BCI and Raspberry PiVictor Asanza
This work presents the experimental design for recording Electroencephalography (EEG) signals in 20 test subjects submitted to Steady-state visually evoked potential (SSVEP). The stimuli were performed with frequencies of 7, 9, 11 and 13 Hz. Furthermore, the implementation of a classification system based on SSVEP-EEG signals from the occipital region of the brain obtained with the Emotiv EPOC device is presented. These data were used to train algorithms based on artificial intelligence in a Raspberry Pi 4 Model B. Finally, this work demonstrates the possibility of classifying with times of up to 1.8 ms in embedded systems with low computational capacity.
⭐ For more information visit our blog:
https://vasanza.blogspot.com/
Article Review on Simultanoeus Optical Stimulation and Electrical Recording f...Md Kafiul Islam
This is a comprehensive review of article titled "Integrated device for combined optical neuromodulation and electrical recording for chronic in vivo applications" by Wang et al. 2012, appeared in JNE. The presentation was made during my Comprehensive Qualifying Examination (CQE) back in Jan, 2013
⭐⭐⭐⭐⭐ #FPGA Based Meteorological Monitoring StationVictor Asanza
In this paper, we propose to implement a meteorological monitoring station using embedded systems. This model is possible thanks to different sensors that enable us to measure several environmental parameters, such as i) relative humidity, ii) average ambient temperature, iii) soil humidity, iv) rain occurrence, and v) light intensity. The proposed system is based on a field-programmable gate array device (FPGA). The proposed design aims at ensuring highresolution data acquisition and at predicting samples with precision and accuracy in real-time. To present the collected data, we develop also a web application with a simple and friendly user interface.
⭐ For more information visit our blog:
https://vasanza.blogspot.com/
⭐⭐⭐⭐⭐ #BCI System using a Novel Processing Technique Based on Electrodes Sele...Victor Asanza
This work proposes an end-to-end model architecture, from feature extraction to classification using an Artificial Neural Network. The feature extraction process starts from an initial set of signals acquired by electrodes of a Brain-Computer Interface (BCI). The proposed architecture includes the design and implementation of a functional six Degree-of-Freedom (DOF) prosthetic hand. A Field Programmable Gate Array (FPGA) translates electroencephalography (EEG) signals into movements in the prosthesis. We also propose a new technique for selecting and grouping electrodes, which is related to the motor intentions of the subject. We analyzed and predicted two imaginary motor-intention tasks: opening and closing both fists and flexing and extending both feet. The model implemented with the proposed architecture showed an accuracy of 93.7% and a classification time of 8.8y«s for the FPGA. These results present the feasibility to carry out BCI using machine learning techniques implemented in a FPGA card.
⭐ For more information visit our blog:
https://vasanza.blogspot.com/
⭐⭐⭐⭐⭐ Charla FIEC: #SSVEP_EEG Signal Classification based on #Emotiv EPOC #BC...Victor Asanza
Este trabajo presenta el diseño experimental para el registro de señales de electroencefalografía (EEG) en 20 sujetos sometidos a potenciales evocados visualmente en estado estable (SSVEP). Además, la implementación de un sistema de clasificación basado en las señales SSVEP-EEG de la región occipital del cerebro obtenidas con el dispositivo Emotiv EPOC.
⭐ For more information visit our blog:
https://vasanza.blogspot.com/
⭐⭐⭐⭐⭐ SSVEP-EEG Signal Classification based on Emotiv EPOC BCI and Raspberry PiVictor Asanza
This work presents the experimental design for recording Electroencephalography (EEG) signals in 20 test subjects submitted to Steady-state visually evoked potential (SSVEP). The stimuli were performed with frequencies of 7, 9, 11 and 13 Hz. Furthermore, the implementation of a classification system based on SSVEP-EEG signals from the occipital region of the brain obtained with the Emotiv EPOC device is presented. These data were used to train algorithms based on artificial intelligence in a Raspberry Pi 4 Model B. Finally, this work demonstrates the possibility of classifying with times of up to 1.8 ms in embedded systems with low computational capacity.
⭐ For more information visit our blog:
https://vasanza.blogspot.com/
Article Review on Simultanoeus Optical Stimulation and Electrical Recording f...Md Kafiul Islam
This is a comprehensive review of article titled "Integrated device for combined optical neuromodulation and electrical recording for chronic in vivo applications" by Wang et al. 2012, appeared in JNE. The presentation was made during my Comprehensive Qualifying Examination (CQE) back in Jan, 2013
Prezentacja towarzysząca warsztatowi Karola Tomaki "Nowoczesna biblioteka czy salon gier w bibliotece?" na trzecim ogólnopolskim kongresie bibliotek publicznych "Biblioteka z wizją", 11-12 października 2012 r.
Lacaita Andrea, Politecnico di Milano: collection of failures. 2 out of 2 pat...Blundering boffins exposed
Lacaita Andrea Leonardo, nato a Manduria, (Taranto) il 20.02.1962. Professore ordinario di elettronica al politecnico di Milano. Collezione di fallimenti: rigettate 2 su 2 domande di brevetto industriale. Non brevettabilità per palese mancanza di novità.
Collection of failures. 2 out of 2 patent applications rejection due to clear lack of novelty.
Actual radar systems are built with high-power transmitters and receivers, huge antennae, complex processing systems using digital signal processors and large displays.
The system can monitor an area of limited range and alerts authorities with a buzzer as an alarm. For this purpose we use a microcontroller circuit that is connected to an ultrasonic sensor mounted on a servo motor for monitoring.
This microcontroller based ultrasonic radar circuit demonstrates the working of a radar system. It uses ultrasonic waves to detect an object and measure its distance and displays the same on a 16*2 LCD screen.
Prezentacja towarzysząca warsztatowi Karola Tomaki "Nowoczesna biblioteka czy salon gier w bibliotece?" na trzecim ogólnopolskim kongresie bibliotek publicznych "Biblioteka z wizją", 11-12 października 2012 r.
Lacaita Andrea, Politecnico di Milano: collection of failures. 2 out of 2 pat...Blundering boffins exposed
Lacaita Andrea Leonardo, nato a Manduria, (Taranto) il 20.02.1962. Professore ordinario di elettronica al politecnico di Milano. Collezione di fallimenti: rigettate 2 su 2 domande di brevetto industriale. Non brevettabilità per palese mancanza di novità.
Collection of failures. 2 out of 2 patent applications rejection due to clear lack of novelty.
Actual radar systems are built with high-power transmitters and receivers, huge antennae, complex processing systems using digital signal processors and large displays.
The system can monitor an area of limited range and alerts authorities with a buzzer as an alarm. For this purpose we use a microcontroller circuit that is connected to an ultrasonic sensor mounted on a servo motor for monitoring.
This microcontroller based ultrasonic radar circuit demonstrates the working of a radar system. It uses ultrasonic waves to detect an object and measure its distance and displays the same on a 16*2 LCD screen.
(April 5, 2023) Webinar: Prodigy Open-Platform Research Ultrasound System Ov...Scintica Instrumentation
Overview:
In this webinar, we provided an overview of the Prodigy open-platform research ultrasound system. The Prodigy by S-Sharp is a flexible and powerful ultrasound platform enabling research in ultrasound imaging, high-intensity focused ultrasound (HIFU), non-destructive testing (NDT), and much more. Sold for many years as an OEM component of other systems (e.g., for photoacoustic imaging), this highly capable system is now available to laboratories and researchers around the world.
This compact, high-performance ultrasound system is optimized for a variety of engineering research applications. As an open platform research ultrasound system, the Prodigy allows almost every aspect of ultrasound generation and detection to be customized. This includes true arbitrary transmit waveforms, super-fast acquisition capabilities, rapid data transfer, and a software backend that allows for real-time access and processing of both raw and beamformed data.
Some highlights of the Prodigy include its capability for true arbitrary transmit waveforms by using linear amplifiers with digital-to-analog converters (DAC) and the availability of a graphic user interface for designing pulse sequences and adjusting transmit/receive parameters.
Learn the capabilities of this flexible system with peer-reviewed examples of its many possible applications.
Key Points:
In this project, main focus is to develop high power density and high efficiency converter with closed loop control for attaining load and line regulation. Complete converter was simulated in PSIM and implemented hardware in CEERI lab.
To the present day, the control of prosthetic mechanisms and the classification of surface EMG (sEMG) signals is heavily influenced by multiple factors, such as the overall quality of the signal acquired, the number and the position of electrodes, and unwanted noise or crosstalk between them. For this reason, the technological state-of-the-art is moving from the analysis of low-order features (e.g. Median Absolute Value and spectral features) that could suffer the aforementioned issues, to more complex techniques, such as Non-Negative Matrix Factorization (NMF) decomposition of signal channels. This technique hypothesizes a high-order modular control of muscles at the Central Nervous System (CNS) level built upon coordinated motor patterns (called muscle synergies), and it removes the limitations on Degrees-of-Freedom (DoF) per electrode given by standard sEMG controllers. Unfortunately, the utilisation of such techniques in prosthetics is limited by their computational complexity, which limits them to research laboratories and bulky processing systems.
The objective of this project is to create a FPGA-based, real-time NMF processor that extracts muscle synergies from a 8-electrode sEMG recording. In particular, the main focus of the work is to minimize the time required for the computation, without neglecting the power efficiency of the system, a fundamental requirement for any embedded device.
Class D Power Amplifier for Medical Applicationieijjournal
The objective of this research was to design a 2.4 GHz class AB Power Amplifier (PA), with 0.18um Semiconductor Manufacturing International Corporation (SMIC) CMOS technology by using Cadence software, for health care applications. The ultimate goal for such application is to minimize the trade-offs between performance and cost, and between performance and low power consumption design. This paper introduces the design of a 2.4GHz class D power amplifier which consists of two stage amplifiers. This power amplifier can transmit 15dBm output power to a 50Ω load. The power added efficiency was 50% and the total power consumption was 90.4 mW. The performance of the power amplifier meets the specification requirements of the desired.
1. 鄭乃禎
Nai-Chen Cheng
13F., No.126, Longshan W. Rd.,
East Dist., Hsinchu City 300,
Taiwan (R.O.C.)
0918347686
obewan18@gmail.com
EDUCATION
• National Cheng Kung university, Bachelor of Electrical Engineering,
1999.09~2003.6
• National Cheng Kung university, Master of Electrical Engineering, major in VLSI /
CAD, 2003.09~2005.6
- Advisor: Prof. Soon-Jyh Chang
- Thesis : On-Chip Low Jitter Clock Generation
EXPERIENCE IN ITRI
Project leader of Prothesis Epiretinal Stimulation ASIC (under cooking) — 2015-
Present
Coordinated with different research team, assisted to define reasonable system spec.,
and developed project
Project leader and researcher of low power RF design group — 2010-Present
Initiated several projects, clarified challenges and problems, co-worked for solutions,
and scheduled milestones.
As the Main Designer
- Low in-band noise digital frequency synthesizer design (on-going):
Investigated for a new architecture of a low in-band noise digital PLL
- A quantization noise elimination method for fractional-N frequency
synthesizers (2014-2015 spring) :
Proposing a new multi-phase method for eliminating quantization noise of a
fractional-N frequency synthesizer
- Low-cost temperature-compensated on-chip crystal-less oscillator
(2013):
By using a digital calibration method to compensate frequency-drift of a free-
running LC-VCO due to temperature variation. The frequency instability is less than
0.5% due to temperature variation.
2. As the Project Leader
- 2.4GHz low power wake up receivers with high sensitivity: identified system spec,
supervised for test-chip performance, and assisted for patent application
- Human body communication of IEEE 802.15.6: identified system spec, built
demonstration platform, recommended for circuit design, and supervised for overall
TRX performance
- Low power 2.4GHz frequency synthesizer: supervised test-chip performance,
assisted for patent application and paper presentation
★Honour : Outstanding research award of ITRI, 2013
★Contribution: 2 international conferences, 1 IEEE journal, 3 US patents.
Engineer of analog BIST — 2006-2009
Focusing on BIST (Built-in Self Test) research for on-chip clock jitter measurement.
Responsible for system level spec. definition, co-work with test-chip design, and final
evaluation. Challenges: measuring high-speed clock by BIST with pico-second
accuracy.
★Contribution: 3 international conferences, 1 internal journal, 2 US patents.
PATENTS AND PAPERS
- Patents:
1. Chih-Hsiang Chang, Nai-Chen Cheng, Yu Lee, Ching-Yuan Yang, “Current reuse
frequency divider and method thereof and voltage control oscillator module and phase-
locked loop using the same, “ US 8829966, 2014, Sep.
2. Yu-Lin Tsou, Nai-Chen Cheng, “Radio frequency front-end circuit and operation
method thereof,” US 8774744 B2, 2014, July
3. Chih-Hsiang Chang, Nai-Chen Cheng, Yu Lee, “Ching-Yuan YangVoltage-controlled
oscillator module and method for generating oscillator signals,” US 8723609 B2, 2014,
May
4. Yu Lee, Nai-Chen Cheng, Ji-Jan Chen, Yuan-Hua Chu, Ching-Yuan Yang, “Apparatus
for clock skew compensation,” US 8384455 B2, 2013, Feb.
5. Yu Lee, Nai-Chen Cheng, Ji-Jan Chen,”Jitter measuring system and method,”US
8144756 B2, 2012, March
- Journal:
- Yu Lin Tsou; Gong, C.-S.A.; Nai -Chen Cheng; Yu Lee; Jou, C.F., “Integrated Biosensing
Platform Based on a 1.74-mW −90-dBm Sensitivity Dual- Mode-Operation Receiver for
IEEE 802.15.6 Human Body Communication Standard, ” Sensors Journal, IEEE,
2015,Volume: 15, Issue: 6
- Conferences:
3. 1. Chih-Hsiang Chang; Ching-Yuan Yang; Yu Lee; Jun-Hong Weng; Nai-Chen Cheng, “A
3.4mW 2.3-to-2.7GHz frequency synthesizer in 0.18-µm CMOS,” ESSCIRC, 2013
2. Yu Lin Tsou; Cheng, N.-C.D.; Jou, C.F.,“A 32.4 μW RF front end for 2.4 GHz wake-up
receiver,” ISCAS, 2013
3. Yu Lee; Ching-Yuan Yang; Cheng, N.-C.D.; Ji-Jan Chen, “An embedded wide-range
and high-resolution CLOCK jitter measurement circuit,” Design, Automation & Test in
Europe Conference & Exhibition (DATE), 2010
4. Cheng, N.-C.D.; Yu Lee; Ji-Jan Chen,“Experimental Results of Built-In Jitter
Measurement for Gigahertz Clock,” Asian Test Symposium, 2008
5. Cheng, N.-C.D.; Yu Lee; Ji-Jan Chen,“A 2-ps Resolution Wide Range BIST Circuit for
Jitter Measurement,” Asian Test Symposium, 2007.
SKILLS
- Familiar tools: Spectre RF, HSPICE, laker, virtuoso, MATLAB, cppsim
- Languages: Fluent in English and Chinese, both for professional proficiency.
Japanese in elementary proficiency.
INTERESTS
- Photography, classical music, and tennis.
PROFILE
Born in Changhua, grown in country side, I was lucky enough to live in a happy
middle class family. My growing experience has strong impact on my personalities- to
be enthusiasm and positive on surroundings, no matter for work or for life, and to be
thankful to my companions, because they are always your greatest tutors. I also enjoy
communicate with people, either for chatting, negotiation, or teamwork. The best
motto for me is “ To be or not to be, that is the question”.