M.Tech Post Graduate with 4 years of Experience in Design and Testing. Have working knowledge on Signal processing MATLAB coding/Simulink.

1. ABHSIEK B G
CONTACT
Phone: +91 9731451969
Email: bgabhi@gmail.com
LinkedIn: /in/abhishek-b-g-bb595469
LANGUAGES Known
ENGLISH
KANNADA
HINDI
CORE SKILLS
MATLAB/Simulink
ORCAD/CADSTAR
FPGA/DSP
ZUKEN E3
Visual basic
ABOUT ME
I am currently working in Trident info sol Pvt Ltd, as a Design
Engineer. I have completed my M.Tech in Digital Communication and
I am passionate about embedded software, hardware design &
Electrical system design. I also like to work on Signal processing
MATLAB/Simulink.
I would like to work with reputed organization in a position where I
can develop new ideas and utilize my versatile skill set, add demanded
value to the organization.
EDUCATION
13-15 MASTERS OF TECHNOLOGY 05-09 BACHELOR OF ENGINEERING
Digital Communication (67%) Electronics & Communication (68%)
R.V. College of Engineering Ghousia College of Engineering
VTU Belgaum VTU Belgaum
03-05 PRE-UNIVERSITY 02-03 MATRICULATION
PCMB (81%) State Syllabus (76.48%)
K.L.E PU College Kinto Convent High School
Bengaluru Bengaluru
EXPERIENCES
10/15 - Present Trident Info sol Pvt. Ltd., Bengaluru
Design Engineer
I am a Hardware & Electrical design Engineer. My role
is to perform design calculation, component selection &
Development of embedded module & high speed boards.
I do schematic design using ORCAD/CADSTAR Tool
& Electrical wiring design in E3 tool.
12/09 - 09/13 Bharat Electronics Limited, Bengaluru
Design Engineer
I worked on design & testing of the analog, digital and
microcontroller based systems. Optimization of Bill Of
Material (BOM), Part Electrical List (PEL) and User
Hand Book (Technical Document) preparation.

2. Technical Skills
RS232/422/485
Gigabit Ethernet, USB
PCI, PMC, XMC, PLC
I2C, SPI, SRIO, UART
ADC, DAC
FLASH, LCD
CRO, Multi-meter
Signal Generator
ACHIEVEMENTS
PUBLISHED INTERNTIONAL
JOURNEL “Design of Decision
Feedback Equalizer for Filter
Bank Multicarrier Systems”
BEST PAPER AWARD
Achieved 1st
place in International
Conference technical paper presen-
tation 2015.
Good Percentile in GATE Exam
Cracked GATE 2013 with good
Percentile
08/14 - 05/15 Central Research Laboratory-Bharat Electronics Ltd.
M.Tech Internship – worked as a Project Trainee
A Project on: Design of Filter Bank Multicarrier
Systems for 5G Communication
Tools used: MATLAB, ModelSim, Xilinx.
PROJECTS
2015 Wavelet Threshold Technique for Image De-noising
Individual M.Tech Project
Elimination/Reduction of noise level in noisy image,
While preserving the image features was done using
MATLAB
2014 LSB insertion Technique for Image Steganography
Individual M.Tech Project
Hiding of confidential information in an cover
image & extracting the hidden information at the
receiving end was carried using MATLAB.
Personal Information
Name: Abhishek B G
Sex: Male
Date of Birth: 8th
April
Marital Status: Single
Address: #38 First Main Road
Vinayakanagar
Kamakshipalya
Bengaluru -560079
EXTRA INFO
I am very passionate about the new emerging technologies and
keep in touch with current technological trends. I have the skills
of managing and designing the steps required to reach a project
deadline. I am also comfortable with Onsite projects.