This document discusses techniques for exploiting process variability in integrated circuits to improve voltage/frequency control, including variability aware dynamic voltage and frequency scaling (DVFS) using speed binning and a 16 core chip organized as a 4x4 mesh. It also describes modeling of channel length variability and its impact on leakage current and frequency. Different DVFS strategies are evaluated like threshold-based scaling, greedy search to optimize energy per instruction, and maximum throughput under a power budget. Fine-grained and coarse-grained control at the voltage/frequency island level is also examined.