This document is a circuit diagram and description for a digital lock project using a combination of 2-1-4-9. It includes two 74LS74D flip flops labeled U3 and U4 to store the combination digits. It also includes NAND gates from a 7408N chip and diodes to reset the flip flops and detect button presses from keys 2, 1, 4, and 9. Resistors and additional diodes are used to interface the buttons and reset with the flip flop circuits.

1. 0
0
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A A
B B
C C
D D
E E
F F
G G
U3
74LS74D
1D2
1Q5
~1Q6
~1CLR1
1CLK3
~1PR4
GND7 ~2Q 8
2Q 9
~2PR 10
2CLK 11
2D 12
~2CLR 13
VCC 14
U4
74LS74D
1D2
1Q5
~1Q6
~1CLR1
1CLK3
~1PR4
GND7 ~2Q 8
2Q 9
~2PR 10
2CLK 11
2D 12
~2CLR 13
VCC 14
S1Key = 1
S2Key = 2
S4Key = 4
S5Key = 5
VCC
5.0V
X1
U1A
7408N
U1C
7408N
U1D
7408N
S3Key = 3
S9Key = 9
S6Key = 6
S8Key = 8
S7Key = 7
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DIGITAL LOCK PROJECT - COMBINATION CIRCUIT ( REF. 2-1-4-9)
EFILE: 74LS74N lock project-rev3-pg1
M. DeMARIA
12/4/2016
1 1
3
A
R1
330Ω
R2
330Ω
R3
330Ω
R4
330Ω
D2
1N4004G
D3
1N4004G
D4
1N4004G
D5
1N4004G
S10
X2 X3 X4
VCC
5.0V
(RESET)
J1(PG2)
D1
1N4004G