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NITISH PANDEY
E -mail: nitish1404@gmail.com ~ Phone: 09560772165
Dated: 18/04/15
Dear Sir/ Madam,
Please find the resume attached for the position of Application Engineer/Analog & Mix signal /Layout
Design Engineer . I'm particularly interested in this opening , which relates strongly to my nearly 3 years
of experience in Development / Verification of Memory Layout.
As ASIC/Layout Design Engineer with Synopsys India Private Ltd. (Memory Layout), Noida, I believe I
meet all the essential criteria for the position. A summary of my experience and key accomplishments
includes the following:
 Successfully worked on Memory Compiler: 10nm, 14nm, 16nm, 28nm, 40nm, 45nm & 55nm
 Won award for extra ordinary efforts for completing all the required quality checks and
accomplishing Accelerated Releases Ahead of their committed schedules for HUALI 40LP compilers
to meet the business requirements
 A keen communicator with honed interpersonal, problem solving and analytical abilities
I am now looking to take up roles in Development in companies preferably in VLSI / EDA industry. Of
particular interest to me would be positions in Tool Development. In addition, I am open to assignments
across Delhi/ NCR.
I am keen to join your firm due to its leading position in the industry, great organizational culture, spirit of
innovation, professionalism that characterizes your firm and its employees. I am attracted to this role on
account of the EDA/VLSI latest technology that it offers.
I appreciate your efforts in taking the time to review my credentials and experience. Looking forward to a
positive response.
Thanking you,
Sincerely,
NITISH PANDEY
Enclosure: Resume

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cover_letter

  • 1. NITISH PANDEY E -mail: nitish1404@gmail.com ~ Phone: 09560772165 Dated: 18/04/15 Dear Sir/ Madam, Please find the resume attached for the position of Application Engineer/Analog & Mix signal /Layout Design Engineer . I'm particularly interested in this opening , which relates strongly to my nearly 3 years of experience in Development / Verification of Memory Layout. As ASIC/Layout Design Engineer with Synopsys India Private Ltd. (Memory Layout), Noida, I believe I meet all the essential criteria for the position. A summary of my experience and key accomplishments includes the following:  Successfully worked on Memory Compiler: 10nm, 14nm, 16nm, 28nm, 40nm, 45nm & 55nm  Won award for extra ordinary efforts for completing all the required quality checks and accomplishing Accelerated Releases Ahead of their committed schedules for HUALI 40LP compilers to meet the business requirements  A keen communicator with honed interpersonal, problem solving and analytical abilities I am now looking to take up roles in Development in companies preferably in VLSI / EDA industry. Of particular interest to me would be positions in Tool Development. In addition, I am open to assignments across Delhi/ NCR. I am keen to join your firm due to its leading position in the industry, great organizational culture, spirit of innovation, professionalism that characterizes your firm and its employees. I am attracted to this role on account of the EDA/VLSI latest technology that it offers. I appreciate your efforts in taking the time to review my credentials and experience. Looking forward to a positive response. Thanking you, Sincerely, NITISH PANDEY Enclosure: Resume