This document summarizes a research paper that proposes new algorithms for field sequential color LCD displays without color filters. It describes a Multi-Area Control (MAC) algorithm that divides the display and backlight into three areas to increase LED flash time. A Color Local Dimming Sequential (CLDS) algorithm further divides the backlight into multi-areas and sets dimming values. Prototypes including a 32-inch LCD TV and 15.4-inch notebook demonstrate the approaches, showing improved brightness, color accuracy and efficiency over basic field sequential methods. The algorithms aim to address challenges of fast scanning, response times and light switching for color-filterless displays.
Complex digital and analog circuits and multiple clock signals used for design and development of modern systems usually make the job of engineers and designers a tedious one. While working with complex circuits and signals, a designer might encounter problems with circuit validation due to long simulation time. These complexities adversely affect the development time and hence increase time to market incurring higher production costs. By applying a new methodology in their Digital Phase-Locked Loop (Digital PLL) design, the engineers at QuEST reduced the simulation effort to one-by-third.
My activities at CSIR-CEERI, related to Semiconductor Devices (Memory and Linear ICs Design), Circuits and Smart System Sensor's Signal Processing Hardware and Software Design and Development.
Analog-to-Digital Converter (ADC) is an integral part of high-speed signal processing applications. This paper discusses about 10-bit SAR based ADC that enables very low power consumption and sampling rate as high as 165 MSPS.
Complex digital and analog circuits and multiple clock signals used for design and development of modern systems usually make the job of engineers and designers a tedious one. While working with complex circuits and signals, a designer might encounter problems with circuit validation due to long simulation time. These complexities adversely affect the development time and hence increase time to market incurring higher production costs. By applying a new methodology in their Digital Phase-Locked Loop (Digital PLL) design, the engineers at QuEST reduced the simulation effort to one-by-third.
My activities at CSIR-CEERI, related to Semiconductor Devices (Memory and Linear ICs Design), Circuits and Smart System Sensor's Signal Processing Hardware and Software Design and Development.
Analog-to-Digital Converter (ADC) is an integral part of high-speed signal processing applications. This paper discusses about 10-bit SAR based ADC that enables very low power consumption and sampling rate as high as 165 MSPS.
Presentation deck from the Socitm Supplier Briefing that took place on the 18th June.
Socitm's New Agenda
Data the Key to Digital
Current Priorities for Local Government
Sponsor Address: A Digital Transformation Approach
Meeting the local public services challenge head on.
A Central Government tech insight and where next for Local Authorities
The Supplier Partnership Program
LVTS - Image Resolution Monitor for Litho-MetrologyVladislav Kaplan
Significant challenges for various Critical Dimension (CD) measurement matching procedures are reaching a comparable complexity as result of negative effects of roughness on the features. Due to the constant trend of integrated circuit in features reduction, impact of roughness start to be more destructive for various sets of measurement algorithms. Commonly used attempts to increase magnification for pattern recognition in measurement mode could in turn detect higher deviation from predefined patterns and thus initiate shift in placement of measurement gate. The purpose of this paper is to discuss how to reduce measurement gate (MG) placement variation impact and filter acquired data using edge correlation approach. The essence of listed above approach is to create set of width correlation function represents particular feature under test and compare it to “golden” one as a mean of detection of uncorrelated scans, which in turn should be excluded from overall computation of matching results. We describe general approach for algorithm stepping and various techniques for judgment of measurement comparison validity. Presented approach also has particular interest in determination of specified tool performance for predefined pattern recognition feature as well as for pattern recognition algorithm robustness study - direct interest for manufacturer. Precise matching estimation as part of Round Robin (RR) routines creating possibility to work with restricted amount of data and perform quick reliable qualification procedures. This paper concentrated on practical approach and used both simulation and actual data measurements data before and after proposed optimization taken by various generation tools by Hitachi (S-8840, S-9300, S-9380) in production environment
Vieworks' TDI line scan cameras are based on new innovative “hybrid” sensor technology. The sensors combine CMOS and CCD. The base sensor has is a classic CMOS structure with much faster readout speeds and lower power consumption. However the sensors use CCD photo cells to capture the images and CCD technology still offers higher dynamic range and better image quality. In addition, the integration and transfer of stages is done by moving charge in CCDs, making this process virtually noiseless. The TDI line scan cameras based on these new hybrid imaging sensors allows image captures as fast as 250 kHz line rates with up to 256 stages. They are designed for applications where faster line rates and higher sensitivity are critical.
Presentation deck from the Socitm Supplier Briefing that took place on the 18th June.
Socitm's New Agenda
Data the Key to Digital
Current Priorities for Local Government
Sponsor Address: A Digital Transformation Approach
Meeting the local public services challenge head on.
A Central Government tech insight and where next for Local Authorities
The Supplier Partnership Program
LVTS - Image Resolution Monitor for Litho-MetrologyVladislav Kaplan
Significant challenges for various Critical Dimension (CD) measurement matching procedures are reaching a comparable complexity as result of negative effects of roughness on the features. Due to the constant trend of integrated circuit in features reduction, impact of roughness start to be more destructive for various sets of measurement algorithms. Commonly used attempts to increase magnification for pattern recognition in measurement mode could in turn detect higher deviation from predefined patterns and thus initiate shift in placement of measurement gate. The purpose of this paper is to discuss how to reduce measurement gate (MG) placement variation impact and filter acquired data using edge correlation approach. The essence of listed above approach is to create set of width correlation function represents particular feature under test and compare it to “golden” one as a mean of detection of uncorrelated scans, which in turn should be excluded from overall computation of matching results. We describe general approach for algorithm stepping and various techniques for judgment of measurement comparison validity. Presented approach also has particular interest in determination of specified tool performance for predefined pattern recognition feature as well as for pattern recognition algorithm robustness study - direct interest for manufacturer. Precise matching estimation as part of Round Robin (RR) routines creating possibility to work with restricted amount of data and perform quick reliable qualification procedures. This paper concentrated on practical approach and used both simulation and actual data measurements data before and after proposed optimization taken by various generation tools by Hitachi (S-8840, S-9300, S-9380) in production environment
Vieworks' TDI line scan cameras are based on new innovative “hybrid” sensor technology. The sensors combine CMOS and CCD. The base sensor has is a classic CMOS structure with much faster readout speeds and lower power consumption. However the sensors use CCD photo cells to capture the images and CCD technology still offers higher dynamic range and better image quality. In addition, the integration and transfer of stages is done by moving charge in CCDs, making this process virtually noiseless. The TDI line scan cameras based on these new hybrid imaging sensors allows image captures as fast as 250 kHz line rates with up to 256 stages. They are designed for applications where faster line rates and higher sensitivity are critical.
This presentation is all about interfacing of a character LCD with 8051 micro-controller. It discusses various LCD commands, LCD pin description and a simple LCD working code in assembly for interfacing.
2.2 inch LCD Transflective TFT module 320*320 LH220Q32-FD01 Diastimeter Games...Shawn Lee
The 2.2 inch LCD is a Color Active Matrix Liquid Crystal Display with Light Emission Diode(LED) backlight system. The matrix employs an a-Si Thin Film Transistor as the active element.
It is a transflective type display operating in the normally white mode. This TFT-LCD has a 2.2 inch diagonally measured active display area with (320*RGB*320) resolution. Each pixel is divided into Red, Green, and Blue sub-pixels or dots which are arranged in vertical stripes.
Whatsapp: 86 18566294218
Skype: panoxshawn@outlook.com
Email: shawn.lee@panoxdisplay.com
OLED/LCD supplier: www.panoxdisplay.com
1. Displaying Your VisionDisplaying Your Vision
SID2008.05.23 71.1SID2008.05.23 71.1 W.C.TaiW.C.Tai 1
SID2008 71.1:
Field Sequential Color LCD-TV Using
Multi-Area Control Algorithm
Wen-Chih Tai, Chi-Chung Tsai, Shian-Jun
Chiou, Chih-Ping Su, Huang-Min Chen,
Chia-Lin Liu and Chi-Neng Mo
TFT-LCD R&D Center, Chunghwa Picture Tubes, Ltd.
1127, Heping Rd., Bade City, Taoyuan, Taiwan, 334, R.O.C
e-mail. taiwc@cptt.com.tw
Fax. + 886-3-3773159
2. Displaying Your VisionDisplaying Your Vision
SID2008.05.23 71.1SID2008.05.23 71.1 W.C.TaiW.C.Tai 2
Outline
1. Introduction
– Color-filter vs. Color-filter-less
– Color Sequential concept
2. New Algorithm
– Multi-Area Control algorithm
(MAC)
– Color Local Dimming
Sequential algorithm (CLDS)
3. Prototype
– 32-inch OCB LCD TV
– 15.4-inch TN Notebook
4. Conclusion
3. Displaying Your VisionDisplaying Your Vision
SID2008.05.23 71.1SID2008.05.23 71.1 W.C.TaiW.C.Tai 3
Introduction
Color-filter vs. Color-filter-less
LCD Standard Structure Color FilterLCD Standard Structure Color Filter
Remove Color Filter
• Color Filter
– R G B sub-pixel to display color
– Spatial additive color mixing
– obstruct most of light (according
to their different wave lengths)
• Advantage of no color filter
– Higher optical efficiency
– Low Power Consumption
– Raise the manufacture yield rate
– Reduce the cost of the panel
– Sunlight readable
• display a color image
– The theorem of visual residue
– display a color image by turning
on light sources Red, Green and
Blue sequentially within a frame
periods
4. Displaying Your VisionDisplaying Your Vision
SID2008.05.23 71.1SID2008.05.23 71.1 W.C.TaiW.C.Tai 4
Introduction
color sequential concept
• LCD color-filter-less panel
must combine with a
backlight that has 3
separate alternating light
sources
• the visual residue of
human’s eyes is about 1/60
(one sixtieth) second
• Increase the field frequency
above 180 Hz to display the
full color image
• Waited the LC transfer to
position, then light on
60Hz 180Hz
Temporal color mixing
5. Displaying Your VisionDisplaying Your Vision
SID2008.05.23 71.1SID2008.05.23 71.1 W.C.TaiW.C.Tai 5
Basic Algorithm
• one field time is 1/3(one third) frame time 5.57 ms,
• the response of LC and the flash of the backlight must be completed.
• LCD scanning data must be shorter than 4.28 ms,
• the LED flashing time is about 1.28 ms.
• In this case, due to the short flash time the LED number must be
increase, If the brightness of the module want to achieve market
specification with the slower LC response time
RGB LED
Backlight
TFT
scanning
tTFT
tLC
tBL
1/3 f
R G B
1.28ms 1.28ms 0.5ms
Timing chart in the color sequential LCD with TFT addressing
6. Displaying Your VisionDisplaying Your Vision
SID2008.05.23 71.1SID2008.05.23 71.1 W.C.TaiW.C.Tai 6
MAC Algorithm
(Multi-Area Control)
• if 3 gate IC were
applied to the panel.
• Panel and backlight is
divided into three
areas
• Control the timing of
the LCD with 180 Hz
field rate
• the backlight show 9
flashing pattern in one
frame time
• LCD address time is
reduced to one third of
the whole panel
Fig. 1 MAC algorithm of LED light on time
sequential
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SID2008.05.23 71.1SID2008.05.23 71.1 W.C.TaiW.C.Tai 7
MAC Algorithm – time chart
• the panel and
backlight were
divided into three
area I, II, III
• the LCD address
time can be
reduced to 1/3(one
third) from 4.28 ms
to 1.18 ms
• the LED flash time
was increased from
1.28 ms to 3.5 ms
• 2nd area was the
same with 1st but
delay 1.85 ms
• 3rd area was the
same with 1st but
delay 3.7 ms
RGB
LED BL
Area I
TFT LCD
Area I
1/3f(5.56ms)
tL
C
R G B
tL
C
tL
C
tL
C
R G B
tL
C
tL
C
tL
C
R G B
tL
C
tL
C
RGB
LED BL
Area II
TFT LCD
Area II
RGB
LED BL
Area III
TFT LCD
Area III
f(16.67ms)
tTFT tTFT tTFT
tTFT tTFT tTFT
tTFTtTFTtTFT
tLED tLED tLED
tLED tLED tLED tLED
tLED tLED tLED tLED
R
tTFT
R
G
B
B
B
B
B
R
R
G
G
3.5ms 3.5ms3.5ms
1.18ms
Timing chart in the MAC LCD with TFT addressing
8. Displaying Your VisionDisplaying Your Vision
SID2008.05.23 71.1SID2008.05.23 71.1 W.C.TaiW.C.Tai 8
CLDS Algorithm
(Color Local Dimming Sequential)
• Determinate the amount of
dimming areas
• for example 4 x 6 area
• LCD is portioned into several
areas according to the Backlight
unit
• Raster scan is used to scan the
picture pixel by pixel from the left-
top to the right-bottom.
• After the maximum or average
value is computed then
• A critical value can be found from
a signal area, or several area and
set the intensity of backlight
Fig. 2 MAC algorithm
combined with CLDS method
9. Displaying Your VisionDisplaying Your Vision
SID2008.05.23 71.1SID2008.05.23 71.1 W.C.TaiW.C.Tai 9
X8
X8
X8
X8
X8
X8
Prototype
32-inch OCB LCD TV – Panel Driver Circuit
• Use the
mass
product
standard IC
• FSC does
not need
sub-pixel
• Connect R G
B Sub-pixel
of standard
panel into
the same I/O
line
•FSC increase 3
times I/O speed
but connect R G
B into one I/O
decrease 3
times I/O speed
•Maintain the
same I/O speed
and use the
standard panel
MASK
10. Displaying Your VisionDisplaying Your Vision
SID2008.05.23 71.1SID2008.05.23 71.1 W.C.TaiW.C.Tai 10
Prototype
32-inch OCB LCD TV - Optical Mechanism Layout
• The basic optical films
structure of the module is
the same with the
standard display.
• Under the LCD panel
– diffuse film,
– brightness enhance film
(BEF),
– diffuse film,
– diffuse plate,
– LEDs and reflective layer
Fig. 4 32”TV backlight structure
11. Displaying Your VisionDisplaying Your Vision
SID2008.05.23 71.1SID2008.05.23 71.1 W.C.TaiW.C.Tai 11
Prototype
32-inch OCB LCD TV - Backlight Mechanism Layout
• the advantage of LEDs
– Low power consumption
– Smaller form factor
– Wide color gamut
• 24 x 48 LEDs layout backlight
source
• low power RGB chips set of tri-
color in one LEDs
• reduce the flash duty and
overdrive the power supplied
current,
• high-speed flashing
• the LED chip can be emitted
more light flashing energy and
more light efficient of low power
LED chip can be achieve. Fig. 5 Backlight module with the low power
RGB chips set of tri-color in one LED
12. Displaying Your VisionDisplaying Your Vision
SID2008.05.23 71.1SID2008.05.23 71.1 W.C.TaiW.C.Tai 12
Prototype
32-inch OCB LCD TV - The Liquid Crystal Mode
• The FSC method requires
– fast scanning driver,
– fast response of the display
device and
– fast switching of the RGB
light sources.
• the OCB mode was adopted
for its fast response time and
uniform alignment in FSC
display
• The average gray to gray
response time of OCB mode
is 1.4 ms and on/off 3 to 4 ms.
• All state transition below 3.5
ms
255
223
191
159
127
95
63
31
0
255
223
191
159
127
95
63
31
0
0
2
4
6
8
10
12
14
16
Time(ms)
Rising Time
Falling Time
Fig. 9 OCB LCD-TV response time
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SID2008.05.23 71.1SID2008.05.23 71.1 W.C.TaiW.C.Tai 13
Prototype
32-inch OCB LCD TV - Basic FSC Algorithm
• display image by
basic field
sequential method
• bottom Image of
the display with
wrong mixed color
• There is not
enough time to
wait the LC to
transfer to the
required position
• Brightness : 350
nits
Wrong Mixed ColorWrong Mixed Color
The color filterless 32-inch TFT TV by
using basic sequential principle
14. Displaying Your VisionDisplaying Your Vision
SID2008.05.23 71.1SID2008.05.23 71.1 W.C.TaiW.C.Tai 14
Prototype
32-inch OCB LCD TV - MAC Algorithm
• The 32-inch color filter
less liquid crystal
module with the MAC
Algorithm
• Brightness : 500 nits
– (max 900 nits)
• the color gamut 114.6 %
as compare to the NTSC
Right Mixed ColorRight Mixed Color
The color filterless 32-inch TV by
using multi-area sequential algorithm
15. Displaying Your VisionDisplaying Your Vision
SID2008.05.23 71.1SID2008.05.23 71.1 W.C.TaiW.C.Tai 15
Prototype
32-inch OCB LCD TV - MAC +CLDS Algorithm
• Maximum Power consumption 65 Watt
• Brightness : 500 nits
Fig. 6 CLDS backlight and power
consumption
Fig. 7 CCFL image and power
consumption
Fig. 8 CLDS image and power
consumption
CLDS illustration
16. Displaying Your VisionDisplaying Your Vision
SID2008.05.23 71.1SID2008.05.23 71.1 W.C.TaiW.C.Tai 16
Prototype
15.4-inch TN Note Book - The Liquid Crystal Mode
• the TN Notebook response time
gray to gray is about 3.8 ms
• on/off about 5 ms
• the standard field sequential
method will not work in this type of
liquid crystal
• The notebook backlight structure is
the same as light guide standard
• 72 low power RGB LEDs were used
on left and right side
• the backlight driver was also divided
into 3 control areas according the
gate IC position of the LCD panel
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Prototype
15.4-inch TN Note Book - The Liquid Crystal Mode
• Turn On backlight
– Quality like TV
– The color image displays
correctly, and
– the brightness of about 400
nits can be achieved
• Turn Off backlight
– High optical efficient
– good enough to see the
gray image on the panel
without turning on the
backlight source.
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Conclusion
• Two major FSC alogrithm were propose
– MAC algorithm implements the backlight with 9 flash patterns
– CLDS algorithm divides backlight into multi-areas and set the
critical backlight dimming value
• The MAC+CLDS field sequential color display was
proposed for
– high brightness
– high color reproduction
– high light efficiency
– no heat sink
– low power consumption
• In the future, the advanced method will be proposed to
reduce the color break-up artifacts
• for example RGBW, YBGRC, and YBWGRC technique