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Verilog HDLVerilog HDL
ASIC DESIGN USING
FPGA
BEIT VII
KICSIT
Oct 8 2012 Lecture 16
2
File Output
Oct 8 2012
• Opening a file
• $fopen is used to open a file.
• Syntax <file_handle> = $fopen (“<name of
file>”);
• The task $fopen returns a 32-bit value called
multichannel descriptor.
• Only one bit is set in a multichannel descriptor.
• The standard output is always open.
• It has a multichannel descriptor value = 32’d1Lecture 16
3
File Output
Oct 8 2012 Lecture 16
4
Writing to files
Oct 8 2012
• The system tasks $fdisplay, $fmonitor,
$fwrite, and $fstrobe are used to write to files.
• similar in syntax to regular system tasks
$display, $monitor, etc., but they provide
the additional capability of writing to files.
•Syntax $fdisplay (<file_descriptor>, p1, p2, ….pn);
$fmonitor (<file_descriptor>, p1, p2, ….pn);
• p1, p2,.. pn can be variables, signal names, or
quoted strings.
Lecture 16
5
Writing to files
Oct 8 2012 Lecture 16
6
Closing files
Oct 8 2012
• Files can be closed with the system task $fclose.
• Syntax $fclose <file_handle>);
• A file cannot be written to once it is closed.
• The corresponding bit in the multichannel
descriptor is set to 0.
Lecture 16
7
Displaying Hierarchy
Oct 8 2012
• Hierarchy at any level can be displayed by means
of the %m option in any of the display tasks,
$display, $write task, $monitor, or
$strobe task.
• When multiple instances of a module execute the
same Verilog code, the %m option will distinguish
from which module instance the output is coming.
• No argument is needed for the %m option in the
display tasks.
Lecture 16
8
Displaying Hierarchy
Oct 8 2012
• Example
Lecture 16
9
Displaying Hierarchy
Oct 8 2012
• Example results
Lecture 16
9
Displaying Hierarchy
Oct 8 2012
• Example results
Lecture 16

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Assic 16th Lecture

  • 1. 1 Verilog HDLVerilog HDL ASIC DESIGN USING FPGA BEIT VII KICSIT Oct 8 2012 Lecture 16
  • 2. 2 File Output Oct 8 2012 • Opening a file • $fopen is used to open a file. • Syntax <file_handle> = $fopen (“<name of file>”); • The task $fopen returns a 32-bit value called multichannel descriptor. • Only one bit is set in a multichannel descriptor. • The standard output is always open. • It has a multichannel descriptor value = 32’d1Lecture 16
  • 3. 3 File Output Oct 8 2012 Lecture 16
  • 4. 4 Writing to files Oct 8 2012 • The system tasks $fdisplay, $fmonitor, $fwrite, and $fstrobe are used to write to files. • similar in syntax to regular system tasks $display, $monitor, etc., but they provide the additional capability of writing to files. •Syntax $fdisplay (<file_descriptor>, p1, p2, ….pn); $fmonitor (<file_descriptor>, p1, p2, ….pn); • p1, p2,.. pn can be variables, signal names, or quoted strings. Lecture 16
  • 5. 5 Writing to files Oct 8 2012 Lecture 16
  • 6. 6 Closing files Oct 8 2012 • Files can be closed with the system task $fclose. • Syntax $fclose <file_handle>); • A file cannot be written to once it is closed. • The corresponding bit in the multichannel descriptor is set to 0. Lecture 16
  • 7. 7 Displaying Hierarchy Oct 8 2012 • Hierarchy at any level can be displayed by means of the %m option in any of the display tasks, $display, $write task, $monitor, or $strobe task. • When multiple instances of a module execute the same Verilog code, the %m option will distinguish from which module instance the output is coming. • No argument is needed for the %m option in the display tasks. Lecture 16
  • 8. 8 Displaying Hierarchy Oct 8 2012 • Example Lecture 16
  • 9. 9 Displaying Hierarchy Oct 8 2012 • Example results Lecture 16
  • 10. 9 Displaying Hierarchy Oct 8 2012 • Example results Lecture 16