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IP Design Flow
Design (chunks)
• Design Flow
• Design Service
• Concurrent Engineering
• Risk Management
• FMEA
• DRBFM
IP Design Flow
Design Flow
• In UST ECE department, we have a professional team with consultancy experience for
the IP design. They follows the industrial process to enhance the quality of the UST IP
Macro.
• Macro Definition Phase
– Once we have received the request. We will create a Macro Development Planning to make
sure the IP to fit your product development schedule. Besides, we will then define the
specification and evaluation for Mass Production with yours. After that, a detail design policy
will be clear. It is very important to define it out before any design phase, since we will have a
feasibility study of the development and prevent any risks happen. (For Risk preventing, you
can refer to our Risk Management methodology. )
• Pre-Design Phase
– After defining the specification and identified the risks, we will move on the circuit design
phase. With the research experience and the modeling techniques, it can very fast to create the
preliminary circuit set (if it is a new macro request) or to prepare the first database (if it is a
technology migration/ Fab Change request).
• Layout Phase
– With certain specification has been defined and circuit has been implemented, it will go on to
the Layout development. As we have a very strong analog research team in UST, it can also
provide an cost-effective and good noise immunity layout.
• Post Design Phase
– After the layout, we will have post-design phase to ensure the design parameters having the
required margin for the mass production.
• Library Release
– Once the above processes have been completed, the library can be released.
Design Service
• There are THREE development scenario
have been considered in IP Development.
a)Migration on Technology
• Customer would like to use current
design, however, they would like to plot it into new
technology (i.e. move IPs from 0.5um to 65nm)
b)Migration between Fabrication House
• Customer would like to use specific fabrication
house, however, IP being developed is not using this
technology
c) New IP Macro
• Customer would like to develop a new macro with
new specification requirement
Design Services
• There are THREE development scenario
have been considered on IP Service.
1. Migration on Technology
2. Migration between Fabrication House
3. Development of New IP
Migration on Technology
• User can select the macro from
existing IP Catalog and defined their
technology requirement for the new
plotting. (i.e. considering the plotting
of existing IP from 0.5um tech to
65nm tech). Once the requirement
has been confirmed, processes
plotting on technology, circuit
architecture and as small as the
component (such as transistor unit)
will be considered in details to
prevent the failure. It will finally
draft out a IP specification and a
design policy before starting the IP
design. As the quality of the design is
our main concern, the design is
developed under an in-house control
with risk management.
Migration between Fabrication
House
• It is considering to product the
required IP Macro from one
fabrication house to another. As
it involves the different
technology requirement in
different fabrication house, it
will need to think about the
different process parameters, the
component availability and the
transistor requirements to define
the risk of this technology
plotting. After a deep
understanding, it is necessary to
reconsider and finalize the
specification as well as drafting
out a design policy to control the
whole IP design without any
failure.
Develop New IP
New
IP Macro
Development
Have New
Product
Outline
Draft Out
Preliminary
Specification
Run
Feasibility
Study
Define
Difficulty and
Solutions
Finalize IP
Specification
& Design
Policy
Start Design
with In-house
Quality
Control
• On developing a new IP, it is necessary
to have a feasibility study with
preliminary specification based upon
your product outline. As it will have a
deliberated study on the
requirement, it is easy to circle out
those design difficulties and
contemplate the solution for those
risks. Thus, the finalized specification
is more practical for your product. In
addition with a good design policy to
control the development, your design
goal can be easily achieved.
Although, it will increase your lead
time on product
development, however, when you
consider your aggregated plan, it may
be shorten, since it not only prevents
the macro from later mask changes but
also saves your time and the cost in
your design.
• If you have any new idea and with like
to implement, please feel free to contact
us to increase your product revenue.
Concurrent Engineering
• We also can support concurrent development for time-to-
market requirement. It can help you to maintain a short
product design phase and at the same time reduce the lead-
time of your development
IP
Spec
Final
Chip
IP
Design
SoC
Design
Sequential Development Concurrent Development
FMEA
• FMEA is called Failure Mode Effects Analysis.
• It is a step-by-step approach for identifying all
possible failures in a design. You can consider
“Failure modes” which means the ways in which
something might fail and failures are any errors or
defects which can be potential or actual.
• On the other hands, Effects Analysis is to study the
consequences of those failures which can be
prioritized according to how serious their
consequence are, how frequently they occur and
how easily the can be detected.
• With aboves, we can take actions to eliminate or
reduce failures on the design.
FMEA (2)
• In our quality
control, we will
applied it with
DRBFM as a basic
element to enhance
our design IP quality.
• In other ways, you
also can consider
FEMA process being
very simple as it can:
– Save the lead time
– Reduce the number
of changes before
your product launch
– Increase your
customer trust
FMEA
Failures
Time
• Identify potential problems in
early stage to reduce failure of
development
• Saving engineering time & cost
Design
Phase
Mass
Production
DRBFM
• DRBFM is a proactive problem prevention method.
This helps to find problems through a forum of Good
Discussion with a cross-function team. It can be
considered as designers discuss among the same
team, or discussion in between different design
teams.
• Objectives:
– It helps to identify the baseline design and to focus the
efforts on changes.
– It let IP designer in better understanding the failure
modes and corners (risk) associated with the design and
the manufacturing.
– It helps to prioritize the change by focusing on those
highest risk issues.
GD3 Process

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Design flow webpage

  • 2. Design (chunks) • Design Flow • Design Service • Concurrent Engineering • Risk Management • FMEA • DRBFM
  • 4. Design Flow • In UST ECE department, we have a professional team with consultancy experience for the IP design. They follows the industrial process to enhance the quality of the UST IP Macro. • Macro Definition Phase – Once we have received the request. We will create a Macro Development Planning to make sure the IP to fit your product development schedule. Besides, we will then define the specification and evaluation for Mass Production with yours. After that, a detail design policy will be clear. It is very important to define it out before any design phase, since we will have a feasibility study of the development and prevent any risks happen. (For Risk preventing, you can refer to our Risk Management methodology. ) • Pre-Design Phase – After defining the specification and identified the risks, we will move on the circuit design phase. With the research experience and the modeling techniques, it can very fast to create the preliminary circuit set (if it is a new macro request) or to prepare the first database (if it is a technology migration/ Fab Change request). • Layout Phase – With certain specification has been defined and circuit has been implemented, it will go on to the Layout development. As we have a very strong analog research team in UST, it can also provide an cost-effective and good noise immunity layout. • Post Design Phase – After the layout, we will have post-design phase to ensure the design parameters having the required margin for the mass production. • Library Release – Once the above processes have been completed, the library can be released.
  • 5. Design Service • There are THREE development scenario have been considered in IP Development. a)Migration on Technology • Customer would like to use current design, however, they would like to plot it into new technology (i.e. move IPs from 0.5um to 65nm) b)Migration between Fabrication House • Customer would like to use specific fabrication house, however, IP being developed is not using this technology c) New IP Macro • Customer would like to develop a new macro with new specification requirement
  • 6. Design Services • There are THREE development scenario have been considered on IP Service. 1. Migration on Technology 2. Migration between Fabrication House 3. Development of New IP
  • 7. Migration on Technology • User can select the macro from existing IP Catalog and defined their technology requirement for the new plotting. (i.e. considering the plotting of existing IP from 0.5um tech to 65nm tech). Once the requirement has been confirmed, processes plotting on technology, circuit architecture and as small as the component (such as transistor unit) will be considered in details to prevent the failure. It will finally draft out a IP specification and a design policy before starting the IP design. As the quality of the design is our main concern, the design is developed under an in-house control with risk management.
  • 8. Migration between Fabrication House • It is considering to product the required IP Macro from one fabrication house to another. As it involves the different technology requirement in different fabrication house, it will need to think about the different process parameters, the component availability and the transistor requirements to define the risk of this technology plotting. After a deep understanding, it is necessary to reconsider and finalize the specification as well as drafting out a design policy to control the whole IP design without any failure.
  • 9. Develop New IP New IP Macro Development Have New Product Outline Draft Out Preliminary Specification Run Feasibility Study Define Difficulty and Solutions Finalize IP Specification & Design Policy Start Design with In-house Quality Control • On developing a new IP, it is necessary to have a feasibility study with preliminary specification based upon your product outline. As it will have a deliberated study on the requirement, it is easy to circle out those design difficulties and contemplate the solution for those risks. Thus, the finalized specification is more practical for your product. In addition with a good design policy to control the development, your design goal can be easily achieved. Although, it will increase your lead time on product development, however, when you consider your aggregated plan, it may be shorten, since it not only prevents the macro from later mask changes but also saves your time and the cost in your design. • If you have any new idea and with like to implement, please feel free to contact us to increase your product revenue.
  • 10. Concurrent Engineering • We also can support concurrent development for time-to- market requirement. It can help you to maintain a short product design phase and at the same time reduce the lead- time of your development IP Spec Final Chip IP Design SoC Design Sequential Development Concurrent Development
  • 11. FMEA • FMEA is called Failure Mode Effects Analysis. • It is a step-by-step approach for identifying all possible failures in a design. You can consider “Failure modes” which means the ways in which something might fail and failures are any errors or defects which can be potential or actual. • On the other hands, Effects Analysis is to study the consequences of those failures which can be prioritized according to how serious their consequence are, how frequently they occur and how easily the can be detected. • With aboves, we can take actions to eliminate or reduce failures on the design.
  • 12. FMEA (2) • In our quality control, we will applied it with DRBFM as a basic element to enhance our design IP quality. • In other ways, you also can consider FEMA process being very simple as it can: – Save the lead time – Reduce the number of changes before your product launch – Increase your customer trust FMEA Failures Time • Identify potential problems in early stage to reduce failure of development • Saving engineering time & cost Design Phase Mass Production
  • 13. DRBFM • DRBFM is a proactive problem prevention method. This helps to find problems through a forum of Good Discussion with a cross-function team. It can be considered as designers discuss among the same team, or discussion in between different design teams. • Objectives: – It helps to identify the baseline design and to focus the efforts on changes. – It let IP designer in better understanding the failure modes and corners (risk) associated with the design and the manufacturing. – It helps to prioritize the change by focusing on those highest risk issues.