Write a VHDL source code to implement the hardware of the sequencers shown below in Figure 1 (a) and (b). This must be submitted at the beginning of the lab session (typed and printed).Write a VHDL source code to implement the hardware of the sequencers shown below in Figure 1 (a) and (b). This must be submitted at the beginning of the lab session (typed and printed). Input Fig 1 (a) Reset is asynchronous Fig 1 (b) Clock and the asynchronous reset are asynchronous : You need to declare local signals for the flipflops shown.Use signal names given in the diagram.