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THENNARASU E
Mobile no:+91 8098067101
Email id:thennarasuece25@gmail.com
Company: Spring Source Technology and Pvt.Ltd
Total Years of Experience: 1 year,
Position Applied For: Engineer
Summary:
• Having total work experience of 1 year.
• B.E in Electronics & Communication Engineering from SKP Engineering College.
• One month summer training from Fusion Technology “Networking”.
Skills :
Programming Languages:
 C, Verilog, SystemVerilog.
Tools:
 Mentor Graphics Modelsim, Questasim
 Matlab
 Protocols AMBA bus protocols AHB,APB and I2C
Company/Institute From To
Spring Source Technology and Pvt.Ltd, Nov 2015 - Nov 2016
Vellore
Areas of interest:
Digital Electronics,
System Verilog, Verilog,
Embedded System.
Educational Qualification: (starting from graduation)
• BE.in Electronics and Communication Engineering from SKP Engineering
College with an aggregate of 67% in 2014.
• Diploma in Electronics &Communication Engineering from vignesh polytechnic
College with an aggregate of 88.7% in 2011
Academic Qualification:
• Intermediate from TN Board in 2009 with 65.6%.
• High school from TN Board in 2007 with 68%.
Professional Experience :
Project 1:
I2C Bus Interface
Development Environment/Technology Verilog Verification
Tools Used Mentor Questasim, Xilinx ISE 12.3
Operating System Windows
Description:
I2C is a two-wire, bidirectional serial bus interface that provides
efficient method of data exchange between devices.
Roles & Responsibilities.
Develop master side fsm.
SCL generation through external clock.
Project 2:
AHB LITE
Development Environment/Technology System Verilog,UVM Verification
Tools Used Mentor Questasim.
Operating System Linux.
Description:
AMBA AHB-Lite addresses the requirements of high performance synthesizable
designs.
It is a bus interface that supports a single bus master and provides
high-bandwidth operation.
Roles & Responsibilities.
Develop Verification plan for AHB 3 LITE VIP.
Identify checks for protocol.
Develop the code for bus assertion.
Declaration:
I hereby declare that the information furnished above is true and
authentic to the best of my knowledge.
Place:………………………………… Yours Truly
Date:………/…………/………………….
(THENNARASU E)

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Arasu Resume

  • 1. THENNARASU E Mobile no:+91 8098067101 Email id:thennarasuece25@gmail.com Company: Spring Source Technology and Pvt.Ltd Total Years of Experience: 1 year, Position Applied For: Engineer Summary: • Having total work experience of 1 year. • B.E in Electronics & Communication Engineering from SKP Engineering College. • One month summer training from Fusion Technology “Networking”. Skills : Programming Languages:  C, Verilog, SystemVerilog. Tools:  Mentor Graphics Modelsim, Questasim  Matlab  Protocols AMBA bus protocols AHB,APB and I2C Company/Institute From To Spring Source Technology and Pvt.Ltd, Nov 2015 - Nov 2016 Vellore Areas of interest: Digital Electronics, System Verilog, Verilog, Embedded System. Educational Qualification: (starting from graduation) • BE.in Electronics and Communication Engineering from SKP Engineering College with an aggregate of 67% in 2014. • Diploma in Electronics &Communication Engineering from vignesh polytechnic College with an aggregate of 88.7% in 2011 Academic Qualification: • Intermediate from TN Board in 2009 with 65.6%. • High school from TN Board in 2007 with 68%.
  • 2. Professional Experience : Project 1: I2C Bus Interface Development Environment/Technology Verilog Verification Tools Used Mentor Questasim, Xilinx ISE 12.3 Operating System Windows Description: I2C is a two-wire, bidirectional serial bus interface that provides efficient method of data exchange between devices. Roles & Responsibilities. Develop master side fsm. SCL generation through external clock. Project 2: AHB LITE Development Environment/Technology System Verilog,UVM Verification Tools Used Mentor Questasim. Operating System Linux. Description: AMBA AHB-Lite addresses the requirements of high performance synthesizable designs. It is a bus interface that supports a single bus master and provides high-bandwidth operation. Roles & Responsibilities. Develop Verification plan for AHB 3 LITE VIP. Identify checks for protocol. Develop the code for bus assertion. Declaration: I hereby declare that the information furnished above is true and authentic to the best of my knowledge. Place:………………………………… Yours Truly Date:………/…………/…………………. (THENNARASU E)