The document discusses computer memory organization and hierarchy. It describes:
- Main memory as the primary storage location that directly communicates with the CPU. Main memory is typically RAM.
- Auxiliary memory as secondary storage units like magnetic disks and tapes that provide backup storage.
- Cache memory as a faster memory located between the CPU and main memory that stores frequently used contents of main memory for quicker access by the CPU.
- Virtual memory as a memory management technique that allows programs to run as if they have more memory than what is physically installed by swapping contents to auxiliary memory.
Scanning the Internet for External Cloud Exposures via SSL Certs
COA.pptx
1. Computer Organization
The computer organization is concerned with the structure
and behaviour of digital computers. The main objective of
this subject to understand the overall basic computer
hardware structure, including the peripheral devices.
In spite of variety and pace in the computer field, certain
fundamental concepts apply consistently throughout. The
application of these concepts depends upon the current
state of technology and the price/performance objectives of
the designer. The aim of the subject is to provide a through
discussion of the fundamentals of computer organization
and architecture and to relate these to contemporary design
issues.
3. Computer Architecture
Computer architecture can be defined as a set of rules and methods that describe thefunctionality,
managementand implementation of computers. To be precise, it is nothing but rulesbywhich a system
performs and operates.
Sub-divisions
ComputerArchitecturecan be divided into mainlythreecategories, whichareas follows −
•Instruction set Architecture or ISA − Whenever an instruction is given to processor, its role is to read
and act accordingly. It allocates memory to instructions and also acts upon memory address mode (Direct
Addressing mode or IndirectAddressing mode).
•Micro Architecture − It describes how a particular processor will handle and implement instructions
from ISA.
•System design − It includes the other entire hardware component within the system such as
virtualization, multiprocessing.
Role of computer Architecture
The main role of Computer Architecture is to balance the performance, efficiency, cost and reliability of a
computer system.
4. For Example − Instruction set architecture (ISA) acts as a bridge between computer's software
and hardware. Itworks as a programmer's view of a machine.
Computers can only understand binary language (i.e., 0, 1) and users understand high level
language (i.e., if else, while, conditions, etc). So to communicate between user and computer,
Instruction set Architecture plays a major role here, translating high level language to binary
language.
Structure
Let us see the example structure of Computer Architectureas given below.
Generally, computerarchitectureconsists of the following −
•Processor
•Memory
•Peripherals
All the above parts are connected with the help of system bus, which consists of address bus,
data bus and control bus.
6. Von-Neumann proposed his computer architecture design in
1945 which was later known as Von-Neumann Architecture. It
consisted of a Control Unit, Arithmetic, and Logical Memory Unit
(ALU), Registers and Inputs/Outputs.
Von Neumann architecture is based on the stored-program
computer concept, where instruction data and program data are
stored in the same memory. This design is still used in most
computers produced today.
A Von Neumann-based computer:
•Uses a single processor
•Uses one memory for both instructions and data.
•Executes programs following the fetch-decode-execute cycle
8. Central Processing Unit
The part of the Computer that performs the bulk of data processing
operations is called the Central Processing Unit and is referred to as
the CPU.
The Central Processing Unit can also be defined as an electric circuit
responsible for executing the instructions of a computer program.
The CPU performs a variety of functions dictated by the type of
instructions that are incorporated in the computer.
Buses
Buses are the means by which information is shared between the
registers in a multiple-register configuration system.
A bus structure consists of a set of common lines, one for each bit of
a register, through which binary information is transferred one at a
time. Control signals determine which register is selected by the bus
during each particular register transfer.
Memory Unit
A memory unit is a collection of storage cells together with associated
circuits needed to transfer information in and out of the storage. The
memory stores binary information in groups of bits called words. The
internal structure of a memory unit is specified by the number of
words it contains and the number of bits in each word.
31. Booth's Multiplication
Algorithm
h algorithm is a multiplication algorithm that allows us to multiply
igned binary integers in 2's complement, respectively. It is also
speed up the performance of the multiplication porn. It is very
oo. It works on the string bits 0's in the multiplier that requires no
bit only shift the right-most string bits and a string of 1's in a
bit weight 2k to weight 2m that can be considered as 2k+ 1 - 2m.
is the pictorial representation of the Booth's Algorithm:
32.
33. steps A Q
Initial 0000 0110
1 0100
0010
0011
0001
2 0001 0000
3 0101
0010
0000
1000
4 0001 0100
Result 0001 0100
−1Q−1 to 0 and count to n
values of Q0 and Q−1Q0 and Q−1 do the following:
Q−1=0,0 then Right shift A,Q,Q−1Q−1 and finally decrement count by 1
,Q−1=0,1 then Add A and B store in A, Right shift A,Q,Q−1Q−1 and finally decrement count by 1
Q0,Q−1=1,0 then Subtract A and B store in A, Right shift A,Q,Q−1Q−1 and finally decrement count by 1
Q0,Q−1=1,1 then Right shift A,Q,Q−1Q−1 and finally decrement count by 1
till count does not equal 0.
hart, we can solve the given question as follows:
1011(in 2’s complement)
1110(in 2’s complement)
) = 1011
1110
1=0
100 0)2 This is the required and correct result.
The steps in Booth’s algorithm are as
follow:
34. A division algorithm provides a quotient and a remainder when we
divide two number. They are generally of two type slow algorithm
and fast algorithm. Slow division algorithm are restoring, non-
restoring, non-performing restoring, SRT algorithm and under fast
comes Newton–Raphson and Goldschmidt.
Restoring Division Algorithm for Unsigned
nteger
35.
36. the registers are initialized with corresponding values (Q = Dividend, M = Divisor, A = 0, n = number of
the content of register A and Q is shifted left as if they are a single unit
content of register M is subtracted from A and result is stored in A
the most significant bit of the A is checked if it is 0 the least
of Q is set to 1 otherwise if it is 1 the least significant bit of Q
value of register A is restored i.e the value of A before the
h M
value of counter n is decremented
value of n becomes zero we get of the loop otherwise we repeat
y, the register Q contain the quotient and A contain remainder
e step involved:
n M A Q
4 00011 00000 1011
00011 00001 011_
00011 11110 011_
00011 00001 0110
3 00011 00010 110_
00011 11111 110_
00011 00010 1100
2 00011 00101 100_
00011 00010 100_
00011 00010 1001
1 00011 00101 001_
00011 00010 001_
00011 00010 0011
restore the value of A most significant bit of
register Q contain the quotient, i.e. 3 and
ain remainder 2.
rform Division Restoring Algorithm Dividend = Divisor 3
37. Non-Restoring Division For Unsigned Integer is less
complex than the restoring one because simpler operation
are involved i.e. addition and subtraction, also now
restoring step is performed. In the method, rely on the sign
bit of the register which initially contain zero named as A.
Non-Restoring Division Algorithm for Unsigned
Integer
38.
39. non-restoring division algorithm, which are described as follows:
ividend = 11, Divisor = 3, -M = 11101
N M A Q
4 00011 00000 1
00011 00001 0
00011 11110 0
3 00011 11110 0
00011 11100 1
00011 11111 1
2 00011 11111 1
00011 11111 1
00011 00010 1
1 00011 00010 1
00011 00101 0
ep, the corresponding value will be initialized to the registers, i.e., register A will contain value 0, register M will
ontain Dividend, and N is used to specify the number of bits in dividend.
ep, we will check the sign bit of A.
t of register A is 1, then shift the value of AQ through left, and perform A = A + M. If this bit is 0, then shift the v
A = A - M. That means in case of 0, the 2's complement of M is added into register A, and the result is stored int
will check the sign bit of A again.
t of register A is 1, then Q[0] will become 0. If this bit is 0, then Q[0] will become
dicates the least significant bit of Q.
t, the value of N will be decremented. Here N is used as a counter.
lue of N = 0, then we will go to the next step. Otherwise, we have to again go
perform A = A + M if the sign bit of register A is 1.
he last step. In this step, register A contains the remainder, and register Q
otient.
ontains the remainder 2, and register Q contains the quotient 3.
40. Memory Hierarchy
y unit that establishes direct communication with
alled Main Memory. The main memory is often
RAM (Random Access Memory).
ory units that provide backup storage are
ary Memory. For instance, magnetic disks and
pes are the most commonly used auxiliary
emory unit is an essential component in any digital computer since it is needed for storing programs a
cally, a memory unit can be classified into two categories:
41. mory :-
mory is known as the lowest-cost, highest-capacity and slowest-access storage in a computer sy
mory provides storage for programs and data that are kept for long-term storage or when not in imm
common examples of auxiliary memories are magnetic tapes and magnetic disks.
mory in a computer system is often referred to as Random Access Memory (RAM). This memor
directly with the CPU and with auxiliary memory devices through an I/O processor.
y
ontents of the main memory that are used frequently by CPU are stored in the cache memory so th
easily access that data in a shorter time. Whenever the CPU requires accessing memory, it first chec
into the cache memory. If the data is found in the cache memory, it is read from the fast me
CPU moves onto the main memory for the required data.
emory
e memory can be considered as a memory unit whose stored data can be identified for access b
e data itself rather than by an address or memory location. Associative memory is often referr
ddressable Memory (CAM).
y is a valuable concept in computer architecture that allows you to run large, sophisticated programs
n if it has a relatively small amount of RAM. A computer with virtual memory artfully juggles the con
ultiple programs within a fixed amount of physical memory. A PC that's low on memory can run the
ne with abundant RAM, although more slowly.
ry