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eMMC Hardware Controller
and Embedded Driver
Senior Capstone Project
May 27th, 2015
HARDWARE TEAM
John Dilger
Travis Johnson
Hunter Nichols
Sergy Pretetsky
SOFTWARE TEAM
Shania Asadipour
John Dilger
Kevin Jesse
James Giovacchini
Motivation
▪ Oracle is exploring different non-volatile memory options for future projects.
▪ eMMC is a potential alternative.
▪ Create a versatile eMMC host controller that can be used in various applications.
2
Project Goals
▪ Create hardware controller to translate requests to eMMC device
▪ Create software driver to issue these requests and manage state and error conditions
▪ Combine these into robust system to send and receive data from an eMMC device
▪ Attain highest performance from our chip ( 52MHz, double data rate, full bus width)
3
Our Approach
▪Initially relied heavily on hardware controller
▪Shifted more control to software driver
▪Allows software driver to control complex tasks
▪Minimizes hardware logic and simplifies eMMC management
4
Hardware Controller
Implementation
▪Typical transaction
a. Receive a command from software
b. Send it to eMMC
c. Determine other functions based on
command
▪Flag any errors that occur during a command
▪Custom commands for additional control
5
Hardware Controller Implementation
6
Driver Flow
7
■ Mediate between the user and hardware
■ Translate the user request into a chain of
command-response pairs
■ Next command occurs after the success of
the previous one
Driver Flow
8
■ Commands that fail are flagged by
hardware
■ Determine what the chip did after the error
■ Continue the operation to prevent
reporting failures to the user
Driver Implementation
9
The Need for a State Transition Model
■ Driver autonomously chooses the next command by state and current task
■ If command fails, driver remembers the state and corrects the error
Benefits of State Transition Model
■ Optimal sequence by the least necessary commands
■ Reliability of
■ Commands
■ Data sent/received from write/read
Results
10
Results
10
Software Driver
▪Basic driver functionality
▪Extra features
■ Data reliability and read/write retry
■ Maximum sector address
■ Unlimited size block operations
Ongoing Objectives
▪HS200 and HS400
▪The continuation of a Linux driver

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SDP_Presentation_template.pptx

  • 1. eMMC Hardware Controller and Embedded Driver Senior Capstone Project May 27th, 2015 HARDWARE TEAM John Dilger Travis Johnson Hunter Nichols Sergy Pretetsky SOFTWARE TEAM Shania Asadipour John Dilger Kevin Jesse James Giovacchini
  • 2. Motivation ▪ Oracle is exploring different non-volatile memory options for future projects. ▪ eMMC is a potential alternative. ▪ Create a versatile eMMC host controller that can be used in various applications. 2
  • 3. Project Goals ▪ Create hardware controller to translate requests to eMMC device ▪ Create software driver to issue these requests and manage state and error conditions ▪ Combine these into robust system to send and receive data from an eMMC device ▪ Attain highest performance from our chip ( 52MHz, double data rate, full bus width) 3
  • 4. Our Approach ▪Initially relied heavily on hardware controller ▪Shifted more control to software driver ▪Allows software driver to control complex tasks ▪Minimizes hardware logic and simplifies eMMC management 4
  • 5. Hardware Controller Implementation ▪Typical transaction a. Receive a command from software b. Send it to eMMC c. Determine other functions based on command ▪Flag any errors that occur during a command ▪Custom commands for additional control 5
  • 7. Driver Flow 7 ■ Mediate between the user and hardware ■ Translate the user request into a chain of command-response pairs ■ Next command occurs after the success of the previous one
  • 8. Driver Flow 8 ■ Commands that fail are flagged by hardware ■ Determine what the chip did after the error ■ Continue the operation to prevent reporting failures to the user
  • 9. Driver Implementation 9 The Need for a State Transition Model ■ Driver autonomously chooses the next command by state and current task ■ If command fails, driver remembers the state and corrects the error Benefits of State Transition Model ■ Optimal sequence by the least necessary commands ■ Reliability of ■ Commands ■ Data sent/received from write/read
  • 11. Results 10 Software Driver ▪Basic driver functionality ▪Extra features ■ Data reliability and read/write retry ■ Maximum sector address ■ Unlimited size block operations Ongoing Objectives ▪HS200 and HS400 ▪The continuation of a Linux driver