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3/2016 | THE RESEARCH CENTRE FOR SMART SENSORS & SYSTEMS INTEGRATION MAGAZINE  WWW.CTR.AT
times
Power Technologies  Processes 6 Assembly  3D Integration 8 Logistics  Automation 10 Key Applications 12
Specialissue
EPPL
Project
www.eppl-project.eu
Power semiconductors are
key enablers for modern,
smart products. Setting up
a pan-European pilot line dedicated to power semiconductor manufacturing, the
EPPL project enables a wealth of innovation of direct impact on our everyday life.
[ POWER SEMICONDUCTORS ]
Boosting Energy Efficiency
with New Electronics
Simon Grasser and
Werner Scherf (from left)
We at CTR use the CTRtimes magazine to provide
regular information on the research centre’s projects,
results and current research questions.
In this issue however we have dedicated all 16 pages to one
topic: the Enhanced Power Pilot Line (EPPL) project. It not
only has a remarkable geographical reach with 31 partners
from six nations in the consortium, but will also be of great
significance for Europe in the future.
The EPPL project focuses on developing next-generation
power semiconductors and forward-looking fabrication
methods in Europe. In addition to improving the technology
involved, another of its main objectives was to make energy-
efficient applications more commercially viable in the spirit
of “innovation meets manufacturing and the market”.
We will give you details of the work performed and the
results of the EPPL project on the following pages. They are
proof of how science and industry can collaborate effective-
ly to shape Europe’s future and enhance its competitive-
ness.
The good network of partners consisting of application-ori-
ented research centres, universities, colleges, centres of
excellence and partners in business and industry gave rise
to a vital dynamic that drives innovations faster.
This results in gains for both the project partners and the
general public alike: science and application-oriented re-
search centres – like us – promote the exchange of expertise
and tackle challenges with practical implications. Industry
benefits from the expert knowledge, special facilities and
technological findings in working towards future business
success. And the general public – that is to say all of us –
benefit from new, energy-efficient products and applications
in energy generation, the automotive industry and medical
devices. You will find further information on the following
pages.
We are proud of having been part of the consortium and
hope you find reading this issue informative.
Werner Scherf 	 Simon Grasser
Chief Executive Officer 	 Chief Financial Officer
CTR Carinthian Tech Research AG
Focus on EPPL project –
faster together
“The only way to do great
work is to love what you do.”
Collaborative research
to maintain leadership
Electronic components are a key enabler for smart
systems to address the Grand Challenges in society.
In fact, innovative technologies and smart manufactur-
ing act as a source of innovation in many areas of our
daily lives. Innovative cars, smart production equipment,
efficient use of energy, assisted living and modern com-
munication, to name just a few, are enabled by power
electronics components.
In its Europe 2020 initiative, the European Commission
set ambitious targets to reduce greenhouse gas emis-
sions, improve energy efficiency and establish electric
vehicles in Europe. Power semiconductors designed and
manufactured at competitive cost and in sufficient quan-
tities in Europe are key enablers here, and the EPPL pro-
ject was launched to play a major role in achieving these
targets.
Collaborative innovation at a European level is vital to
speeding up time to market. It was the strong focus on
practical application that made the EPPL results and
achievements attractive for industry. The financial con-
tributions by the ENIAC JU and the member states in-
volved also supported the partners significantly in meet-
ing their challenging project targets. Manufacturing was
another area fostered in the EPPL project, as 300mm
wafer-based technologies pave the way to competitive
cost structures for power solutions made in Europe.
A project volume of €74 million and the commitment on
the part of 31 partner organisations underlines the im-
portance of EPPL for the semiconductor industry in Eu-
rope. The project objectives are fully in line with Infine-
on’s strategy and we are therefore proud and honoured to
have led this powerful partner network, thus contributing
our experience in this area to the EPPL project and to
Europe’s technology advancement.
Many thanks to all the stakeholders for making these
great achievements happen.
Sabine Herlitschka	 Thomas Reisinger
Chief Executive Officer	 Board Member Operations
Infineon Technologies Austria AG
ctr times special issue EPPL project
02
Photos©HelgeBauer,MartinSteinthaler,HenryWelisch(2),AlunFoster(2)
When people think of the future, they tend to assume that
the current rate of progress will continue for long periods
to come. However, experience shows that the rate of progress is
not constant and depends largely on investments and strategies.
For this reason Infineon Technologies was proud to lead the col-
laborative project – Enhanced Power Pilot Line (EPPL). The main
purpose of the project is to expand European capabilities and
competitiveness in developing and producing power electronics
for semiconductor components.
A total of 31 European partners from industry and research col-
laborated to advance production technology for power semicon-
ductors, an industry segment where Europe still holds the leading
position. Europe is home to the first power semiconductor facil-
ities fabricating devices using 300mm wafer technology, i.e. on
silicon wafers that are extremely thin – hardly thicker than a sheet
of paper. With EPPL, Europe further expanded this production ad-
vantage.
The partner organisations cover the entire industry and research
value chain in 300mm power semiconductor manufacture, com-
prising material research with a focus on silicon, semiconductor
development that includes 3D integration and packaging, and
related developments in logistics and automation technologies.
After three years of collaborative research in the previous ETP300
project (2012–2015) and three years in EPPL (2013–2016), we
reached our primary objective of expanding the wafer size limit for
power semiconductors made in Europe to 300mm wafer diame-
ters. The first products now qualify for release on the international
market, and exciting new products will be created using advanced
power semiconductor technologies. This magazine summarises
some of the results of the EPPL activities and accomplishments
during the project.
Three years passed quickly and it is now time to look at the very
exiting results and say thank you to the stakeholders involved. This
applies to the ENIAC JU and the public authorities in the con-
tributing member states for their financial support to the EPPL
project. We are also indebted to the project officer at the ENIAC JU
for the professional guidance given during the project. But most of
all we are grateful to the consortium members for their outstanding
spirit of collaboration and goal-oriented approach, which enabled
the EPPL project to achieve these outstanding results. Together,
we strengthened European industry and research by innovating
advanced semiconductor products made in Europe. Enjoy reading.
Cristina De Luca	 Johann Massoner
Project Manager	 Project Coordinator
Infineon Technologies Austria AG
EPPL innovation meets
power semiconductors
Systemic 
strategic impact
Apilot line project, EPPL was co-funded within the
framework of the ENIAC Joint Undertaking (ENIAC
JU) by the European Union, the ENIAC member states
and their national funding authorities. One of the key
achievements of ENIAC JU, if not its most important
accomplishment, was the successful implementation
of the pioneering pilot line concept. Having allocated
around €1.8 billion to 14 pilot line projects over two
years, ENIAC JU funded a mechanism to take Euro­
pean RD electronics from lab scale towards produc-
tion readiness with unparalleled systemic and strategic
impact. This strategic implementation – a first in Europe
– was only made possible by the resolute and well-timed
cooperation between the respective national authorities
and ENIAC JU.
In 2014, a new generation of public-private partner-
ships was established under the H2020 programme and
the Electronic Components and Systems for European
Leadership Joint Undertaking (ECSEL JU) took over the
ENIAC JU projects, continuing to further and strengthen
its impact. Through new calls for proposals and new initi-
atives e.g. Lighthouses, ECSEL JU strives – together with
all its stakeholders – to create more opportunities and
leverage investments on levels ranging from the local and
regional to the pan-European.
EPPL belongs to a strong and continuous series of in-
vestment commitments (EPT300, eRAMP, PowerBase,
SemI40 projects) supported by ENIAC JU/ECSEL JU
and the countries’ national or regional funding authori-
ties, with the ambitious aim of reinforcing and advancing
one of the core strengths of European electronics: pow-
er semiconductors and the industries that rely on them,
resulting in growth and jobs. EPPL is a step forward in
reaching the ultimate goal of excellent electronics made
in Europe.
As a programme officer, it was a rewarding experience for
me to see how EPPL successfully developed from ideas
to real life implementation. It was a long and challeng-
ing path but the participants’ motivation and the coordi-
nator’s driven leadership resulted in everyone going the
“extra mile” to make it happen.
Simona Rucareanu	 Bert De Colvenaer
Programme Officer 	 Executive Director
ECSEL Joint Undertaking
03
ctr times special issue EPPL project
ctr times special issue EPPL project
04
4Next Generation
Technologies
SFET
Cool
MOS™
IGBT ACD
4Key
Applications
Renewable
Energies
Automotive
Energy
Systems
Automotive
LED
Illumination
Healthcare
3.5 years of
joint research
31partners
20 industrial partners
5 universities
6 research 
technology organisations
■ ■ ■ ■ ■ ■ ■ ■ ■ ■
■ ■ ■ ■ ■ ■ ■ ■ ■ ■
■ ■ ■ ■ ■ ■
■ ■ ■ ■ ■
€49mindustryinvest
m
ent in Europe
€23m
p
ublicfunding
€10.8m
EC
|
€12.2mnational
€72m
total project
volume
6 European
countries
05
ctr times special issue EPPL project
~ 239 experienced researchers
~ 30 Phd students
4
technology
work
packages 3
application
work
packages
• Renewable Energies
• Automotive Applications
• Healthcare
Advanced Power Semiconductor Pilot Line •
Technology  Demonstrator Research •
Semiconductor Assembly  3D Integration •
Advanced Logistics and Automation •
7PhD
theses 11MSc
theses
124scientific
publications
AdvancedPower
Semiconductor
PilotLine
WP1
WP9 Dissemination, Exploitation  Standardisation WP10 Project Management
Application I:
Renewable
Solar Energy
WP5
Application IV:
Healthcare
WP8 WP6
Application III:
Automotive LED
(replaces former WP7)
WP6
Application II:
Automotive
Technology
DemonstratorRe-
search
WP2
Semiconductor
Assemblyand
3-DIntegration
WP3
AdvancedLogistics,
Automation
YieldLearning
WP4
EPPL PROJECT
Key FactsAdressing technological challenges together with commercial competitiveness and energy
efficiency, EPPL aimed at securing Europe’s leading position in power semiconductors.
The achievements are groundbreaking:
21 % female
 79 % male
27Process
Innovations
14Original
Patents
16Product
Innovations
-15% up to -50%
size reduction
-15%
loss
reduction
compared to previous
technology generation
ctr times special issue EPPL project
06
T
he EPPL project’s prime objective is to
build a fully functional, yield-proven
pan-European pilot line for fabricating
next generation power semiconductors. The
unique opportunities offered by 300mm manu-
facturing technology, combining higher energy
and cost efficiency with better production yield
and improved device reliability, are demon-
strated on four next-generation technologies -
ACD7, SFET6, CoolMOSTM
and IGBT4.
A wide range of technologies, materials, pro-
cesses and equipment is needed to manufac-
ture the different power semiconductors, mak-
ing high-volume fabrication on one pilot line
extremely challenging. Processes and equip-
ment had to be specifically defined and adapt-
ed for the manufacture of the next generation
demonstrator technologies using the 300mm
wafer platform. To ensure efficient production,
special attention was given to new methods and
tools for the various production steps and pro-
cesses. Examples range from a new gas cabinet
design (partner ALES) for efficient (pilot) line
operation to novel plasma doping solutions de-
veloped by IBS that facilitate highly cost-effi-
cient implantation.
NEW MATERIALS  TOOLS
Increasing miniaturisation of semiconductor de-
vices leads to higher power densities and thus
stronger thermo-mechanical loading of the sem-
iconductors and metallisation layers. Improved
materials are required to withstand these in-
creasing temperatures and thus guarantee full
device functionality. With special emphasis put
on further improved device reliability, metalli-
sation development became one main project
focus. Related RD activities hence aimed at
new materials, but also on the analytical tools
Novel products using new generation power semiconductors
and a pilot line for high-volume fabrication based on 300mm
technology are the EPPL project’s main goals. To enable that,
a wide range of new methods and tools had to be developed.
The comparison of the wafers of the current (above) and next generation
CoolMOS™ devices shows the significant shrinkage achieved. © Infineon
[Work Package 1  Work Package 2 ]
Next generation power
semiconductor development
ALES Gas Cabinet
© ALES
07
ctr times special issue EPPL project
needed for successfully producing next genera-
tion devices and on characterising the devices
throughout the development phase.
Research partner CEST, together with Infineon,
developed a new copper-based metallisation
process designed to meet these demands. At
CTR Carinthian Tech Research the deposition
of metallisation layers onto 300mm silicon wa-
fers was modelled to understand the effect of
residual stresses on maufacturability, e.g. the
influence of wafer bow on automated wafer
handling or high precision lithography.
METHOD DEVELOPMENT
The Montanuniversität Leoben, KAI and the
Max-Planck-Institut für Eisenforschung jointly
investigated the degradation of metal layers
caused by repetitive heating during device ap-
plication. One aspect in this research dealt with
method development to allow faster evaluation
of newly developed metallisations as to their
resistance to degradation. In parallel, material
behaviour during application was investigated
in detail to identify the underlying mechanisms
that dominate metal degradation. Graz Univer-
sity of Technology for instance examined mi-
croscopic defects in silicon that could originate
either from production, e.g. by proton implan-
tation, or application, with the goal of gaining a
better understanding of such defects’ influence
on product performance and reliability.
INTERVIEW WITH PETER IRSIGLER AND JOSEF FUGGER
Three questions to
the work package leaders
1What was the greatest challenge in
these work packages?
“As many processes and base materials
in power technologies are very specific,
the greatest challenge was adopting these
steps for the 300mm manufacturing
platform. The material had to satisfy the
demands of each technology. Ultra-thin
wafer and high-temperature processing
for example had to be developed from the
very beginning. In some cases the stan­
dard equipment available on the market
did not meet the requirements and had to
be modified to our needs.”
2What were the highlights?
“All four demonstrators were developed
and qualified successfully to sched-
ule. They have created the basis for
silicon-based power technologies at In-
fineon and all such future products will
be developed and produced on 300mm
wafers. The next generation based on
300mm manufacturing capabilities
shows a great improvement in produc-
tivity (e.g. CoolMOS™, ACD7). Close in-
teraction and collaboration between all
the partners proved to be a key success
factor. The academic partners’ latest
results in material research were quickly
incorporated in technology development
and production.”
3What will be the sustainable impact
for the semiconductor industry?
“The 300mm platform developed is set-
ting a new productivity benchmark in this
sector. Such advanced manufacturing
capabilities will drive further innovation,
unlock potential and enable new features
in technologies and related products.
New materials and characterisation
methods will support engineers in design-
ing more powerful and at the same time
more robust semiconductor products.”
PROVEN ENERGY EFFICIENCY
In several development cycles, manufactura-
bility and performance of the next generation
power devices were optimised and their func-
tionality and reliability proven in final qualifi-
cation tests. The results of the validation and
qualification tests show that the initial goals
have been reached. The functionality of the
300mm technology-based power pilot line was
shown, and significantly improved energy effi-
ciency proven for all device types.
The project complemented Infineon’s design
and product development competence with the
expertise of various industrial and academic,
Austrian and European partners. The ensuing
research activities contributed significantly to
the success of product development of both
the next-generation power technologies and
the new and emerging applications relying on
them. Furthermore, scientific key results were
published in numerous conference proceedings
and peer-reviewed papers.
Bow of a 300mm wafer induced
by residual stresses due to
wafer metallisation. The wafer
bow influences wafer handling
and processing. © CTR
An electron back scatter diffrac-
tion (EBSD) image of a copper
thin film. This analysis allows
researchers to quantify the
influence that deposition and
application conditions have on
the material’s microstructure.
© Montanuniversität Leoben
Peter Irsigler,
Director Technology,
Infineon Technologies
(Villach/Austria)
Josef Fugger, Managing Direc-
tor, KAI Kompetenzzentrum
Automobil- und Indus­trie­
elektronik (Villach/Austria)
ctr times special issue EPPL project
08
M
iniaturisation and integration of greater
functionality are major trends in power
electronics, which require possibly low
parasitic effects for optimal signal transmission
alongside the ability to work under increasing
temperature demands. Assembly and pack-
aging thus become key objectives calling for
innovative technologies and components. A main
aspect in miniaturisation is using the third
dimension, which is highly challenging in par-
ticular with power devices. The best technology
is thus needed, requiring a thorough in-depth
understanding of processes and materials.
The work package pooled experts along the full
value chain, involving suppliers of materials like
Plansee alongside equipment providers SPTS
and EVG, semiconductor manufacturers Infineon
and ams, and packaging foundry Nanium. Their
work was supported by leading European re-
search and technology organisations, such as
the Fraunhofer IISB, CEA-LETI, INL and CTR
contributing
• research on technologies for the chip/package
interface, including pre-assembly
• research on 3D integration technologies with
an interposer applicable for power devices, in-
cluding a first pilot line
• research on a 3D test vehicle demonstrating
the technologies, and on reliability of chips
from 300mm devices for power modules
PROCESSES  MATERIALS
Investigating the processes affecting the chip/
package interfaces included liner sputtering,
galvanic copper (Cu) deposition and Cu struc-
turing to deposit Cu backside metallisation on
power chips. A dedicated thermal laser sepa-
ration technology was developed for bonded
wafer stacks with silicon dioxide interfaces
and interposer wafers with through-silicon vias
(TSV) and redistribution layers (RDL). This led
to significantly reduced in-die stresses and
chip edge defects. Another team investigated
extending Advanced Process Control methods
to assembly and packaging of semiconductor
devices. Initial results on wedge wire bonding
showed encouraging process improvements. In-
fineon meanwhile successfully applied a highly
conductive die attach adhesive for assembling
125μm thin dice and collaborated with Plan-
see on improved heat dissipation interfaces
of molybdenum composites with mould com-
pounds and silicon. Molybdenum is particularly
attractive since it has a coefficient of thermal
expansion close to that of silicon, thus intro-
ducing less thermal stress than the normally
used copper.
3D SYSTEM INTEGRATION
Led by ams, seamless 3D system integration for
power applications was intensively researched.
The processes on the ams interposer pilot line
were refined and a tungsten (W) TSV module
developed. Research addressed industrial high
etch rate recipes and metal and dielectric layer
deposition for TSV technology with an aspect
ratio 5:1 (TSV depth to diameter). Apart from
the W-TSV, a TSV module with Cu metallisation
and a Cu RDL were developed, thus achieving
[ Work Package 3 ]
3D Integration 
Chip Interfaces
Semiconductor assembly and 3D integration directly
impact performance, lifetimes and costs of power devices.
In particular research into materials was of critical impor-
tance for improving electrical properties, heat dissipation
and stress management.
3D demonstator: silicon interposer with stacked power devices © CEA-LETI
Scanning microscopy
image of the top edge of a
diced 3D chip with solder
balls © Fraunhofer IISB
09
ctr times special issue EPPL project
considerably improved TSV and line resistanc-
es: first interposer samples have TSV resistanc-
es as low as 3mOhmTSV. Die-to-wafer stacking
(D2W) complemented the 3D technology mod-
ules.
As 3D devices are sensitive to defects on both
sides, smooth sidewalls with minimum chip out
are required. Thermal laser separation (TLS)
again was studied and optimised for such 3D
applications. A final main 3D topic was fan-out
wafer-level packaging (FOWLP) with through-
mould vias. Following investigation of various
concepts, temporary wafer bonding technology
for FOWLP was brought to volume production
readiness.
TEST VEHICLE  RELIABILITY
To demonstrate 3D system integration viability,
a dedicated technology test vehicle for power
applications was designed and realised. In-
corporating an Infineon power device, an ams/
CEA-LETI interposer and Cu pillar D2W, the
co-design was supported by extensive thermal
and thermo-mechanical simulation.
In parallel, the reliability of chips from the
300mm wafer line in power applications was
studied under the lead of Infineon Warstein.
Module reliability investigations focused on
high temperature reverse bias, high tempera-
ture gate stress and high humidity/high temper-
ature reverse bias, all of which were concluded
successfully. Correlations of the chips’ static
WP 3 TASKS IN FOCUS
“Innovation has become a collaborative process, linking firms and research institutions.
Our results constitute scientific and technical knowledge produced, acquired, pooled
and systematised by the whole work package team.”
Franz Schrank, Group Manager 3D and Wafer Level Integration, ams AG (Unterpremstätten/Austria)
Thin fan-out wafer-level
packaged 300mm wafer with
large wafer bow © Nanium
Side view of thin fan-out
wafer temporarily bonded to
a handling wafer © Nanium
Semiconductor Assembly
and 3D Integration
WP3 TASK II: 3D SYSTEM
INTEGRATION TECHNOLOGIES
Silicon interposer technologies 
wafer level package, interposer
pilot line, scale up of interposer
technology …
TASK IV: RELIABLIITY AND
FAILURE ANALYSIS
Investigation, testing, reliability,
risk assessment …
TASK III: 3D SYSTEM INTEGRATION 
TECHNOLOGY TEST VEHICLE
Definition, embedded testing,
test interfaces, test vehicle
manufacturing …
TASK I: CHIP/PACKAGE
INTERFACE AND PREASSEMLY
Chip metallisation, Handling
methods, Thermal Laser Separation
(TLS), Advanced Process Control
(APC), Innovative die-attach, heat
dissipation, material packaging …
electrical parameters using 300mm wafer tech-
nology were found to be within the limits, and
no differences found between qualification and
reference modules, illustrating the maturity of
the technology solutions developed in EPPL.
ctr times special issue EPPL project
10
[ Work Package 4 ]
Advanced Logistics 
Automation
The combination of intelligent logistics with a high level of manufacturing automation is one cornerstone
in implementing the world’s first 300mm pilot line for power microelectronics, and directly reflects
Infineon’s strategy for achieving manufacturing excellence.
T
he optimal utilisation of advanced auto-
mation and intelligent logistics nowadays
is a necessity for establishing a high-mix,
high-volume 300mm wafer manufacturing pilot
line. Other than with 300mm CMOS fabs, sev-
eral of the specific processing tools for power
electronics are not automated, and established
mass production standard logistics are barely
applicable. Moreover, many next-generation
power devices involve special thin wafers,
requiring singular processes, excellent cross-­
functional know-how and creating unique chal-
lenges for system automation in a front-end
wafer facility.
ADVANCED WAFER HANDLING
Defining new transportation and handling proce-
dures required combining theoretical and prac-
tical approaches. For instance, a finite element
method (FEM) simulation model was created in
cooperationwithCTRtoidentifysuitablehandling
and storage solutions for the different (thin)
wafer substrates. The Technische Universität
Dresden meanwhile studied e.g. the actual sus-
ceptibility of the wafers to vibrations, providing
the very first reliable figures on vibration dam-
age thresholds. Meanwhile, different thin-wafer
handling concepts, from edge grippers to Ber-
noulli end effectors and magnetic handling sys-
tems, were compared and ranked. The experts
at the Stralsund University of Applied Sciences
then devised and built a demonstrator based on
a contactless end effector that is now being val-
idated by Infineon Technologies Dresden against
standard end effectors already in use in the fab.
View of the clean room for the 300mm power pilot line
at Infineon Technologies Dresden © Infineon Technologies Dresden
“Logistics and automation are an emerging key factor in
power semiconductor fabrication. They are nowadays in-
dispensable in establishing high-performance, high-volume
manufacturing facilities for innovative products that meet
the customer demands and are seamlessly integrated into
the supply chains.”
ctr times special issue EPPL project
REFINED FAB LOGISTICS
Exploiting the advances in process automation to
full potential and assuring maximum efficiency of
the pilot line, the second key objective dealt with
dedicated logistics. A comprehensive top-layer
fab simulation model was created for the
300mm wafer start scenario to quantify e.g. the
influence of the product mix on key performance
parameters like utilisation, flow factor and cycle
times. One level deeper, dedicated simulation
models e.g. for the 300mm wafer transporta-
tion system were developed in cooperation with
the Technische Universität Dresden to study the
material flow of the handling systems. Enabling
a convenient variation of key parameters, like
the number of vehicles, automation strategies
and other factors, these unique models proved
invaluable for strategic decision-making and se-
lecting the best concepts for the pilot line and
future ramp phases.
The research into advanced logistics also creat-
ed operation curves for the special equipment
used in the thin wafer flow. Some of the new
tools have a special tool loading behaviour that
requires specific automation concepts for wafer
transportation and storage close to those tools
to integrate them most efficiently. Finally, the
factors that influence the complexity of power
manufacturing were quantified, visualised and
critically assessed. Based on this work, strat-
egies are now being defined to reduce (super­
fluous) complexity.
ENHANCED LINE STABILITY
In addition to achieving best manufacturing
performance, yield improvement is needed for
high stability and high efficiency. Power semi-
conductors introduce a number of essential but
critical new materials, from noble elements to
organic components that can cause corrosion.
The control of the cleanroom as well as the
conditions in mini-environments, e.g. wafer con-
tainers, are hence of key importance. adixien
Vacuum provided demonstrators that were used
to analyse particles and organic components
that occur e.g. in the air within the container at
different process steps. Analyses for metals and
organic components were performed at Infineon
Technologies Dresden and the Fraunhofer Insti-
tute for Integrated Systems and Device Tech­
nology (IISB) in Erlangen. The results provided
the basis for special container cleaning proce-
dures and tool dedications that efficiently avoid
yield loss related to critical contaminants.
The results of the RD activities in the work
package were continuously used alongside the
qualification of the different technologies and
products in the pilot lines, thus achieving a
highly automated fab with best-in-class key
parameters.
Simulation model of the
automated material handling
system © Technische
Universität Dresden
Demonstrator for analyses
of the micro-environment
within the FOUP
© Germar Schneider / Infineon
Technologies Dresden
11
STATEMENT
Trending topics in logistics  automation
Intelligent logistics had to be defined to meet the
demands according to development speed and
cycle times. Since every lot creates huge amounts
of information that has to be managed and used for
controlling the different processes, vast databases
are needed to store and process all the pertinent
data. Based on the high automation level of the pilot
lines, a manufacturing area was established that
uses the latest trends from the Internet of Things.
Virtual fab simulation and big data handling will
thus play an important role also in the future in
increasing manufacturing productivity and competi-
tiveness through digitalisation.”
“Implementing highly automated tools and
processes for 300mm power pilot lines was
a very challenging task that involved closely
coordinated collaboration across disciplines
and teams. Many processes for new semi­
conductor technologies and products had
to be automated without reverting to classic
fab automation standards. Additionally, the
manufacturing floor had to be converted from
a low-mix/high-volume to a high-mix/high-­
volume fab producing a range of different
products with individual customer due dates
in the same area.
Germar Schneider
Manager Thin Wafer Handling
Infineon Technologies
(Dresden/Germany)
ctr times special issue EPPL project
12
Innovation for
Industry and Applications
[ Application 1 ]
Solar Power/Photovoltaics (PV)
Our aim was a holistic design approach to reduce PV inver-
ters’ volume, weight and bill of materials. The technologi-
cal key was increasing the switching frequency by a factor of
three; as this normally decreases efficiency, we opted for a soft-
switching topology. Together, these two factors allowed saving
around 50% in weight and volume of the inverter’s inductive
components, and achieving slightly better efficiency. Regarding
the semiconductor devices, we focused on efficiency and relia-
bility, and thus chose Infineon’s silicon-based next-generation
semiconductors (CoolMOS™). Measurements, including EMI,
validated our approach.
As the quality leader in the global solar energy market,
Fronius has been researching innovative technologies for the
PV industry for more than 20 years. This application is another
step towards 24 hours of sun, Fronius’ vision of a future where
100% of the world’s energy needs are met by renewable
sources. With 24 hours of sun, we provide a vital, sustainable
vision for the energy revolution and concentrate on solutions to
generate, store, distribute and consume solar energy smartly,
efficiently and economically. This vision will provide a reliable,
clean, independent and sustainable supply for both individual
consumers and whole countries.
[ Application 2 ]
Automotive Body Control Module
Many automotive applications rely on semiconductor devices,
such as smart high-side switches or power MOSFETs, for
tasks like power switching and monitoring output loads. Semi-
conductors for such automotive applications have to meet very
special requirements, like driving within a wide range of loads
and temperatures at possibly small power losses, and must sup-
port safety mechanisms and diagnostic features. A key example
of such an application is a Body Control Module, i.e. the central
control unit for low- and medium-rated electrical power loads,
ranging from interior/exterior lighting to heaters and door locks.
A fully functional Body Control Module demonstrator has been
developed and qualified according to the latest automotive
standards. This prototype validated the features and advantages
of the new power devices in an improved high-performance
application and proved the quality and functionality of EPPL’s
next-generation semiconductor devices.
The following improvements were achieved:
• reduced package size and weight compared to current, equiv-
alent components
• expansion of the portfolio towards higher load current-capable
power semiconductors by introducing lower resistance models
• improved control performance to reduce overhead losses
• improved electromagnetic compatibility
“Taking a holistic design approach, we managed
to reduce the volume, weight and costs of the
photovoltaic inverters, which also resulted
in improved electrical efficiency.”
Günter Ritzberger, RD Manager Power Electronics,
FRONIUS International (Wels/Austria)
“Our new Body Control Module demonstrates
the applicability of the new power semiconductor
technology in a high-performance automotive system.
It supports enhanced current controlling capability,
full diagnosis and enhanced reliability.”
Gregor Bugla, Advanced Engineering, Lear Corporation (Kronach/Germany)
13
ctr times special issue EPPL project
Creating a range of unique manufacturing processes and technologies,
EPPL paved the way from research to manufacturing and the market.
This enabled a multitude of product innovations of direct impact
on our everyday high-tech life.
[ Application 3 ]
Automotive LED
Modern, innovative and efficient: LED-based headlights
for cars capture buyers’ hearts at first sight. LED lighting
is thus now being adopted quickly in the volume car market,
where it is already used in a variety of different functions – from
turn signals to low beam, daytime running, cornering and matrix
lights. This demands innovative, reliable and cost-efficient
power conversion solutions.
The automotive LED demonstrator system developed by
Infineon involved a combination of next-generation “EPPL”
power MOSFETs with an efficient DC/DC power conversion
controller. Designed and developed in a compact package, the
DC/DC unit meets the most stringent automotive quality and
reliability standards, including EMC (epoxy moulding com-
pound), ESD (electrostatic discharge) and safety requirements.
Full validation of the DC/DC confirmed it satisfies all relevant
requirements. Its single coil architecture provides the flexibil-
ity to address different lighting functions with one setup, and
enables high energy conversion efficiency and a significant
reduction in components and board space. This, in turn, results
in significantly reduced overall system costs for applications
that combine different lighting functions.
[ Application 4 ]
Healthcare
Driven by the company’s comprehensive sustainability strat-
egy, the EPPL project came at the right time for Philips
Healthcare. The innovation activities focusing on energy-effi-
cient medical power converters were split into two parts - the
power converter itself, aimed at improving performance and
reducing size and costs, and a Healthcare Platform Demonstra-
tor for two different medical application domains:
• Interventional vascular imaging, and
• Computer tomography imaging
During the project we cooperated closely with scientific and
industrial partners. Eindhoven University of Technology fo-
cused their research on a kW power AC/DC converter, creating
converter topologies that significantly increase overall system
efficiency. Combining new modelling and control techniques
with improved EPPL devices, they managed to go far beyond
the state-of-the-art. HELIOX worked on interleaving four boost
converter modules to operate as a power factor converter, which
is equally attractive as it provides efficiencies of around 97%.
All the work package’s main objectives were met, creating
significant innovation that will be reused in future medical
products. The project enabled a shorter time to market, and we
expect to achieve commercial exploitation with a significantly
shortened lead time.
“Sharing ideas and making use of each partner’s
strength helped us to generate innovative power
semiconductor solutions and a platform to take
the next step into sustainable solutions and
lower the cost for healthcare.”
Harry Marinus, Group Leader Power Management Design Group,
Philips Innovation Services - Electronics (Eindhoven/The Netherlands)
“LED lighting is spreading to the volume car market.
The DC/DC demonstrator shows the advantages of
high conversion efficiency and flexible architecture:
reduced board space and weight with multiple
functions at reduced cost.”
Christian Gurschler, Product Manager, Infineon Technologies (Padua/Italy)
ctr times special issue EPPL project
14
Consortium
CTR
TU Graz
MU Leoben
CEST
Fronius
ams
Plansee
KAI
EV Group
Infineon Munich
Infineon Dresden
Fraunhofer IISB
Philips DMC
TU Dresden
FH Stralsund
MPI-E
Lear
Philips Med
TU Eindhoven
Heliox
EMOSS
Infineon Padova
CEA-LETI
IBS
adixien Vacuum
Air Liquide
ECP
SPTS
INL
NANIUM
Infineon Villach
The EPPL consortium brought together large industry with small and medium enterprises,
high-tech research institutes and leading universities throughout Europe.
Financially supported by national grants from Austria, Germany, The Netherlands, France,
Italy, Portugal and the European Commission within the ENIAC Joint Undertaking the
project strengthened Europe’s leading position in power semiconductors.
15
ctr times special issue EPPL project
Portugal
Consortium members:
• Laboratorio Iberico
Internacional de Nanotecnologia (INL)
• Nanium S.A
Funding institutions:
• FCT (Fundação para a Ciência e a Tecnologia) by
the Ministry of Education and Science of Portugal
(Ministério da Educação e Ciência)
The Netherlands
Consortium members:
• Philips Medical Systems Nederland B.V 
• Technische Universiteit Eindhoven
• Heliox B.V.
• EMOSS B.V
Funding institutions:
• NL Agency (Agentschap NL) by the
Dutch Ministry of Economic Affairs
(Ministerie van Economische Zaken)
France
Consortium members:
• CEA-LETI (CEA - Commissariat à l’Energie
Atomique et aux Energies Alternatives; LETI -
Laboratory for Electronics  Information Technology)
• Ion Beam Services 
• adixien Vacuum Products
• Air Liquide Electronics Systems
• Entegris Cleaning Process 
• SPTS Technologies SAS
Funding institutions:
• Dgcis (Direction générale de la compétitivité,
de l’industrie et des services) by the French
Ministry of Craft, Commerce and Tourism
Italy
Consortium members:
• Infineon Technologies Italia S.r.l.
Funding institutions:
• Italian Ministry of Education, University and Research
Austria
Consortium members:
• Infineon Technologies Austria AG (project leader)
• CTR Carinthian Tech Research AG
• Technische Universität Graz
• Montanuniversität Leoben
• CEST Kompetenzzentrum für elektro­chemische
Oberflächentechnologie GmbH
• Fronius International GmbH
• ams AG
• Plansee SE
• KAI Kompetenzzentrum Automobil- und
Industrieelektronik GmbH
• EV Group E. Thallner GmbH
Funding institutions:
• Austrian Research Promotion Agency (FFG) on behalf
of the Austrian Ministry for Transport, Innovation and
Technology
Germany
Consortium members:
• Infineon Technologies AG / Neubiberg
• Infineon Technologies Dresden GmbH
• Fraunhofer Gesellschaft E.V., Institute for
Integrated Systems and Device Technology (IISB)
• Philips Medical Systems DMC GmbH 
• Technische Universität Dresden
• Fachhochschule Stralsund
• Max-Planck-Institut für Eisenforschung (MPI-E)
• Lear Corporation GmbH
Funding institutions:
• Federal Ministry of Education and Research of Germany
supported by grants from and the ENIAC Joint Untertaking
ctr times special issue EPPL project
16
LEGAL NOTICE
Published and distributed by CTR Carinthian Tech Research AG,
High Tech Campus Villach, Europastraße 12, 9524 Villach/Austria,
T: +43 4242 56300-0, E: info@ctr.at, www.ctr.at
Edited by EPPL project coordinator Infineon Technologies Austria,
CTR times special issue coordination by Birgit Rader-Brunner (editor in chief)
Layout/graphics by www.designation.at; Printed by satzdruckteam/Druck-
botschafter; Picture credits: All pictures and graphic arts are protected by
copyright and were provided by courtesy of the EPPL partners. Copying
the pictures for private or commercial use requires the permission of EPPL
project coordinator or the owner of the pictures.
The EPPL timeline
April 2016
Milestone: 100
scientific publications
2013 2014
2015
2016
http://bit.ly/29sXPAt
Photos:©EPPLProject/KK/Semikron
March 2016
Year 3 meeting
(Erlangen/Germany)
September 2016
EPPL final general review
(Villach/Austria)
March 2016
EPPL scientific work
wins Semikron Award
(Nuremberg/Germany)
June 2014
EPPL review meeting
at Infineon Technologies
(Dresden/Germany)
May 2015
“Open Innovation Day” –
InnoDay 2015 (Villach/Austria)
June 2015
Year 2 review
(Brussels/Belgium)
April 2013
EPPL project kick off at
Infineon Technologies
(Villach/Austria)
January 2014
Online launch
of the EPPL video
www.eppl-project.at
March 2014
EPPL first year meeting
at Infineon Technologies
(Villach/Austria)
April 2014
EPPL was selected as
a Multi-KETs Pilot
Lines Project (Delft/
The Netherlands)
September 2014
Multi Key Enabling Pilot Line
Demonstration of EPT300 and
EPPL Project at Infineon
Technologies (Villach/Austria)
October 2013
First semester meeting at
INL – International Iberian
Nanotechnology Laboratory
(Braga/Portugal)
July 2013
EPPL website
is online
www.eppl-project.eu

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ctrtimes_EPPL_web-fin

  • 1. 3/2016 | THE RESEARCH CENTRE FOR SMART SENSORS & SYSTEMS INTEGRATION MAGAZINE WWW.CTR.AT times Power Technologies Processes 6 Assembly 3D Integration 8 Logistics Automation 10 Key Applications 12 Specialissue EPPL Project www.eppl-project.eu Power semiconductors are key enablers for modern, smart products. Setting up a pan-European pilot line dedicated to power semiconductor manufacturing, the EPPL project enables a wealth of innovation of direct impact on our everyday life. [ POWER SEMICONDUCTORS ] Boosting Energy Efficiency with New Electronics
  • 2. Simon Grasser and Werner Scherf (from left) We at CTR use the CTRtimes magazine to provide regular information on the research centre’s projects, results and current research questions. In this issue however we have dedicated all 16 pages to one topic: the Enhanced Power Pilot Line (EPPL) project. It not only has a remarkable geographical reach with 31 partners from six nations in the consortium, but will also be of great significance for Europe in the future. The EPPL project focuses on developing next-generation power semiconductors and forward-looking fabrication methods in Europe. In addition to improving the technology involved, another of its main objectives was to make energy- efficient applications more commercially viable in the spirit of “innovation meets manufacturing and the market”. We will give you details of the work performed and the results of the EPPL project on the following pages. They are proof of how science and industry can collaborate effective- ly to shape Europe’s future and enhance its competitive- ness. The good network of partners consisting of application-ori- ented research centres, universities, colleges, centres of excellence and partners in business and industry gave rise to a vital dynamic that drives innovations faster. This results in gains for both the project partners and the general public alike: science and application-oriented re- search centres – like us – promote the exchange of expertise and tackle challenges with practical implications. Industry benefits from the expert knowledge, special facilities and technological findings in working towards future business success. And the general public – that is to say all of us – benefit from new, energy-efficient products and applications in energy generation, the automotive industry and medical devices. You will find further information on the following pages. We are proud of having been part of the consortium and hope you find reading this issue informative. Werner Scherf Simon Grasser Chief Executive Officer Chief Financial Officer CTR Carinthian Tech Research AG Focus on EPPL project – faster together “The only way to do great work is to love what you do.” Collaborative research to maintain leadership Electronic components are a key enabler for smart systems to address the Grand Challenges in society. In fact, innovative technologies and smart manufactur- ing act as a source of innovation in many areas of our daily lives. Innovative cars, smart production equipment, efficient use of energy, assisted living and modern com- munication, to name just a few, are enabled by power electronics components. In its Europe 2020 initiative, the European Commission set ambitious targets to reduce greenhouse gas emis- sions, improve energy efficiency and establish electric vehicles in Europe. Power semiconductors designed and manufactured at competitive cost and in sufficient quan- tities in Europe are key enablers here, and the EPPL pro- ject was launched to play a major role in achieving these targets. Collaborative innovation at a European level is vital to speeding up time to market. It was the strong focus on practical application that made the EPPL results and achievements attractive for industry. The financial con- tributions by the ENIAC JU and the member states in- volved also supported the partners significantly in meet- ing their challenging project targets. Manufacturing was another area fostered in the EPPL project, as 300mm wafer-based technologies pave the way to competitive cost structures for power solutions made in Europe. A project volume of €74 million and the commitment on the part of 31 partner organisations underlines the im- portance of EPPL for the semiconductor industry in Eu- rope. The project objectives are fully in line with Infine- on’s strategy and we are therefore proud and honoured to have led this powerful partner network, thus contributing our experience in this area to the EPPL project and to Europe’s technology advancement. Many thanks to all the stakeholders for making these great achievements happen. Sabine Herlitschka Thomas Reisinger Chief Executive Officer Board Member Operations Infineon Technologies Austria AG ctr times special issue EPPL project 02 Photos©HelgeBauer,MartinSteinthaler,HenryWelisch(2),AlunFoster(2)
  • 3. When people think of the future, they tend to assume that the current rate of progress will continue for long periods to come. However, experience shows that the rate of progress is not constant and depends largely on investments and strategies. For this reason Infineon Technologies was proud to lead the col- laborative project – Enhanced Power Pilot Line (EPPL). The main purpose of the project is to expand European capabilities and competitiveness in developing and producing power electronics for semiconductor components. A total of 31 European partners from industry and research col- laborated to advance production technology for power semicon- ductors, an industry segment where Europe still holds the leading position. Europe is home to the first power semiconductor facil- ities fabricating devices using 300mm wafer technology, i.e. on silicon wafers that are extremely thin – hardly thicker than a sheet of paper. With EPPL, Europe further expanded this production ad- vantage. The partner organisations cover the entire industry and research value chain in 300mm power semiconductor manufacture, com- prising material research with a focus on silicon, semiconductor development that includes 3D integration and packaging, and related developments in logistics and automation technologies. After three years of collaborative research in the previous ETP300 project (2012–2015) and three years in EPPL (2013–2016), we reached our primary objective of expanding the wafer size limit for power semiconductors made in Europe to 300mm wafer diame- ters. The first products now qualify for release on the international market, and exciting new products will be created using advanced power semiconductor technologies. This magazine summarises some of the results of the EPPL activities and accomplishments during the project. Three years passed quickly and it is now time to look at the very exiting results and say thank you to the stakeholders involved. This applies to the ENIAC JU and the public authorities in the con- tributing member states for their financial support to the EPPL project. We are also indebted to the project officer at the ENIAC JU for the professional guidance given during the project. But most of all we are grateful to the consortium members for their outstanding spirit of collaboration and goal-oriented approach, which enabled the EPPL project to achieve these outstanding results. Together, we strengthened European industry and research by innovating advanced semiconductor products made in Europe. Enjoy reading. Cristina De Luca Johann Massoner Project Manager Project Coordinator Infineon Technologies Austria AG EPPL innovation meets power semiconductors Systemic strategic impact Apilot line project, EPPL was co-funded within the framework of the ENIAC Joint Undertaking (ENIAC JU) by the European Union, the ENIAC member states and their national funding authorities. One of the key achievements of ENIAC JU, if not its most important accomplishment, was the successful implementation of the pioneering pilot line concept. Having allocated around €1.8 billion to 14 pilot line projects over two years, ENIAC JU funded a mechanism to take Euro­ pean RD electronics from lab scale towards produc- tion readiness with unparalleled systemic and strategic impact. This strategic implementation – a first in Europe – was only made possible by the resolute and well-timed cooperation between the respective national authorities and ENIAC JU. In 2014, a new generation of public-private partner- ships was established under the H2020 programme and the Electronic Components and Systems for European Leadership Joint Undertaking (ECSEL JU) took over the ENIAC JU projects, continuing to further and strengthen its impact. Through new calls for proposals and new initi- atives e.g. Lighthouses, ECSEL JU strives – together with all its stakeholders – to create more opportunities and leverage investments on levels ranging from the local and regional to the pan-European. EPPL belongs to a strong and continuous series of in- vestment commitments (EPT300, eRAMP, PowerBase, SemI40 projects) supported by ENIAC JU/ECSEL JU and the countries’ national or regional funding authori- ties, with the ambitious aim of reinforcing and advancing one of the core strengths of European electronics: pow- er semiconductors and the industries that rely on them, resulting in growth and jobs. EPPL is a step forward in reaching the ultimate goal of excellent electronics made in Europe. As a programme officer, it was a rewarding experience for me to see how EPPL successfully developed from ideas to real life implementation. It was a long and challeng- ing path but the participants’ motivation and the coordi- nator’s driven leadership resulted in everyone going the “extra mile” to make it happen. Simona Rucareanu Bert De Colvenaer Programme Officer Executive Director ECSEL Joint Undertaking 03 ctr times special issue EPPL project
  • 4. ctr times special issue EPPL project 04 4Next Generation Technologies SFET Cool MOS™ IGBT ACD 4Key Applications Renewable Energies Automotive Energy Systems Automotive LED Illumination Healthcare 3.5 years of joint research 31partners 20 industrial partners 5 universities 6 research technology organisations ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ €49mindustryinvest m ent in Europe €23m p ublicfunding €10.8m EC | €12.2mnational €72m total project volume 6 European countries
  • 5. 05 ctr times special issue EPPL project ~ 239 experienced researchers ~ 30 Phd students 4 technology work packages 3 application work packages • Renewable Energies • Automotive Applications • Healthcare Advanced Power Semiconductor Pilot Line • Technology Demonstrator Research • Semiconductor Assembly 3D Integration • Advanced Logistics and Automation • 7PhD theses 11MSc theses 124scientific publications AdvancedPower Semiconductor PilotLine WP1 WP9 Dissemination, Exploitation Standardisation WP10 Project Management Application I: Renewable Solar Energy WP5 Application IV: Healthcare WP8 WP6 Application III: Automotive LED (replaces former WP7) WP6 Application II: Automotive Technology DemonstratorRe- search WP2 Semiconductor Assemblyand 3-DIntegration WP3 AdvancedLogistics, Automation YieldLearning WP4 EPPL PROJECT Key FactsAdressing technological challenges together with commercial competitiveness and energy efficiency, EPPL aimed at securing Europe’s leading position in power semiconductors. The achievements are groundbreaking: 21 % female 79 % male 27Process Innovations 14Original Patents 16Product Innovations -15% up to -50% size reduction -15% loss reduction compared to previous technology generation
  • 6. ctr times special issue EPPL project 06 T he EPPL project’s prime objective is to build a fully functional, yield-proven pan-European pilot line for fabricating next generation power semiconductors. The unique opportunities offered by 300mm manu- facturing technology, combining higher energy and cost efficiency with better production yield and improved device reliability, are demon- strated on four next-generation technologies - ACD7, SFET6, CoolMOSTM and IGBT4. A wide range of technologies, materials, pro- cesses and equipment is needed to manufac- ture the different power semiconductors, mak- ing high-volume fabrication on one pilot line extremely challenging. Processes and equip- ment had to be specifically defined and adapt- ed for the manufacture of the next generation demonstrator technologies using the 300mm wafer platform. To ensure efficient production, special attention was given to new methods and tools for the various production steps and pro- cesses. Examples range from a new gas cabinet design (partner ALES) for efficient (pilot) line operation to novel plasma doping solutions de- veloped by IBS that facilitate highly cost-effi- cient implantation. NEW MATERIALS TOOLS Increasing miniaturisation of semiconductor de- vices leads to higher power densities and thus stronger thermo-mechanical loading of the sem- iconductors and metallisation layers. Improved materials are required to withstand these in- creasing temperatures and thus guarantee full device functionality. With special emphasis put on further improved device reliability, metalli- sation development became one main project focus. Related RD activities hence aimed at new materials, but also on the analytical tools Novel products using new generation power semiconductors and a pilot line for high-volume fabrication based on 300mm technology are the EPPL project’s main goals. To enable that, a wide range of new methods and tools had to be developed. The comparison of the wafers of the current (above) and next generation CoolMOS™ devices shows the significant shrinkage achieved. © Infineon [Work Package 1 Work Package 2 ] Next generation power semiconductor development ALES Gas Cabinet © ALES
  • 7. 07 ctr times special issue EPPL project needed for successfully producing next genera- tion devices and on characterising the devices throughout the development phase. Research partner CEST, together with Infineon, developed a new copper-based metallisation process designed to meet these demands. At CTR Carinthian Tech Research the deposition of metallisation layers onto 300mm silicon wa- fers was modelled to understand the effect of residual stresses on maufacturability, e.g. the influence of wafer bow on automated wafer handling or high precision lithography. METHOD DEVELOPMENT The Montanuniversität Leoben, KAI and the Max-Planck-Institut für Eisenforschung jointly investigated the degradation of metal layers caused by repetitive heating during device ap- plication. One aspect in this research dealt with method development to allow faster evaluation of newly developed metallisations as to their resistance to degradation. In parallel, material behaviour during application was investigated in detail to identify the underlying mechanisms that dominate metal degradation. Graz Univer- sity of Technology for instance examined mi- croscopic defects in silicon that could originate either from production, e.g. by proton implan- tation, or application, with the goal of gaining a better understanding of such defects’ influence on product performance and reliability. INTERVIEW WITH PETER IRSIGLER AND JOSEF FUGGER Three questions to the work package leaders 1What was the greatest challenge in these work packages? “As many processes and base materials in power technologies are very specific, the greatest challenge was adopting these steps for the 300mm manufacturing platform. The material had to satisfy the demands of each technology. Ultra-thin wafer and high-temperature processing for example had to be developed from the very beginning. In some cases the stan­ dard equipment available on the market did not meet the requirements and had to be modified to our needs.” 2What were the highlights? “All four demonstrators were developed and qualified successfully to sched- ule. They have created the basis for silicon-based power technologies at In- fineon and all such future products will be developed and produced on 300mm wafers. The next generation based on 300mm manufacturing capabilities shows a great improvement in produc- tivity (e.g. CoolMOS™, ACD7). Close in- teraction and collaboration between all the partners proved to be a key success factor. The academic partners’ latest results in material research were quickly incorporated in technology development and production.” 3What will be the sustainable impact for the semiconductor industry? “The 300mm platform developed is set- ting a new productivity benchmark in this sector. Such advanced manufacturing capabilities will drive further innovation, unlock potential and enable new features in technologies and related products. New materials and characterisation methods will support engineers in design- ing more powerful and at the same time more robust semiconductor products.” PROVEN ENERGY EFFICIENCY In several development cycles, manufactura- bility and performance of the next generation power devices were optimised and their func- tionality and reliability proven in final qualifi- cation tests. The results of the validation and qualification tests show that the initial goals have been reached. The functionality of the 300mm technology-based power pilot line was shown, and significantly improved energy effi- ciency proven for all device types. The project complemented Infineon’s design and product development competence with the expertise of various industrial and academic, Austrian and European partners. The ensuing research activities contributed significantly to the success of product development of both the next-generation power technologies and the new and emerging applications relying on them. Furthermore, scientific key results were published in numerous conference proceedings and peer-reviewed papers. Bow of a 300mm wafer induced by residual stresses due to wafer metallisation. The wafer bow influences wafer handling and processing. © CTR An electron back scatter diffrac- tion (EBSD) image of a copper thin film. This analysis allows researchers to quantify the influence that deposition and application conditions have on the material’s microstructure. © Montanuniversität Leoben Peter Irsigler, Director Technology, Infineon Technologies (Villach/Austria) Josef Fugger, Managing Direc- tor, KAI Kompetenzzentrum Automobil- und Indus­trie­ elektronik (Villach/Austria)
  • 8. ctr times special issue EPPL project 08 M iniaturisation and integration of greater functionality are major trends in power electronics, which require possibly low parasitic effects for optimal signal transmission alongside the ability to work under increasing temperature demands. Assembly and pack- aging thus become key objectives calling for innovative technologies and components. A main aspect in miniaturisation is using the third dimension, which is highly challenging in par- ticular with power devices. The best technology is thus needed, requiring a thorough in-depth understanding of processes and materials. The work package pooled experts along the full value chain, involving suppliers of materials like Plansee alongside equipment providers SPTS and EVG, semiconductor manufacturers Infineon and ams, and packaging foundry Nanium. Their work was supported by leading European re- search and technology organisations, such as the Fraunhofer IISB, CEA-LETI, INL and CTR contributing • research on technologies for the chip/package interface, including pre-assembly • research on 3D integration technologies with an interposer applicable for power devices, in- cluding a first pilot line • research on a 3D test vehicle demonstrating the technologies, and on reliability of chips from 300mm devices for power modules PROCESSES MATERIALS Investigating the processes affecting the chip/ package interfaces included liner sputtering, galvanic copper (Cu) deposition and Cu struc- turing to deposit Cu backside metallisation on power chips. A dedicated thermal laser sepa- ration technology was developed for bonded wafer stacks with silicon dioxide interfaces and interposer wafers with through-silicon vias (TSV) and redistribution layers (RDL). This led to significantly reduced in-die stresses and chip edge defects. Another team investigated extending Advanced Process Control methods to assembly and packaging of semiconductor devices. Initial results on wedge wire bonding showed encouraging process improvements. In- fineon meanwhile successfully applied a highly conductive die attach adhesive for assembling 125μm thin dice and collaborated with Plan- see on improved heat dissipation interfaces of molybdenum composites with mould com- pounds and silicon. Molybdenum is particularly attractive since it has a coefficient of thermal expansion close to that of silicon, thus intro- ducing less thermal stress than the normally used copper. 3D SYSTEM INTEGRATION Led by ams, seamless 3D system integration for power applications was intensively researched. The processes on the ams interposer pilot line were refined and a tungsten (W) TSV module developed. Research addressed industrial high etch rate recipes and metal and dielectric layer deposition for TSV technology with an aspect ratio 5:1 (TSV depth to diameter). Apart from the W-TSV, a TSV module with Cu metallisation and a Cu RDL were developed, thus achieving [ Work Package 3 ] 3D Integration Chip Interfaces Semiconductor assembly and 3D integration directly impact performance, lifetimes and costs of power devices. In particular research into materials was of critical impor- tance for improving electrical properties, heat dissipation and stress management. 3D demonstator: silicon interposer with stacked power devices © CEA-LETI Scanning microscopy image of the top edge of a diced 3D chip with solder balls © Fraunhofer IISB
  • 9. 09 ctr times special issue EPPL project considerably improved TSV and line resistanc- es: first interposer samples have TSV resistanc- es as low as 3mOhmTSV. Die-to-wafer stacking (D2W) complemented the 3D technology mod- ules. As 3D devices are sensitive to defects on both sides, smooth sidewalls with minimum chip out are required. Thermal laser separation (TLS) again was studied and optimised for such 3D applications. A final main 3D topic was fan-out wafer-level packaging (FOWLP) with through- mould vias. Following investigation of various concepts, temporary wafer bonding technology for FOWLP was brought to volume production readiness. TEST VEHICLE RELIABILITY To demonstrate 3D system integration viability, a dedicated technology test vehicle for power applications was designed and realised. In- corporating an Infineon power device, an ams/ CEA-LETI interposer and Cu pillar D2W, the co-design was supported by extensive thermal and thermo-mechanical simulation. In parallel, the reliability of chips from the 300mm wafer line in power applications was studied under the lead of Infineon Warstein. Module reliability investigations focused on high temperature reverse bias, high tempera- ture gate stress and high humidity/high temper- ature reverse bias, all of which were concluded successfully. Correlations of the chips’ static WP 3 TASKS IN FOCUS “Innovation has become a collaborative process, linking firms and research institutions. Our results constitute scientific and technical knowledge produced, acquired, pooled and systematised by the whole work package team.” Franz Schrank, Group Manager 3D and Wafer Level Integration, ams AG (Unterpremstätten/Austria) Thin fan-out wafer-level packaged 300mm wafer with large wafer bow © Nanium Side view of thin fan-out wafer temporarily bonded to a handling wafer © Nanium Semiconductor Assembly and 3D Integration WP3 TASK II: 3D SYSTEM INTEGRATION TECHNOLOGIES Silicon interposer technologies wafer level package, interposer pilot line, scale up of interposer technology … TASK IV: RELIABLIITY AND FAILURE ANALYSIS Investigation, testing, reliability, risk assessment … TASK III: 3D SYSTEM INTEGRATION TECHNOLOGY TEST VEHICLE Definition, embedded testing, test interfaces, test vehicle manufacturing … TASK I: CHIP/PACKAGE INTERFACE AND PREASSEMLY Chip metallisation, Handling methods, Thermal Laser Separation (TLS), Advanced Process Control (APC), Innovative die-attach, heat dissipation, material packaging … electrical parameters using 300mm wafer tech- nology were found to be within the limits, and no differences found between qualification and reference modules, illustrating the maturity of the technology solutions developed in EPPL.
  • 10. ctr times special issue EPPL project 10 [ Work Package 4 ] Advanced Logistics Automation The combination of intelligent logistics with a high level of manufacturing automation is one cornerstone in implementing the world’s first 300mm pilot line for power microelectronics, and directly reflects Infineon’s strategy for achieving manufacturing excellence. T he optimal utilisation of advanced auto- mation and intelligent logistics nowadays is a necessity for establishing a high-mix, high-volume 300mm wafer manufacturing pilot line. Other than with 300mm CMOS fabs, sev- eral of the specific processing tools for power electronics are not automated, and established mass production standard logistics are barely applicable. Moreover, many next-generation power devices involve special thin wafers, requiring singular processes, excellent cross-­ functional know-how and creating unique chal- lenges for system automation in a front-end wafer facility. ADVANCED WAFER HANDLING Defining new transportation and handling proce- dures required combining theoretical and prac- tical approaches. For instance, a finite element method (FEM) simulation model was created in cooperationwithCTRtoidentifysuitablehandling and storage solutions for the different (thin) wafer substrates. The Technische Universität Dresden meanwhile studied e.g. the actual sus- ceptibility of the wafers to vibrations, providing the very first reliable figures on vibration dam- age thresholds. Meanwhile, different thin-wafer handling concepts, from edge grippers to Ber- noulli end effectors and magnetic handling sys- tems, were compared and ranked. The experts at the Stralsund University of Applied Sciences then devised and built a demonstrator based on a contactless end effector that is now being val- idated by Infineon Technologies Dresden against standard end effectors already in use in the fab. View of the clean room for the 300mm power pilot line at Infineon Technologies Dresden © Infineon Technologies Dresden “Logistics and automation are an emerging key factor in power semiconductor fabrication. They are nowadays in- dispensable in establishing high-performance, high-volume manufacturing facilities for innovative products that meet the customer demands and are seamlessly integrated into the supply chains.”
  • 11. ctr times special issue EPPL project REFINED FAB LOGISTICS Exploiting the advances in process automation to full potential and assuring maximum efficiency of the pilot line, the second key objective dealt with dedicated logistics. A comprehensive top-layer fab simulation model was created for the 300mm wafer start scenario to quantify e.g. the influence of the product mix on key performance parameters like utilisation, flow factor and cycle times. One level deeper, dedicated simulation models e.g. for the 300mm wafer transporta- tion system were developed in cooperation with the Technische Universität Dresden to study the material flow of the handling systems. Enabling a convenient variation of key parameters, like the number of vehicles, automation strategies and other factors, these unique models proved invaluable for strategic decision-making and se- lecting the best concepts for the pilot line and future ramp phases. The research into advanced logistics also creat- ed operation curves for the special equipment used in the thin wafer flow. Some of the new tools have a special tool loading behaviour that requires specific automation concepts for wafer transportation and storage close to those tools to integrate them most efficiently. Finally, the factors that influence the complexity of power manufacturing were quantified, visualised and critically assessed. Based on this work, strat- egies are now being defined to reduce (super­ fluous) complexity. ENHANCED LINE STABILITY In addition to achieving best manufacturing performance, yield improvement is needed for high stability and high efficiency. Power semi- conductors introduce a number of essential but critical new materials, from noble elements to organic components that can cause corrosion. The control of the cleanroom as well as the conditions in mini-environments, e.g. wafer con- tainers, are hence of key importance. adixien Vacuum provided demonstrators that were used to analyse particles and organic components that occur e.g. in the air within the container at different process steps. Analyses for metals and organic components were performed at Infineon Technologies Dresden and the Fraunhofer Insti- tute for Integrated Systems and Device Tech­ nology (IISB) in Erlangen. The results provided the basis for special container cleaning proce- dures and tool dedications that efficiently avoid yield loss related to critical contaminants. The results of the RD activities in the work package were continuously used alongside the qualification of the different technologies and products in the pilot lines, thus achieving a highly automated fab with best-in-class key parameters. Simulation model of the automated material handling system © Technische Universität Dresden Demonstrator for analyses of the micro-environment within the FOUP © Germar Schneider / Infineon Technologies Dresden 11 STATEMENT Trending topics in logistics automation Intelligent logistics had to be defined to meet the demands according to development speed and cycle times. Since every lot creates huge amounts of information that has to be managed and used for controlling the different processes, vast databases are needed to store and process all the pertinent data. Based on the high automation level of the pilot lines, a manufacturing area was established that uses the latest trends from the Internet of Things. Virtual fab simulation and big data handling will thus play an important role also in the future in increasing manufacturing productivity and competi- tiveness through digitalisation.” “Implementing highly automated tools and processes for 300mm power pilot lines was a very challenging task that involved closely coordinated collaboration across disciplines and teams. Many processes for new semi­ conductor technologies and products had to be automated without reverting to classic fab automation standards. Additionally, the manufacturing floor had to be converted from a low-mix/high-volume to a high-mix/high-­ volume fab producing a range of different products with individual customer due dates in the same area. Germar Schneider Manager Thin Wafer Handling Infineon Technologies (Dresden/Germany)
  • 12. ctr times special issue EPPL project 12 Innovation for Industry and Applications [ Application 1 ] Solar Power/Photovoltaics (PV) Our aim was a holistic design approach to reduce PV inver- ters’ volume, weight and bill of materials. The technologi- cal key was increasing the switching frequency by a factor of three; as this normally decreases efficiency, we opted for a soft- switching topology. Together, these two factors allowed saving around 50% in weight and volume of the inverter’s inductive components, and achieving slightly better efficiency. Regarding the semiconductor devices, we focused on efficiency and relia- bility, and thus chose Infineon’s silicon-based next-generation semiconductors (CoolMOS™). Measurements, including EMI, validated our approach. As the quality leader in the global solar energy market, Fronius has been researching innovative technologies for the PV industry for more than 20 years. This application is another step towards 24 hours of sun, Fronius’ vision of a future where 100% of the world’s energy needs are met by renewable sources. With 24 hours of sun, we provide a vital, sustainable vision for the energy revolution and concentrate on solutions to generate, store, distribute and consume solar energy smartly, efficiently and economically. This vision will provide a reliable, clean, independent and sustainable supply for both individual consumers and whole countries. [ Application 2 ] Automotive Body Control Module Many automotive applications rely on semiconductor devices, such as smart high-side switches or power MOSFETs, for tasks like power switching and monitoring output loads. Semi- conductors for such automotive applications have to meet very special requirements, like driving within a wide range of loads and temperatures at possibly small power losses, and must sup- port safety mechanisms and diagnostic features. A key example of such an application is a Body Control Module, i.e. the central control unit for low- and medium-rated electrical power loads, ranging from interior/exterior lighting to heaters and door locks. A fully functional Body Control Module demonstrator has been developed and qualified according to the latest automotive standards. This prototype validated the features and advantages of the new power devices in an improved high-performance application and proved the quality and functionality of EPPL’s next-generation semiconductor devices. The following improvements were achieved: • reduced package size and weight compared to current, equiv- alent components • expansion of the portfolio towards higher load current-capable power semiconductors by introducing lower resistance models • improved control performance to reduce overhead losses • improved electromagnetic compatibility “Taking a holistic design approach, we managed to reduce the volume, weight and costs of the photovoltaic inverters, which also resulted in improved electrical efficiency.” Günter Ritzberger, RD Manager Power Electronics, FRONIUS International (Wels/Austria) “Our new Body Control Module demonstrates the applicability of the new power semiconductor technology in a high-performance automotive system. It supports enhanced current controlling capability, full diagnosis and enhanced reliability.” Gregor Bugla, Advanced Engineering, Lear Corporation (Kronach/Germany)
  • 13. 13 ctr times special issue EPPL project Creating a range of unique manufacturing processes and technologies, EPPL paved the way from research to manufacturing and the market. This enabled a multitude of product innovations of direct impact on our everyday high-tech life. [ Application 3 ] Automotive LED Modern, innovative and efficient: LED-based headlights for cars capture buyers’ hearts at first sight. LED lighting is thus now being adopted quickly in the volume car market, where it is already used in a variety of different functions – from turn signals to low beam, daytime running, cornering and matrix lights. This demands innovative, reliable and cost-efficient power conversion solutions. The automotive LED demonstrator system developed by Infineon involved a combination of next-generation “EPPL” power MOSFETs with an efficient DC/DC power conversion controller. Designed and developed in a compact package, the DC/DC unit meets the most stringent automotive quality and reliability standards, including EMC (epoxy moulding com- pound), ESD (electrostatic discharge) and safety requirements. Full validation of the DC/DC confirmed it satisfies all relevant requirements. Its single coil architecture provides the flexibil- ity to address different lighting functions with one setup, and enables high energy conversion efficiency and a significant reduction in components and board space. This, in turn, results in significantly reduced overall system costs for applications that combine different lighting functions. [ Application 4 ] Healthcare Driven by the company’s comprehensive sustainability strat- egy, the EPPL project came at the right time for Philips Healthcare. The innovation activities focusing on energy-effi- cient medical power converters were split into two parts - the power converter itself, aimed at improving performance and reducing size and costs, and a Healthcare Platform Demonstra- tor for two different medical application domains: • Interventional vascular imaging, and • Computer tomography imaging During the project we cooperated closely with scientific and industrial partners. Eindhoven University of Technology fo- cused their research on a kW power AC/DC converter, creating converter topologies that significantly increase overall system efficiency. Combining new modelling and control techniques with improved EPPL devices, they managed to go far beyond the state-of-the-art. HELIOX worked on interleaving four boost converter modules to operate as a power factor converter, which is equally attractive as it provides efficiencies of around 97%. All the work package’s main objectives were met, creating significant innovation that will be reused in future medical products. The project enabled a shorter time to market, and we expect to achieve commercial exploitation with a significantly shortened lead time. “Sharing ideas and making use of each partner’s strength helped us to generate innovative power semiconductor solutions and a platform to take the next step into sustainable solutions and lower the cost for healthcare.” Harry Marinus, Group Leader Power Management Design Group, Philips Innovation Services - Electronics (Eindhoven/The Netherlands) “LED lighting is spreading to the volume car market. The DC/DC demonstrator shows the advantages of high conversion efficiency and flexible architecture: reduced board space and weight with multiple functions at reduced cost.” Christian Gurschler, Product Manager, Infineon Technologies (Padua/Italy)
  • 14. ctr times special issue EPPL project 14 Consortium CTR TU Graz MU Leoben CEST Fronius ams Plansee KAI EV Group Infineon Munich Infineon Dresden Fraunhofer IISB Philips DMC TU Dresden FH Stralsund MPI-E Lear Philips Med TU Eindhoven Heliox EMOSS Infineon Padova CEA-LETI IBS adixien Vacuum Air Liquide ECP SPTS INL NANIUM Infineon Villach The EPPL consortium brought together large industry with small and medium enterprises, high-tech research institutes and leading universities throughout Europe. Financially supported by national grants from Austria, Germany, The Netherlands, France, Italy, Portugal and the European Commission within the ENIAC Joint Undertaking the project strengthened Europe’s leading position in power semiconductors.
  • 15. 15 ctr times special issue EPPL project Portugal Consortium members: • Laboratorio Iberico Internacional de Nanotecnologia (INL) • Nanium S.A Funding institutions: • FCT (Fundação para a Ciência e a Tecnologia) by the Ministry of Education and Science of Portugal (Ministério da Educação e Ciência) The Netherlands Consortium members: • Philips Medical Systems Nederland B.V  • Technische Universiteit Eindhoven • Heliox B.V. • EMOSS B.V Funding institutions: • NL Agency (Agentschap NL) by the Dutch Ministry of Economic Affairs (Ministerie van Economische Zaken) France Consortium members: • CEA-LETI (CEA - Commissariat à l’Energie Atomique et aux Energies Alternatives; LETI - Laboratory for Electronics Information Technology) • Ion Beam Services  • adixien Vacuum Products • Air Liquide Electronics Systems • Entegris Cleaning Process  • SPTS Technologies SAS Funding institutions: • Dgcis (Direction générale de la compétitivité, de l’industrie et des services) by the French Ministry of Craft, Commerce and Tourism Italy Consortium members: • Infineon Technologies Italia S.r.l. Funding institutions: • Italian Ministry of Education, University and Research Austria Consortium members: • Infineon Technologies Austria AG (project leader) • CTR Carinthian Tech Research AG • Technische Universität Graz • Montanuniversität Leoben • CEST Kompetenzzentrum für elektro­chemische Oberflächentechnologie GmbH • Fronius International GmbH • ams AG • Plansee SE • KAI Kompetenzzentrum Automobil- und Industrieelektronik GmbH • EV Group E. Thallner GmbH Funding institutions: • Austrian Research Promotion Agency (FFG) on behalf of the Austrian Ministry for Transport, Innovation and Technology Germany Consortium members: • Infineon Technologies AG / Neubiberg • Infineon Technologies Dresden GmbH • Fraunhofer Gesellschaft E.V., Institute for Integrated Systems and Device Technology (IISB) • Philips Medical Systems DMC GmbH  • Technische Universität Dresden • Fachhochschule Stralsund • Max-Planck-Institut für Eisenforschung (MPI-E) • Lear Corporation GmbH Funding institutions: • Federal Ministry of Education and Research of Germany supported by grants from and the ENIAC Joint Untertaking
  • 16. ctr times special issue EPPL project 16 LEGAL NOTICE Published and distributed by CTR Carinthian Tech Research AG, High Tech Campus Villach, Europastraße 12, 9524 Villach/Austria, T: +43 4242 56300-0, E: info@ctr.at, www.ctr.at Edited by EPPL project coordinator Infineon Technologies Austria, CTR times special issue coordination by Birgit Rader-Brunner (editor in chief) Layout/graphics by www.designation.at; Printed by satzdruckteam/Druck- botschafter; Picture credits: All pictures and graphic arts are protected by copyright and were provided by courtesy of the EPPL partners. Copying the pictures for private or commercial use requires the permission of EPPL project coordinator or the owner of the pictures. The EPPL timeline April 2016 Milestone: 100 scientific publications 2013 2014 2015 2016 http://bit.ly/29sXPAt Photos:©EPPLProject/KK/Semikron March 2016 Year 3 meeting (Erlangen/Germany) September 2016 EPPL final general review (Villach/Austria) March 2016 EPPL scientific work wins Semikron Award (Nuremberg/Germany) June 2014 EPPL review meeting at Infineon Technologies (Dresden/Germany) May 2015 “Open Innovation Day” – InnoDay 2015 (Villach/Austria) June 2015 Year 2 review (Brussels/Belgium) April 2013 EPPL project kick off at Infineon Technologies (Villach/Austria) January 2014 Online launch of the EPPL video www.eppl-project.at March 2014 EPPL first year meeting at Infineon Technologies (Villach/Austria) April 2014 EPPL was selected as a Multi-KETs Pilot Lines Project (Delft/ The Netherlands) September 2014 Multi Key Enabling Pilot Line Demonstration of EPT300 and EPPL Project at Infineon Technologies (Villach/Austria) October 2013 First semester meeting at INL – International Iberian Nanotechnology Laboratory (Braga/Portugal) July 2013 EPPL website is online www.eppl-project.eu